Patch from George G. Davis
This Freescale Semiconductor, Inc. contributed patch adds mem_types[]
support for ARMv6 non-shared device memory region attributes. This
implementation provides support for only first level section mapped
non-shared devices. Second level non-shared device mappings are not
yet supported.
Signed-off-by: George G. Davis <gdavis@mvista.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lucas Correia Villa Real
This patch defines S3C2400 memory map and adds a S3C24XX macro for
common resources between S3C2400, S3C2410 and S3C2440 cpus.
Signed-off-by: Lucas Correia Villa Real <lucasvr@gobolinux.org>
Signed-off-by: Ben Dooks <ben-linux@fluff.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from David Vrabel
PXA27x SSP controller has a few different registers, including SCR (serial clock rate) in SSCR0.
Signed-off-by: David Vrabel <dvrabel@arcom.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch fixes OMAP clock framework to use clk_enable/disable
instead of clk_use/unuse as specified in include/linux/clk.h.
Instances of clk_use/unuse are renamed to clk_enable/disable,
and references clk_use/unuse are removed.
Signed-off-by: Tony Lindgren <tony@atomide.com>
asm/mach/arch.h introduced a __deprecated, but didn't include compiler.h,
causing:
In file included from arch/arm/mach-at91rm9200/devices.c:13:
include/asm/mach/arch.h:23: warning: no semicolon at end of struct or union
include/asm/mach/arch.h:23: error: syntax error before 'phys_ram'
include/asm/mach/arch.h:34: error: syntax error before ':' token
include/asm/mach/arch.h:35: error: syntax error before ':' token
include/asm/mach/arch.h:36: error: syntax error before ':' token
include/asm/mach/arch.h:37: error: syntax error before ':' token
include/asm/mach/arch.h:45: error: syntax error before '}' token
Add the necessary include.
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
This is needed by strace to properly handle the tracing of some system
calls. It could be useful for other applications as well.
Based on an earlier patch from Daniel Jacobowitz.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Daniel Jacobowitz <dan@debian.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
This patch adds the required code to support both user space ABIs at
the same time. A second syscall table is created to include legacy ABI
syscalls that need an ABI compat wrapper.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
struct statfs64 has extra padding with EABI growing its size from 84 to
88. This struct is now __attribute__((packed,aligned(4))) with a small
assembly wrapper to force the sz argument to 84 if it is 88 to avoid
copying the extra padding over user space memory unexpecting it.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
Fix a few syscalls for EABI requirements. They were sys_pread64 and
sys_pwrite64 where the last argument is now entirely pushed on stack,
but since commit 567bd98017 they don't
require any fixup. Remains only the stat64 structure. Non EABI kernels
are unaffected.
Signed-off-by: Nicolas Pitre
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
For a while we wanted to change the way syscalls were called on ARM.
Instead of encoding the syscall number in the swi instruction which
requires reading back the instruction from memory to extract that number
and polluting the data cache, it was decided that simply storing the
syscall number into r7 would be more efficient. Since this represents
an ABI change then making that change at the same time as EABI support
is the right thing to do.
It is now expected that EABI user space binaries put the syscall number
into r7 and use "swi 0" to call the kernel. Syscall register argument
are also expected to have "EABI arrangement" i.e. 64-bit arguments
should be put in a pair of registers from an even register number.
Example with long ftruncate64(unsigned int fd, loff_t length):
legacy ABI:
- put fd into r0
- put length into r1-r2
- use "swi #(0x900000 + 194)" to call the kernel
new ARM EABI:
- put fd into r0
- put length into r2-r3 (skipping over r1)
- put 194 into r7
- use "swi 0" to call the kernel
Note that it is important to use 0 for the swi argument as backward
compatibility with legacy ABI user space relies on this.
The syscall macros in asm-arm/unistd.h were also updated to support
both ABIs and implement the right call method automatically.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
The ARM EABI says that the stack pointer has to be 64-bit aligned for
reasons already mentioned in patch #3101 when calling C functions.
We therefore must verify and adjust sp accordingly when taking an
exception from kernel mode since sp might not necessarily be 64-bit
aligned if the exception occurs in the middle of a kernel function.
If the exception occurs while in user mode then no sp fixup is needed as
long as sizeof(struct pt_regs) as well as any additional syscall data
stack space remain multiples of 8.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
Although ARM is still using 32-bit pointers, version 5 and later
versions of the ARM architecture introduced the ldrd and strd
instructions to move 64-bit data which must be 64-bit aligned in memory,
and the EABI includes new constraints on structure data alignment to
allow for the compiler to use those instructions. This means that any
slab allocation must start on a 64-bit boundary which is not equivalent
to BYTES_PER_WORD, especially on those architecture versions that
implements the ldrd/strd instructions.
Overriding the default alignment disables some slab debug features. If
those debug features are really needed then the kernel will have to be
compiled for version 4 of the ARM architecture.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This patch supports start_thread in nommu mode which requires the
base index register.
Signed-off-by: Hyok S. Choi <hyok.choi@samsung.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
This field is redundent since it must be equal to PHYS_OFFSET anyway.
Now that no code uses it anymore, mark it deprecated and remove all
initializations from the tree.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Lennert Buytenhek
For the ixp2000 netdev driver, we need to map in a chunk of SRAM (to
store the transmit and receive descriptors) and the scratch get/put
area (so that we can use the scratchpad rings in the cpu for managing
the descriptors.) These are the final two mappings needed for the
netdev driver and the last missing piece for the driver in mainline
to work.
Signed-off-by: Lennert Buytenhek <buytenh@wantstofly.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
{get,put}_thread_info() were introduced in 2.5.4 and never
had been called by anything in the tree.
Signed-off-by: Al Viro <viro@zeniv.linux.org.uk>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Add per-arch sched_cacheflush() which is a write-back cacheflush used by
the migration-cost calibration code at bootup time.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Cc: Nick Piggin <nickpiggin@yahoo.com.au>
Signed-off-by: Andrew Morton <akpm@osdl.org>
Signed-off-by: Linus Torvalds <torvalds@osdl.org>
Patch from Kevin Hilman
This patch increase available DMA-consistent memory allocated by dma_coherent_alloc(). The default remains at 2M (defined in asm/memory.h) and each platform has the ability to override in asm/arch-foo/memory.h.
Signed-off-by: Kevin Hilman <kevin@hilman.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
Patch from Nicolas Pitre
Depending on your gcc version, the current C-only implementation would
produce suboptimal code, ranging from a bad register selection forcing
an additional mov instruction to a failure to merge the eor and the ror
in a single instruction. With a little help gcc always produces the
best code.
Signed-off-by: Nicolas Pitre <nico@cam.org>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
George G. Davis
Lucas Correia Villa Real
Russell King
David Vrabel
Tony Lindgren
Nicolas Pitre
Hyok S. Choi
Lennert Buytenhek
Linus Torvalds
Al Viro
Ingo Molnar
Kevin Hilman