Merge tag 'powerpc-4.11-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux

Pull some more powerpc fixes from Michael Ellerman:
 "The main item is the addition of the Power9 Machine Check handler.
  This was delayed to make sure some details were correct, and is as
  minimal as possible.

  The rest is small fixes, two for the Power9 PMU, two dealing with
  obscure toolchain problems, two for the PowerNV IOMMU code (used by
  VFIO), and one to fix a crash on 32-bit machines with macio devices
  due to missing dma_ops.

  Thanks to:
    Alexey Kardashevskiy, Cyril Bur, Larry Finger, Madhavan Srinivasan,
    Nicholas Piggin"

* tag 'powerpc-4.11-4' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux:
  powerpc/64s: POWER9 machine check handler
  powerpc/64s: allow machine check handler to set severity and initiator
  powerpc/64s: fix handling of non-synchronous machine checks
  powerpc/pmac: Fix crash in dma-mapping.h with NULL dma_ops
  powerpc/powernv/ioda2: Update iommu table base on ownership change
  powerpc/powernv/ioda2: Gracefully fail if too many TCE levels requested
  selftests/powerpc: Replace stxvx and lxvx with stxvd2x/lxvd2x
  powerpc/perf: Handle sdar_mode for marked event in power9
  powerpc/perf: Fix perf_get_data_addr() for power9 DD1
  powerpc/boot: Fix zImage TOC alignment
This commit is contained in:
Linus Torvalds
2017-03-13 19:48:22 -07:00
13 changed files with 523 additions and 54 deletions
@@ -16,56 +16,56 @@
*/
FUNC_START(load_vsx)
li r5,0
lxvx vs20,r5,r3
lxvd2x vs20,r5,r3
addi r5,r5,16
lxvx vs21,r5,r3
lxvd2x vs21,r5,r3
addi r5,r5,16
lxvx vs22,r5,r3
lxvd2x vs22,r5,r3
addi r5,r5,16
lxvx vs23,r5,r3
lxvd2x vs23,r5,r3
addi r5,r5,16
lxvx vs24,r5,r3
lxvd2x vs24,r5,r3
addi r5,r5,16
lxvx vs25,r5,r3
lxvd2x vs25,r5,r3
addi r5,r5,16
lxvx vs26,r5,r3
lxvd2x vs26,r5,r3
addi r5,r5,16
lxvx vs27,r5,r3
lxvd2x vs27,r5,r3
addi r5,r5,16
lxvx vs28,r5,r3
lxvd2x vs28,r5,r3
addi r5,r5,16
lxvx vs29,r5,r3
lxvd2x vs29,r5,r3
addi r5,r5,16
lxvx vs30,r5,r3
lxvd2x vs30,r5,r3
addi r5,r5,16
lxvx vs31,r5,r3
lxvd2x vs31,r5,r3
blr
FUNC_END(load_vsx)
FUNC_START(store_vsx)
li r5,0
stxvx vs20,r5,r3
stxvd2x vs20,r5,r3
addi r5,r5,16
stxvx vs21,r5,r3
stxvd2x vs21,r5,r3
addi r5,r5,16
stxvx vs22,r5,r3
stxvd2x vs22,r5,r3
addi r5,r5,16
stxvx vs23,r5,r3
stxvd2x vs23,r5,r3
addi r5,r5,16
stxvx vs24,r5,r3
stxvd2x vs24,r5,r3
addi r5,r5,16
stxvx vs25,r5,r3
stxvd2x vs25,r5,r3
addi r5,r5,16
stxvx vs26,r5,r3
stxvd2x vs26,r5,r3
addi r5,r5,16
stxvx vs27,r5,r3
stxvd2x vs27,r5,r3
addi r5,r5,16
stxvx vs28,r5,r3
stxvd2x vs28,r5,r3
addi r5,r5,16
stxvx vs29,r5,r3
stxvd2x vs29,r5,r3
addi r5,r5,16
stxvx vs30,r5,r3
stxvd2x vs30,r5,r3
addi r5,r5,16
stxvx vs31,r5,r3
stxvd2x vs31,r5,r3
blr
FUNC_END(store_vsx)