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[IA64] Export cpu cache info by sysfs

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The patch exports 8 attributes of cpu cache info under
/sys/devices/system/cpu/cpuX/cache/indexX:
1) level
2) type
3) coherency_line_size
4) ways_of_associativity
5) size
6) shared_cpu_map
7) attributes
8) number_of_sets: number_of_sets=size/ways_of_associativity/coherency_line_size.

Signed-off-by: Zhang Yanmin <yanmin.zhang@intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
This commit is contained in:
Zhang, Yanmin
2006-02-27 11:37:45 +08:00
committed by Tony Luck
parent d1127e40e8
commit f19180056e
2 changed files with 395 additions and 0 deletions
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include/asm-ia64/pal.h
+28
View File
@@ -68,6 +68,7 @@
#define PAL_SHUTDOWN 40 /* enter processor shutdown state */
#define PAL_PREFETCH_VISIBILITY 41 /* Make Processor Prefetches Visible */
#define PAL_LOGICAL_TO_PHYSICAL 42 /* returns information on logical to physical processor mapping */
#define PAL_CACHE_SHARED_INFO 43 /* returns information on caches shared by logical processor */
#define PAL_COPY_PAL 256 /* relocate PAL procedures and PAL PMI */
#define PAL_HALT_INFO 257 /* return the low power capabilities of processor */
@@ -1647,6 +1648,33 @@ ia64_pal_logical_to_phys(u64 proc_number, pal_logical_to_physical_t *mapping)
return iprv.status;
}
typedef struct pal_cache_shared_info_s
{
u64 num_shared;
pal_proc_n_log_info1_t ppli1;
pal_proc_n_log_info2_t ppli2;
} pal_cache_shared_info_t;
/* Get information on logical to physical processor mappings. */
static inline s64
ia64_pal_cache_shared_info(u64 level,
u64 type,
u64 proc_number,
pal_cache_shared_info_t *info)
{
struct ia64_pal_retval iprv;
PAL_CALL(iprv, PAL_CACHE_SHARED_INFO, level, type, proc_number);
if (iprv.status == PAL_STATUS_SUCCESS) {
info->num_shared = iprv.v0;
info->ppli1.ppli1_data = iprv.v1;
info->ppli2.ppli2_data = iprv.v2;
}
return iprv.status;
}
#endif /* __ASSEMBLY__ */
#endif /* _ASM_IA64_PAL_H */