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Merge 3.5-rc5 into usb-next
This resolves a merge issue with the option.c USB serial driver. Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
@@ -986,13 +986,13 @@ http://www.thedirks.org/winnov/</ulink></para></entry>
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<row id="V4L2-PIX-FMT-Y4">
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<row id="V4L2-PIX-FMT-Y4">
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<entry><constant>V4L2_PIX_FMT_Y4</constant></entry>
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<entry><constant>V4L2_PIX_FMT_Y4</constant></entry>
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<entry>'Y04 '</entry>
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<entry>'Y04 '</entry>
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<entry>Old 4-bit greyscale format. Only the least significant 4 bits of each byte are used,
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<entry>Old 4-bit greyscale format. Only the most significant 4 bits of each byte are used,
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the other bits are set to 0.</entry>
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the other bits are set to 0.</entry>
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</row>
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</row>
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<row id="V4L2-PIX-FMT-Y6">
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<row id="V4L2-PIX-FMT-Y6">
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<entry><constant>V4L2_PIX_FMT_Y6</constant></entry>
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<entry><constant>V4L2_PIX_FMT_Y6</constant></entry>
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<entry>'Y06 '</entry>
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<entry>'Y06 '</entry>
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<entry>Old 6-bit greyscale format. Only the least significant 6 bits of each byte are used,
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<entry>Old 6-bit greyscale format. Only the most significant 6 bits of each byte are used,
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the other bits are set to 0.</entry>
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the other bits are set to 0.</entry>
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</row>
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</row>
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</tbody>
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</tbody>
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@@ -560,6 +560,7 @@ and discussions on the V4L mailing list.</revremark>
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&sub-g-tuner;
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&sub-g-tuner;
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&sub-log-status;
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&sub-log-status;
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&sub-overlay;
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&sub-overlay;
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&sub-prepare-buf;
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&sub-qbuf;
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&sub-qbuf;
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&sub-querybuf;
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&sub-querybuf;
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&sub-querycap;
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&sub-querycap;
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@@ -567,7 +568,6 @@ and discussions on the V4L mailing list.</revremark>
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&sub-query-dv-preset;
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&sub-query-dv-preset;
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&sub-query-dv-timings;
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&sub-query-dv-timings;
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&sub-querystd;
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&sub-querystd;
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&sub-prepare-buf;
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&sub-reqbufs;
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&sub-reqbufs;
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&sub-s-hw-freq-seek;
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&sub-s-hw-freq-seek;
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&sub-streamon;
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&sub-streamon;
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@@ -108,10 +108,9 @@ information.</para>
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/></entry>
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/></entry>
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</row>
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</row>
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<row>
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<row>
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<entry>__u32</entry>
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<entry>struct v4l2_format</entry>
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<entry><structfield>format</structfield></entry>
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<entry><structfield>format</structfield></entry>
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<entry>Filled in by the application, preserved by the driver.
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<entry>Filled in by the application, preserved by the driver.</entry>
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See <xref linkend="v4l2-format" />.</entry>
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</row>
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</row>
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<row>
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<row>
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<entry>__u32</entry>
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<entry>__u32</entry>
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@@ -89,7 +89,7 @@
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<row>
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<row>
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<entry></entry>
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<entry></entry>
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<entry>&v4l2-event-frame-sync;</entry>
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<entry>&v4l2-event-frame-sync;</entry>
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<entry><structfield>frame</structfield></entry>
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<entry><structfield>frame_sync</structfield></entry>
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<entry>Event data for event V4L2_EVENT_FRAME_SYNC.</entry>
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<entry>Event data for event V4L2_EVENT_FRAME_SYNC.</entry>
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</row>
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</row>
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<row>
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<row>
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@@ -12,6 +12,12 @@ Rules on what kind of patches are accepted, and which ones are not, into the
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marked CONFIG_BROKEN), an oops, a hang, data corruption, a real
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marked CONFIG_BROKEN), an oops, a hang, data corruption, a real
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security issue, or some "oh, that's not good" issue. In short, something
|
security issue, or some "oh, that's not good" issue. In short, something
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critical.
|
critical.
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|
- Serious issues as reported by a user of a distribution kernel may also
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|
be considered if they fix a notable performance or interactivity issue.
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|
As these fixes are not as obvious and have a higher risk of a subtle
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|
regression they should only be submitted by a distribution kernel
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|
maintainer and include an addendum linking to a bugzilla entry if it
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|
exists and additional information on the user-visible impact.
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- New device IDs and quirks are also accepted.
|
- New device IDs and quirks are also accepted.
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- No "theoretical race condition" issues, unless an explanation of how the
|
- No "theoretical race condition" issues, unless an explanation of how the
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race can be exploited is also provided.
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race can be exploited is also provided.
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@@ -1,7 +1,7 @@
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VERSION = 3
|
VERSION = 3
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PATCHLEVEL = 5
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PATCHLEVEL = 5
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SUBLEVEL = 0
|
SUBLEVEL = 0
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EXTRAVERSION = -rc4
|
EXTRAVERSION = -rc5
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NAME = Saber-toothed Squirrel
|
NAME = Saber-toothed Squirrel
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|
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# *DOCUMENTATION*
|
# *DOCUMENTATION*
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@@ -212,7 +212,7 @@ config MACH_SMDKV310
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select EXYNOS_DEV_SYSMMU
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select EXYNOS_DEV_SYSMMU
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select EXYNOS4_DEV_AHCI
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select EXYNOS4_DEV_AHCI
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select SAMSUNG_DEV_KEYPAD
|
select SAMSUNG_DEV_KEYPAD
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select EXYNOS4_DEV_DMA
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select EXYNOS_DEV_DMA
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select SAMSUNG_DEV_PWM
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select SAMSUNG_DEV_PWM
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select EXYNOS4_DEV_USB_OHCI
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select EXYNOS4_DEV_USB_OHCI
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select EXYNOS4_SETUP_FIMD0
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select EXYNOS4_SETUP_FIMD0
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@@ -264,7 +264,7 @@ config MACH_UNIVERSAL_C210
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select S5P_DEV_ONENAND
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select S5P_DEV_ONENAND
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select S5P_DEV_TV
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select S5P_DEV_TV
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select EXYNOS_DEV_SYSMMU
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select EXYNOS_DEV_SYSMMU
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select EXYNOS4_DEV_DMA
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select EXYNOS_DEV_DMA
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select EXYNOS_DEV_DRM
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select EXYNOS_DEV_DRM
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select EXYNOS4_SETUP_FIMD0
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select EXYNOS4_SETUP_FIMD0
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select EXYNOS4_SETUP_I2C1
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select EXYNOS4_SETUP_I2C1
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@@ -303,7 +303,7 @@ config MACH_NURI
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select S5P_DEV_MFC
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select S5P_DEV_MFC
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select S5P_DEV_USB_EHCI
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select S5P_DEV_USB_EHCI
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select S5P_SETUP_MIPIPHY
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select S5P_SETUP_MIPIPHY
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select EXYNOS4_DEV_DMA
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select EXYNOS_DEV_DMA
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select EXYNOS_DEV_DRM
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select EXYNOS_DEV_DRM
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select EXYNOS4_SETUP_FIMC
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select EXYNOS4_SETUP_FIMC
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select EXYNOS4_SETUP_FIMD0
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select EXYNOS4_SETUP_FIMD0
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@@ -341,7 +341,7 @@ config MACH_ORIGEN
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select SAMSUNG_DEV_PWM
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select SAMSUNG_DEV_PWM
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select EXYNOS_DEV_DRM
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select EXYNOS_DEV_DRM
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select EXYNOS_DEV_SYSMMU
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select EXYNOS_DEV_SYSMMU
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select EXYNOS4_DEV_DMA
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select EXYNOS_DEV_DMA
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select EXYNOS4_DEV_USB_OHCI
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select EXYNOS4_DEV_USB_OHCI
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select EXYNOS4_SETUP_FIMD0
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select EXYNOS4_SETUP_FIMD0
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select EXYNOS4_SETUP_SDHCI
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select EXYNOS4_SETUP_SDHCI
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@@ -152,13 +152,14 @@ enum mx6q_clks {
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ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
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ssi2, ssi3, uart_ipg, uart_serial, usboh3, usdhc1, usdhc2, usdhc3,
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usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
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usdhc4, vdo_axi, vpu_axi, cko1, pll1_sys, pll2_bus, pll3_usb_otg,
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pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
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pll4_audio, pll5_video, pll6_mlb, pll7_usb_host, pll8_enet, ssi1_ipg,
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ssi2_ipg, ssi3_ipg, clk_max
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ssi2_ipg, ssi3_ipg, rom,
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|
clk_max
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};
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};
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static struct clk *clk[clk_max];
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static struct clk *clk[clk_max];
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|
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static enum mx6q_clks const clks_init_on[] __initconst = {
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static enum mx6q_clks const clks_init_on[] __initconst = {
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mmdc_ch0_axi, mmdc_ch1_axi,
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mmdc_ch0_axi, rom,
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};
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};
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|
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int __init mx6q_clocks_init(void)
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int __init mx6q_clocks_init(void)
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@@ -364,6 +365,7 @@ int __init mx6q_clocks_init(void)
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clk[gpmi_bch] = imx_clk_gate2("gpmi_bch", "usdhc4", base + 0x78, 26);
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clk[gpmi_bch] = imx_clk_gate2("gpmi_bch", "usdhc4", base + 0x78, 26);
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clk[gpmi_io] = imx_clk_gate2("gpmi_io", "enfc", base + 0x78, 28);
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clk[gpmi_io] = imx_clk_gate2("gpmi_io", "enfc", base + 0x78, 28);
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clk[gpmi_apb] = imx_clk_gate2("gpmi_apb", "usdhc3", base + 0x78, 30);
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clk[gpmi_apb] = imx_clk_gate2("gpmi_apb", "usdhc3", base + 0x78, 30);
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|
clk[rom] = imx_clk_gate2("rom", "ahb", base + 0x7c, 0);
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clk[sata] = imx_clk_gate2("sata", "ipg", base + 0x7c, 4);
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clk[sata] = imx_clk_gate2("sata", "ipg", base + 0x7c, 4);
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clk[sdma] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6);
|
clk[sdma] = imx_clk_gate2("sdma", "ahb", base + 0x7c, 6);
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||||||
clk[spba] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12);
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clk[spba] = imx_clk_gate2("spba", "ipg", base + 0x7c, 12);
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@@ -97,11 +97,6 @@ __init board_onenand_init(struct mtd_partition *onenand_parts,
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|
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||||||
gpmc_onenand_init(&board_onenand_data);
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gpmc_onenand_init(&board_onenand_data);
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}
|
}
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#else
|
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||||||
void
|
|
||||||
__init board_onenand_init(struct mtd_partition *nor_parts, u8 nr_parts, u8 cs)
|
|
||||||
{
|
|
||||||
}
|
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||||||
#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
|
#endif /* CONFIG_MTD_ONENAND_OMAP2 || CONFIG_MTD_ONENAND_OMAP2_MODULE */
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||||||
|
|
||||||
#if defined(CONFIG_MTD_NAND_OMAP2) || \
|
#if defined(CONFIG_MTD_NAND_OMAP2) || \
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||||||
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|||||||
@@ -3417,9 +3417,12 @@ int __init omap4xxx_clk_init(void)
|
|||||||
if (cpu_is_omap443x()) {
|
if (cpu_is_omap443x()) {
|
||||||
cpu_mask = RATE_IN_4430;
|
cpu_mask = RATE_IN_4430;
|
||||||
cpu_clkflg = CK_443X;
|
cpu_clkflg = CK_443X;
|
||||||
} else if (cpu_is_omap446x()) {
|
} else if (cpu_is_omap446x() || cpu_is_omap447x()) {
|
||||||
cpu_mask = RATE_IN_4460 | RATE_IN_4430;
|
cpu_mask = RATE_IN_4460 | RATE_IN_4430;
|
||||||
cpu_clkflg = CK_446X | CK_443X;
|
cpu_clkflg = CK_446X | CK_443X;
|
||||||
|
|
||||||
|
if (cpu_is_omap447x())
|
||||||
|
pr_warn("WARNING: OMAP4470 clock data incomplete!\n");
|
||||||
} else {
|
} else {
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
|
|||||||
@@ -779,6 +779,7 @@ DT_MACHINE_START(ARMADILLO800EVA_DT, "armadillo800eva")
|
|||||||
.init_irq = r8a7740_init_irq,
|
.init_irq = r8a7740_init_irq,
|
||||||
.handle_irq = shmobile_handle_irq_intc,
|
.handle_irq = shmobile_handle_irq_intc,
|
||||||
.init_machine = eva_init,
|
.init_machine = eva_init,
|
||||||
|
.init_late = shmobile_init_late,
|
||||||
.timer = &shmobile_timer,
|
.timer = &shmobile_timer,
|
||||||
.dt_compat = eva_boards_compat_dt,
|
.dt_compat = eva_boards_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|||||||
@@ -80,6 +80,7 @@ DT_MACHINE_START(KZM9D_DT, "kzm9d")
|
|||||||
.init_irq = emev2_init_irq,
|
.init_irq = emev2_init_irq,
|
||||||
.handle_irq = gic_handle_irq,
|
.handle_irq = gic_handle_irq,
|
||||||
.init_machine = kzm9d_add_standard_devices,
|
.init_machine = kzm9d_add_standard_devices,
|
||||||
|
.init_late = shmobile_init_late,
|
||||||
.timer = &shmobile_timer,
|
.timer = &shmobile_timer,
|
||||||
.dt_compat = kzm9d_boards_compat_dt,
|
.dt_compat = kzm9d_boards_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|||||||
@@ -455,6 +455,7 @@ DT_MACHINE_START(KZM9G_DT, "kzm9g")
|
|||||||
.init_irq = sh73a0_init_irq,
|
.init_irq = sh73a0_init_irq,
|
||||||
.handle_irq = gic_handle_irq,
|
.handle_irq = gic_handle_irq,
|
||||||
.init_machine = kzm_init,
|
.init_machine = kzm_init,
|
||||||
|
.init_late = shmobile_init_late,
|
||||||
.timer = &shmobile_timer,
|
.timer = &shmobile_timer,
|
||||||
.dt_compat = kzm9g_boards_compat_dt,
|
.dt_compat = kzm9g_boards_compat_dt,
|
||||||
MACHINE_END
|
MACHINE_END
|
||||||
|
|||||||
@@ -1512,6 +1512,9 @@ static void __init mackerel_init(void)
|
|||||||
gpio_request(GPIO_FN_SDHID0_1, NULL);
|
gpio_request(GPIO_FN_SDHID0_1, NULL);
|
||||||
gpio_request(GPIO_FN_SDHID0_0, NULL);
|
gpio_request(GPIO_FN_SDHID0_0, NULL);
|
||||||
|
|
||||||
|
/* SDHI0 PORT172 card-detect IRQ26 */
|
||||||
|
gpio_request(GPIO_FN_IRQ26_172, NULL);
|
||||||
|
|
||||||
#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
|
#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
|
||||||
/* enable SDHI1 */
|
/* enable SDHI1 */
|
||||||
gpio_request(GPIO_FN_SDHICMD1, NULL);
|
gpio_request(GPIO_FN_SDHICMD1, NULL);
|
||||||
|
|||||||
@@ -475,9 +475,9 @@ static struct clk *late_main_clks[] = {
|
|||||||
|
|
||||||
enum { MSTP001,
|
enum { MSTP001,
|
||||||
MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
|
MSTP129, MSTP128, MSTP127, MSTP126, MSTP125, MSTP118, MSTP116, MSTP100,
|
||||||
MSTP219,
|
MSTP219, MSTP218,
|
||||||
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
|
MSTP207, MSTP206, MSTP204, MSTP203, MSTP202, MSTP201, MSTP200,
|
||||||
MSTP331, MSTP329, MSTP325, MSTP323, MSTP318,
|
MSTP331, MSTP329, MSTP325, MSTP323,
|
||||||
MSTP314, MSTP313, MSTP312, MSTP311,
|
MSTP314, MSTP313, MSTP312, MSTP311,
|
||||||
MSTP303, MSTP302, MSTP301, MSTP300,
|
MSTP303, MSTP302, MSTP301, MSTP300,
|
||||||
MSTP411, MSTP410, MSTP403,
|
MSTP411, MSTP410, MSTP403,
|
||||||
@@ -497,6 +497,7 @@ static struct clk mstp_clks[MSTP_NR] = {
|
|||||||
[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
|
[MSTP116] = MSTP(&div4_clks[DIV4_HP], SMSTPCR1, 16, 0), /* IIC0 */
|
||||||
[MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
|
[MSTP100] = MSTP(&div4_clks[DIV4_B], SMSTPCR1, 0, 0), /* LCDC0 */
|
||||||
[MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
|
[MSTP219] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 19, 0), /* SCIFA7 */
|
||||||
|
[MSTP218] = MSTP(&div4_clks[DIV4_HP], SMSTPCR2, 18, 0), /* SY-DMAC */
|
||||||
[MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
|
[MSTP207] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 7, 0), /* SCIFA5 */
|
||||||
[MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
|
[MSTP206] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 6, 0), /* SCIFB */
|
||||||
[MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
|
[MSTP204] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR2, 4, 0), /* SCIFA0 */
|
||||||
@@ -508,7 +509,6 @@ static struct clk mstp_clks[MSTP_NR] = {
|
|||||||
[MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
|
[MSTP329] = MSTP(&r_clk, SMSTPCR3, 29, 0), /* CMT10 */
|
||||||
[MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
|
[MSTP325] = MSTP(&div6_clks[DIV6_SUB], SMSTPCR3, 25, 0), /* IrDA */
|
||||||
[MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
|
[MSTP323] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 23, 0), /* IIC1 */
|
||||||
[MSTP318] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 18, 0), /* SY-DMAC */
|
|
||||||
[MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */
|
[MSTP314] = MSTP(&div6_clks[DIV6_SDHI0], SMSTPCR3, 14, 0), /* SDHI0 */
|
||||||
[MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
|
[MSTP313] = MSTP(&div6_clks[DIV6_SDHI1], SMSTPCR3, 13, 0), /* SDHI1 */
|
||||||
[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
|
[MSTP312] = MSTP(&div4_clks[DIV4_HP], SMSTPCR3, 12, 0), /* MMCIF0 */
|
||||||
@@ -552,6 +552,7 @@ static struct clk_lookup lookups[] = {
|
|||||||
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
|
CLKDEV_DEV_ID("i2c-sh_mobile.0", &mstp_clks[MSTP116]), /* I2C0 */
|
||||||
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
|
CLKDEV_DEV_ID("sh_mobile_lcdc_fb.0", &mstp_clks[MSTP100]), /* LCDC0 */
|
||||||
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
|
CLKDEV_DEV_ID("sh-sci.7", &mstp_clks[MSTP219]), /* SCIFA7 */
|
||||||
|
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP218]), /* SY-DMAC */
|
||||||
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
|
CLKDEV_DEV_ID("sh-sci.5", &mstp_clks[MSTP207]), /* SCIFA5 */
|
||||||
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
|
CLKDEV_DEV_ID("sh-sci.8", &mstp_clks[MSTP206]), /* SCIFB */
|
||||||
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
|
CLKDEV_DEV_ID("sh-sci.0", &mstp_clks[MSTP204]), /* SCIFA0 */
|
||||||
@@ -563,7 +564,6 @@ static struct clk_lookup lookups[] = {
|
|||||||
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
|
CLKDEV_DEV_ID("sh_cmt.10", &mstp_clks[MSTP329]), /* CMT10 */
|
||||||
CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
|
CLKDEV_DEV_ID("sh_irda.0", &mstp_clks[MSTP325]), /* IrDA */
|
||||||
CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
|
CLKDEV_DEV_ID("i2c-sh_mobile.1", &mstp_clks[MSTP323]), /* I2C1 */
|
||||||
CLKDEV_DEV_ID("sh-dma-engine.0", &mstp_clks[MSTP318]), /* SY-DMAC */
|
|
||||||
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
|
CLKDEV_DEV_ID("sh_mobile_sdhi.0", &mstp_clks[MSTP314]), /* SDHI0 */
|
||||||
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
|
CLKDEV_DEV_ID("sh_mobile_sdhi.1", &mstp_clks[MSTP313]), /* SDHI1 */
|
||||||
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
|
CLKDEV_DEV_ID("sh_mmcif.0", &mstp_clks[MSTP312]), /* MMCIF0 */
|
||||||
|
|||||||
@@ -35,6 +35,9 @@
|
|||||||
#define INT2SMSKCR3 0xfe7822ac
|
#define INT2SMSKCR3 0xfe7822ac
|
||||||
#define INT2SMSKCR4 0xfe7822b0
|
#define INT2SMSKCR4 0xfe7822b0
|
||||||
|
|
||||||
|
#define INT2NTSR0 0xfe700060
|
||||||
|
#define INT2NTSR1 0xfe700064
|
||||||
|
|
||||||
static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
|
static int r8a7779_set_wake(struct irq_data *data, unsigned int on)
|
||||||
{
|
{
|
||||||
return 0; /* always allow wakeup */
|
return 0; /* always allow wakeup */
|
||||||
@@ -49,6 +52,10 @@ void __init r8a7779_init_irq(void)
|
|||||||
gic_init(0, 29, gic_dist_base, gic_cpu_base);
|
gic_init(0, 29, gic_dist_base, gic_cpu_base);
|
||||||
gic_arch_extn.irq_set_wake = r8a7779_set_wake;
|
gic_arch_extn.irq_set_wake = r8a7779_set_wake;
|
||||||
|
|
||||||
|
/* route all interrupts to ARM */
|
||||||
|
__raw_writel(0xffffffff, INT2NTSR0);
|
||||||
|
__raw_writel(0x3fffffff, INT2NTSR1);
|
||||||
|
|
||||||
/* unmask all known interrupts in INTCS2 */
|
/* unmask all known interrupts in INTCS2 */
|
||||||
__raw_writel(0xfffffff0, INT2SMSKCR0);
|
__raw_writel(0xfffffff0, INT2SMSKCR0);
|
||||||
__raw_writel(0xfff7ffff, INT2SMSKCR1);
|
__raw_writel(0xfff7ffff, INT2SMSKCR1);
|
||||||
|
|||||||
@@ -25,7 +25,12 @@
|
|||||||
#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \
|
#define is_sh73a0() (machine_is_ag5evm() || machine_is_kota2() || \
|
||||||
of_machine_is_compatible("renesas,sh73a0"))
|
of_machine_is_compatible("renesas,sh73a0"))
|
||||||
#define is_r8a7779() machine_is_marzen()
|
#define is_r8a7779() machine_is_marzen()
|
||||||
|
|
||||||
|
#ifdef CONFIG_ARCH_EMEV2
|
||||||
#define is_emev2() of_machine_is_compatible("renesas,emev2")
|
#define is_emev2() of_machine_is_compatible("renesas,emev2")
|
||||||
|
#else
|
||||||
|
#define is_emev2() (0)
|
||||||
|
#endif
|
||||||
|
|
||||||
static unsigned int __init shmobile_smp_get_core_count(void)
|
static unsigned int __init shmobile_smp_get_core_count(void)
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -484,7 +484,7 @@ static const struct sh_dmae_slave_config sh7372_dmae_slaves[] = {
|
|||||||
},
|
},
|
||||||
};
|
};
|
||||||
|
|
||||||
#define SH7372_CHCLR 0x220
|
#define SH7372_CHCLR (0x220 - 0x20)
|
||||||
|
|
||||||
static const struct sh_dmae_channel sh7372_dmae_channels[] = {
|
static const struct sh_dmae_channel sh7372_dmae_channels[] = {
|
||||||
{
|
{
|
||||||
|
|||||||
@@ -1067,7 +1067,7 @@ static struct page **__iommu_alloc_buffer(struct device *dev, size_t size, gfp_t
|
|||||||
return NULL;
|
return NULL;
|
||||||
|
|
||||||
while (count) {
|
while (count) {
|
||||||
int j, order = __ffs(count);
|
int j, order = __fls(count);
|
||||||
|
|
||||||
pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
|
pages[i] = alloc_pages(gfp | __GFP_NOWARN, order);
|
||||||
while (!pages[i] && order)
|
while (!pages[i] && order)
|
||||||
|
|||||||
@@ -23,6 +23,7 @@
|
|||||||
#ifndef __MACH_MX2_CAM_H_
|
#ifndef __MACH_MX2_CAM_H_
|
||||||
#define __MACH_MX2_CAM_H_
|
#define __MACH_MX2_CAM_H_
|
||||||
|
|
||||||
|
#define MX2_CAMERA_SWAP16 (1 << 0)
|
||||||
#define MX2_CAMERA_EXT_VSYNC (1 << 1)
|
#define MX2_CAMERA_EXT_VSYNC (1 << 1)
|
||||||
#define MX2_CAMERA_CCIR (1 << 2)
|
#define MX2_CAMERA_CCIR (1 << 2)
|
||||||
#define MX2_CAMERA_CCIR_INTERLACE (1 << 3)
|
#define MX2_CAMERA_CCIR_INTERLACE (1 << 3)
|
||||||
@@ -30,6 +31,7 @@
|
|||||||
#define MX2_CAMERA_GATED_CLOCK (1 << 5)
|
#define MX2_CAMERA_GATED_CLOCK (1 << 5)
|
||||||
#define MX2_CAMERA_INV_DATA (1 << 6)
|
#define MX2_CAMERA_INV_DATA (1 << 6)
|
||||||
#define MX2_CAMERA_PCLK_SAMPLE_RISING (1 << 7)
|
#define MX2_CAMERA_PCLK_SAMPLE_RISING (1 << 7)
|
||||||
|
#define MX2_CAMERA_PACK_DIR_MSB (1 << 8)
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* struct mx2_camera_platform_data - optional platform data for mx2_camera
|
* struct mx2_camera_platform_data - optional platform data for mx2_camera
|
||||||
|
|||||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user