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avr32: Generic clockevents support
This combines three patches from David Brownell: * avr32: tclib support * avr32: simplify clocksources * avr32: Turn count/compare into a oneshot clockevent device Register both TC blocks (instead of just the first one) so that the AT32/AT91 tclib code will pick them up (instead of just the avr32-only PIT-style clocksource). Rename the first one and its resources appropriately. More cleanups to the cycle counter clocksource code - Disable all the weak symbol magic; remove the AVR32-only TCB-based clocksource code (source and header). - Mark the __init code properly. - Don't forget to report IRQF_TIMER. - Make the system work properly with this clocksource, by preventing use of the CPU "idle" sleep state in the idle loop when it's used. Package the avr32 count/compare timekeeping support as a oneshot clockevent device, so it supports NO_HZ and high res timers. This means it also supports plugging in other clockevent devices and clocksources. Signed-off-by: David Brownell <dbrownell@users.sourceforge.net> Signed-off-by: Haavard Skinnemoen <hskinnemoen@atmel.com>
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Haavard Skinnemoen
parent
7e59128f31
commit
e723ff666a
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/*
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* Copyright (C) 2007 Atmel Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#ifndef _ASM_AVR32_ARCH_AT32AP_TIME_H
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#define _ASM_AVR32_ARCH_AT32AP_TIME_H
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#include <linux/platform_device.h>
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extern struct irqaction timer_irqaction;
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extern struct platform_device at32_systc0_device;
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extern void local_timer_interrupt(int irq, void *dev_id);
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#define TIMER_BCR 0x000000c0
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#define TIMER_BCR_SYNC 0
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#define TIMER_BMR 0x000000c4
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#define TIMER_BMR_TC0XC0S 0
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#define TIMER_BMR_TC1XC1S 2
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#define TIMER_BMR_TC2XC2S 4
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#define TIMER_CCR 0x00000000
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#define TIMER_CCR_CLKDIS 1
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#define TIMER_CCR_CLKEN 0
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#define TIMER_CCR_SWTRG 2
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#define TIMER_CMR 0x00000004
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#define TIMER_CMR_ABETRG 10
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#define TIMER_CMR_ACPA 16
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#define TIMER_CMR_ACPC 18
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#define TIMER_CMR_AEEVT 20
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#define TIMER_CMR_ASWTRG 22
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#define TIMER_CMR_BCPB 24
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#define TIMER_CMR_BCPC 26
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#define TIMER_CMR_BEEVT 28
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#define TIMER_CMR_BSWTRG 30
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#define TIMER_CMR_BURST 4
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#define TIMER_CMR_CLKI 3
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#define TIMER_CMR_CPCDIS 7
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#define TIMER_CMR_CPCSTOP 6
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#define TIMER_CMR_CPCTRG 14
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#define TIMER_CMR_EEVT 10
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#define TIMER_CMR_EEVTEDG 8
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#define TIMER_CMR_ENETRG 12
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#define TIMER_CMR_ETRGEDG 8
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#define TIMER_CMR_LDBDIS 7
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#define TIMER_CMR_LDBSTOP 6
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#define TIMER_CMR_LDRA 16
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#define TIMER_CMR_LDRB 18
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#define TIMER_CMR_TCCLKS 0
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#define TIMER_CMR_WAVE 15
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#define TIMER_CMR_WAVSEL 13
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#define TIMER_CV 0x00000010
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#define TIMER_CV_CV 0
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#define TIMER_IDR 0x00000028
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#define TIMER_IDR_COVFS 0
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#define TIMER_IDR_CPAS 2
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#define TIMER_IDR_CPBS 3
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#define TIMER_IDR_CPCS 4
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#define TIMER_IDR_ETRGS 7
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#define TIMER_IDR_LDRAS 5
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#define TIMER_IDR_LDRBS 6
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#define TIMER_IDR_LOVRS 1
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#define TIMER_IER 0x00000024
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#define TIMER_IER_COVFS 0
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#define TIMER_IER_CPAS 2
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#define TIMER_IER_CPBS 3
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#define TIMER_IER_CPCS 4
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#define TIMER_IER_ETRGS 7
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#define TIMER_IER_LDRAS 5
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#define TIMER_IER_LDRBS 6
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#define TIMER_IER_LOVRS 1
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#define TIMER_IMR 0x0000002c
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#define TIMER_IMR_COVFS 0
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#define TIMER_IMR_CPAS 2
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#define TIMER_IMR_CPBS 3
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#define TIMER_IMR_CPCS 4
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#define TIMER_IMR_ETRGS 7
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#define TIMER_IMR_LDRAS 5
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#define TIMER_IMR_LDRBS 6
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#define TIMER_IMR_LOVRS 1
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#define TIMER_RA 0x00000014
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#define TIMER_RA_RA 0
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#define TIMER_RB 0x00000018
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#define TIMER_RB_RB 0
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#define TIMER_RC 0x0000001c
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#define TIMER_RC_RC 0
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#define TIMER_SR 0x00000020
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#define TIMER_SR_CLKSTA 16
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#define TIMER_SR_COVFS 0
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#define TIMER_SR_CPAS 2
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#define TIMER_SR_CPBS 3
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#define TIMER_SR_CPCS 4
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#define TIMER_SR_ETRGS 7
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#define TIMER_SR_LDRAS 5
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#define TIMER_SR_LDRBS 6
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#define TIMER_SR_LOVRS 1
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#define TIMER_SR_MTIOA 17
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#define TIMER_SR_MTIOB 18
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/* Bit manipulation macros */
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#define TIMER_BIT(name) (1 << TIMER_##name)
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#define TIMER_BF(name,value) ((value) << TIMER_##name)
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/* Register access macros */
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#define timer_read(port,instance,reg) \
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__raw_readl(port + (0x40 * instance) + TIMER_##reg)
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#define timer_write(port,instance,reg,value) \
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__raw_writel((value), port + (0x40 * instance) + TIMER_##reg)
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#endif /* _ASM_AVR32_ARCH_AT32AP_TIME_H */
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