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Support the MIPS32 / MIPS64 DSP ASE.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
@@ -280,6 +280,11 @@
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#define ST0_IL (_ULCAST_(1) << 23)
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#define ST0_DL (_ULCAST_(1) << 24)
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/*
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* Enable the MIPS DSP ASE
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*/
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#define ST0_MX 0x01000000
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/*
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* Bitfields in the TX39 family CP0 Configuration Register 3
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*/
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@@ -510,6 +515,7 @@
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#define MIPS_CONF3_VINT (_ULCAST_(1) << 5)
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#define MIPS_CONF3_VEIC (_ULCAST_(1) << 6)
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#define MIPS_CONF3_LPA (_ULCAST_(1) << 7)
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#define MIPS_CONF3_DSP (_ULCAST_(1) << 10)
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/*
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* Bits in the MIPS32/64 coprocessor 1 (FPU) revision register.
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@@ -986,6 +992,287 @@ do { \
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: "=r" (__res)); \
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__res;})
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#define rddsp(mask) \
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({ \
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unsigned int __res; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" # rddsp $1, %x1 \n" \
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" .word 0x7c000cb8 | (%x1 << 16) \n" \
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" move %0, $1 \n" \
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" .set pop \n" \
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: "=r" (__res) \
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: "i" (mask)); \
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__res; \
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})
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#define wrdsp(val, mask) \
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do { \
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unsigned int __res; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" move $1, %0 \n" \
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" # wrdsp $1, %x1 \n" \
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" .word 0x7c2004f8 | (%x1 << 15) \n" \
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" .set pop \n" \
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: \
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: "r" (val), "i" (mask)); \
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__res; \
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} while (0)
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#if 0 /* Need DSP ASE capable assembler ... */
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#define mflo0() ({ long mflo0; __asm__("mflo %0, $ac0" : "=r" (mflo0)); mflo0;})
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#define mflo1() ({ long mflo1; __asm__("mflo %0, $ac1" : "=r" (mflo1)); mflo1;})
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#define mflo2() ({ long mflo2; __asm__("mflo %0, $ac2" : "=r" (mflo2)); mflo2;})
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#define mflo3() ({ long mflo3; __asm__("mflo %0, $ac3" : "=r" (mflo3)); mflo3;})
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#define mfhi0() ({ long mfhi0; __asm__("mfhi %0, $ac0" : "=r" (mfhi0)); mfhi0;})
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#define mfhi1() ({ long mfhi1; __asm__("mfhi %0, $ac1" : "=r" (mfhi1)); mfhi1;})
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#define mfhi2() ({ long mfhi2; __asm__("mfhi %0, $ac2" : "=r" (mfhi2)); mfhi2;})
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#define mfhi3() ({ long mfhi3; __asm__("mfhi %0, $ac3" : "=r" (mfhi3)); mfhi3;})
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#define mtlo0(x) __asm__("mtlo %0, $ac0" ::"r" (x))
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#define mtlo1(x) __asm__("mtlo %0, $ac1" ::"r" (x))
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#define mtlo2(x) __asm__("mtlo %0, $ac2" ::"r" (x))
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#define mtlo3(x) __asm__("mtlo %0, $ac3" ::"r" (x))
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#define mthi0(x) __asm__("mthi %0, $ac0" ::"r" (x))
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#define mthi1(x) __asm__("mthi %0, $ac1" ::"r" (x))
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#define mthi2(x) __asm__("mthi %0, $ac2" ::"r" (x))
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#define mthi3(x) __asm__("mthi %0, $ac3" ::"r" (x))
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#else
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#define mfhi0() \
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({ \
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unsigned long __treg; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" # mfhi %0, $ac0 \n" \
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" .word 0x00000810 \n" \
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" move %0, $1 \n" \
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" .set pop \n" \
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: "=r" (__treg)); \
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__treg; \
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})
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#define mfhi1() \
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({ \
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unsigned long __treg; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" # mfhi %0, $ac1 \n" \
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" .word 0x00200810 \n" \
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" move %0, $1 \n" \
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" .set pop \n" \
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: "=r" (__treg)); \
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__treg; \
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})
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#define mfhi2() \
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({ \
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unsigned long __treg; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" # mfhi %0, $ac2 \n" \
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" .word 0x00400810 \n" \
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" move %0, $1 \n" \
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" .set pop \n" \
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: "=r" (__treg)); \
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__treg; \
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})
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#define mfhi3() \
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({ \
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unsigned long __treg; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" # mfhi %0, $ac3 \n" \
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" .word 0x00600810 \n" \
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" move %0, $1 \n" \
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" .set pop \n" \
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: "=r" (__treg)); \
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__treg; \
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})
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#define mflo0() \
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({ \
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unsigned long __treg; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" # mflo %0, $ac0 \n" \
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" .word 0x00000812 \n" \
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" move %0, $1 \n" \
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" .set pop \n" \
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: "=r" (__treg)); \
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__treg; \
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})
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#define mflo1() \
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({ \
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unsigned long __treg; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" # mflo %0, $ac1 \n" \
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" .word 0x00200812 \n" \
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" move %0, $1 \n" \
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" .set pop \n" \
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: "=r" (__treg)); \
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__treg; \
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})
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#define mflo2() \
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({ \
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unsigned long __treg; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" # mflo %0, $ac2 \n" \
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" .word 0x00400812 \n" \
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" move %0, $1 \n" \
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" .set pop \n" \
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: "=r" (__treg)); \
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__treg; \
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})
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#define mflo3() \
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({ \
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unsigned long __treg; \
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\
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" # mflo %0, $ac3 \n" \
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" .word 0x00600812 \n" \
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" move %0, $1 \n" \
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" .set pop \n" \
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: "=r" (__treg)); \
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__treg; \
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})
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#define mthi0(x) \
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do { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" move $1, %0 \n" \
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" # mthi $1, $ac0 \n" \
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" .word 0x00200011 \n" \
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" .set pop \n" \
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: \
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: "r" (x)); \
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} while (0)
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#define mthi1(x) \
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do { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" move $1, %0 \n" \
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" # mthi $1, $ac1 \n" \
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" .word 0x00200811 \n" \
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" .set pop \n" \
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: \
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: "r" (x)); \
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} while (0)
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#define mthi2(x) \
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do { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" move $1, %0 \n" \
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" # mthi $1, $ac2 \n" \
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" .word 0x00201011 \n" \
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" .set pop \n" \
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: \
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: "r" (x)); \
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} while (0)
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#define mthi3(x) \
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do { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" move $1, %0 \n" \
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" # mthi $1, $ac3 \n" \
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" .word 0x00201811 \n" \
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" .set pop \n" \
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: \
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: "r" (x)); \
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} while (0)
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#define mtlo0(x) \
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do { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" move $1, %0 \n" \
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" # mtlo $1, $ac0 \n" \
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" .word 0x00200013 \n" \
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" .set pop \n" \
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: \
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: "r" (x)); \
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} while (0)
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#define mtlo1(x) \
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do { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" move $1, %0 \n" \
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" # mtlo $1, $ac1 \n" \
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" .word 0x00200813 \n" \
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" .set pop \n" \
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: \
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: "r" (x)); \
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} while (0)
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#define mtlo2(x) \
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do { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" move $1, %0 \n" \
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" # mtlo $1, $ac2 \n" \
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" .word 0x00201013 \n" \
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" .set pop \n" \
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: \
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: "r" (x)); \
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} while (0)
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#define mtlo3(x) \
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do { \
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__asm__ __volatile__( \
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" .set push \n" \
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" .set noat \n" \
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" move $1, %0 \n" \
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" # mtlo $1, $ac3 \n" \
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" .word 0x00201813 \n" \
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" .set pop \n" \
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: \
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: "r" (x)); \
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} while (0)
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#endif
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/*
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* TLB operations.
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*
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