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Merge tag 'dma-mapping-4.15' of git://git.infradead.org/users/hch/dma-mapping
Pull dma-mapping updates from Christoph Hellwig: - turn dma_cache_sync into a dma_map_ops instance and remove implementation that purely are dead because the architecture doesn't support noncoherent allocations - add a flag for busses that need DMA configuration (Robin Murphy) * tag 'dma-mapping-4.15' of git://git.infradead.org/users/hch/dma-mapping: dma-mapping: turn dma_cache_sync into a dma_map_ops method sh: make dma_cache_sync a no-op xtensa: make dma_cache_sync a no-op unicore32: make dma_cache_sync a no-op powerpc: make dma_cache_sync a no-op mn10300: make dma_cache_sync a no-op microblaze: make dma_cache_sync a no-op ia64: make dma_cache_sync a no-op frv: make dma_cache_sync a no-op x86: make dma_cache_sync a no-op floppy: consolidate the dummy fd_cacheflush definition drivers: flag buses which demand DMA configuration
This commit is contained in:
@@ -9,6 +9,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return dma_ops;
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}
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#define dma_cache_sync(dev, va, size, dir) ((void)0)
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#endif /* _ALPHA_DMA_MAPPING_H */
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@@ -24,7 +24,6 @@
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#define fd_set_dma_count(count) set_dma_count(FLOPPY_DMA,count)
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#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
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#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
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#define fd_cacheflush(addr,size) /* nothing */
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#define fd_request_irq() request_irq(FLOPPY_IRQ, floppy_interrupt,\
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0, "floppy", NULL)
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#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL)
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@@ -62,7 +61,6 @@ alpha_fd_dma_setup(char *addr, unsigned long size, int mode, int io)
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prev_dir = dir;
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fd_clear_dma_ff();
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fd_cacheflush(addr, size);
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fd_set_dma_mode(mode);
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set_dma_addr(FLOPPY_DMA, bus_addr);
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fd_set_dma_count(size);
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@@ -17,10 +17,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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}
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#endif
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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}
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#endif
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@@ -15,11 +15,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return &frv_dma_ops;
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}
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static inline
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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flush_write_buffers();
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}
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#endif /* _ASM_DMA_MAPPING_H */
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@@ -37,9 +37,6 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return dma_ops;
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}
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extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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{
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if (!dev->dma_mask)
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@@ -45,15 +45,4 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
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return daddr;
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}
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static inline void
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dma_cache_sync (struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction dir)
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{
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/*
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* IA-64 is cache-coherent, so this is mostly a no-op. However, we do need to
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* ensure that dma_cache_sync() enforces order, hence the mb().
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*/
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mb();
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}
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#endif /* _ASM_IA64_DMA_MAPPING_H */
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@@ -14,11 +14,6 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return &dma_noop_ops;
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}
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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}
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static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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{
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if (!dev->dma_mask)
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@@ -9,10 +9,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return &m68k_dma_ops;
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}
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction dir)
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{
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/* we use coherent allocation, so not much to do here. */
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}
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#endif /* _M68K_DMA_MAPPING_H */
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@@ -9,14 +9,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return &metag_dma_ops;
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}
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/*
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* dma_alloc_attrs() always returns non-cacheable memory, so there's no need to
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* do any flushing here.
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*/
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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}
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#endif
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@@ -15,22 +15,6 @@
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#ifndef _ASM_MICROBLAZE_DMA_MAPPING_H
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#define _ASM_MICROBLAZE_DMA_MAPPING_H
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/*
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* See Documentation/DMA-API-HOWTO.txt and
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* Documentation/DMA-API.txt for documentation.
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*/
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#include <linux/types.h>
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#include <linux/cache.h>
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#include <linux/mm.h>
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#include <linux/scatterlist.h>
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#include <linux/dma-debug.h>
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#include <asm/io.h>
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#include <asm/cacheflush.h>
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#define __dma_alloc_coherent(dev, gfp, size, handle) NULL
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#define __dma_free_coherent(size, addr) ((void)0)
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/*
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* Available generic sets of operations
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*/
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@@ -41,27 +25,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return &dma_direct_ops;
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}
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static inline void __dma_sync(unsigned long paddr,
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size_t size, enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_TO_DEVICE:
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case DMA_BIDIRECTIONAL:
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flush_dcache_range(paddr, paddr + size);
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break;
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case DMA_FROM_DEVICE:
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invalidate_dcache_range(paddr, paddr + size);
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break;
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default:
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BUG();
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}
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}
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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__dma_sync(virt_to_phys(vaddr), size, (int)direction);
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}
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#endif /* _ASM_MICROBLAZE_DMA_MAPPING_H */
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@@ -13,6 +13,7 @@
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#include <linux/dma-debug.h>
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#include <linux/export.h>
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#include <linux/bug.h>
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#include <asm/cacheflush.h>
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#define NOT_COHERENT_CACHE
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@@ -52,6 +53,22 @@ static void dma_direct_free_coherent(struct device *dev, size_t size,
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#endif
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}
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static inline void __dma_sync(unsigned long paddr,
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size_t size, enum dma_data_direction direction)
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{
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switch (direction) {
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case DMA_TO_DEVICE:
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case DMA_BIDIRECTIONAL:
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flush_dcache_range(paddr, paddr + size);
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break;
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case DMA_FROM_DEVICE:
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invalidate_dcache_range(paddr, paddr + size);
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break;
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default:
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BUG();
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}
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}
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static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
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int nents, enum dma_data_direction direction,
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unsigned long attrs)
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@@ -27,9 +27,6 @@ static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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static inline void dma_mark_clean(void *addr, size_t size) {}
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extern void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction);
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#define arch_setup_dma_ops arch_setup_dma_ops
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static inline void arch_setup_dma_ops(struct device *dev, u64 dma_base,
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u64 size, const struct iommu_ops *iommu,
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@@ -383,7 +383,7 @@ static int mips_dma_supported(struct device *dev, u64 mask)
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return plat_dma_supported(dev, mask);
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}
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void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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static void mips_dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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@@ -392,8 +392,6 @@ void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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__dma_sync_virtual(vaddr, size, direction);
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}
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EXPORT_SYMBOL(dma_cache_sync);
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static const struct dma_map_ops mips_default_dma_map_ops = {
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.alloc = mips_dma_alloc_coherent,
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.free = mips_dma_free_coherent,
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@@ -407,7 +405,8 @@ static const struct dma_map_ops mips_default_dma_map_ops = {
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.sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
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.sync_sg_for_device = mips_dma_sync_sg_for_device,
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.mapping_error = mips_dma_mapping_error,
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.dma_supported = mips_dma_supported
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.dma_supported = mips_dma_supported,
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.cache_sync = mips_dma_cache_sync,
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};
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const struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
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@@ -11,9 +11,6 @@
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#ifndef _ASM_DMA_MAPPING_H
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#define _ASM_DMA_MAPPING_H
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#include <asm/cache.h>
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#include <asm/io.h>
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extern const struct dma_map_ops mn10300_dma_ops;
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static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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@@ -21,11 +18,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return &mn10300_dma_ops;
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}
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static inline
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void dma_cache_sync(void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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mn10300_dcache_flush_inv();
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}
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#endif
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@@ -17,13 +17,4 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return &nios2_dma_ops;
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}
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/*
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* dma_alloc_attrs() always returns non-cacheable memory, so there's no need to
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* do any flushing here.
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*/
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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}
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#endif /* _ASM_NIOS2_DMA_MAPPING_H */
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@@ -33,14 +33,6 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return hppa_dma_ops;
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}
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static inline void
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dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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if (hppa_dma_ops->sync_single_for_cpu)
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flush_kernel_dcache_range((unsigned long)vaddr, size);
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}
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static inline void *
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parisc_walk_tree(struct device *dev)
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{
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@@ -572,6 +572,12 @@ static void pa11_dma_sync_sg_for_device(struct device *dev, struct scatterlist *
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flush_kernel_vmap_range(sg_virt(sg), sg->length);
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}
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static void pa11_dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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flush_kernel_dcache_range((unsigned long)vaddr, size);
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}
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const struct dma_map_ops pcxl_dma_ops = {
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.dma_supported = pa11_dma_supported,
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.alloc = pa11_dma_alloc,
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@@ -584,6 +590,7 @@ const struct dma_map_ops pcxl_dma_ops = {
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.sync_single_for_device = pa11_dma_sync_single_for_device,
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.sync_sg_for_cpu = pa11_dma_sync_sg_for_cpu,
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.sync_sg_for_device = pa11_dma_sync_sg_for_device,
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.cache_sync = pa11_dma_cache_sync,
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};
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static void *pcx_dma_alloc(struct device *dev, size_t size,
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@@ -620,4 +627,5 @@ const struct dma_map_ops pcx_dma_ops = {
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.sync_single_for_device = pa11_dma_sync_single_for_device,
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.sync_sg_for_cpu = pa11_dma_sync_sg_for_cpu,
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.sync_sg_for_device = pa11_dma_sync_sg_for_device,
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.cache_sync = pa11_dma_cache_sync,
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};
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@@ -142,12 +142,5 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
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#define ARCH_HAS_DMA_MMAP_COHERENT
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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BUG_ON(direction == DMA_NONE);
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__dma_sync(vaddr, size, (int)direction);
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_DMA_MAPPING_H */
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@@ -25,7 +25,6 @@
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#define fd_get_dma_residue() fd_ops->_get_dma_residue(FLOPPY_DMA)
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#define fd_enable_irq() enable_irq(FLOPPY_IRQ)
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#define fd_disable_irq() disable_irq(FLOPPY_IRQ)
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#define fd_cacheflush(addr,size) /* nothing */
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#define fd_free_irq() free_irq(FLOPPY_IRQ, NULL);
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#include <linux/pci.h>
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@@ -152,7 +151,6 @@ static int hard_dma_setup(char *addr, unsigned long size, int mode, int io)
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prev_dir = dir;
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fd_clear_dma_ff();
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fd_cacheflush(addr, size);
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fd_set_dma_mode(mode);
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set_dma_addr(FLOPPY_DMA, bus_addr);
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fd_set_dma_count(size);
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@@ -16,11 +16,6 @@ static inline const struct dma_map_ops *get_arch_dma_ops(struct bus_type *bus)
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return &dma_noop_ops;
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}
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static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
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enum dma_data_direction direction)
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{
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}
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static inline bool dma_capable(struct device *dev, dma_addr_t addr, size_t size)
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{
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if (!dev->dma_mask)
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