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Merge commit 'dmaengine-3.13-v2' of git://git.kernel.org/pub/scm/linux/kernel/git/djbw/dmaengine
Pull dmaengine changes from Dan 1/ Bartlomiej and Dan finalized a rework of the dma address unmap implementation. 2/ In the course of testing 1/ a collection of enhancements to dmatest fell out. Notably basic performance statistics, and fixed / enhanced test control through new module parameters 'run', 'wait', 'noverify', and 'verbose'. Thanks to Andriy and Linus for their review. 3/ Testing the raid related corner cases of 1/ triggered bugs in the recently added 16-source operation support in the ioatdma driver. 4/ Some minor fixes / cleanups to mv_xor and ioatdma. Conflicts: drivers/dma/dmatest.c Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This commit is contained in:
Vinod Koul
+1
-269
@@ -801,218 +801,6 @@ static void ppc440spe_desc_set_link(struct ppc440spe_adma_chan *chan,
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local_irq_restore(flags);
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}
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/**
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* ppc440spe_desc_get_src_addr - extract the source address from the descriptor
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*/
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static u32 ppc440spe_desc_get_src_addr(struct ppc440spe_adma_desc_slot *desc,
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struct ppc440spe_adma_chan *chan, int src_idx)
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{
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struct dma_cdb *dma_hw_desc;
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struct xor_cb *xor_hw_desc;
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switch (chan->device->id) {
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case PPC440SPE_DMA0_ID:
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case PPC440SPE_DMA1_ID:
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dma_hw_desc = desc->hw_desc;
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/* May have 0, 1, 2, or 3 sources */
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switch (dma_hw_desc->opc) {
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case DMA_CDB_OPC_NO_OP:
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case DMA_CDB_OPC_DFILL128:
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return 0;
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case DMA_CDB_OPC_DCHECK128:
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if (unlikely(src_idx)) {
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printk(KERN_ERR "%s: try to get %d source for"
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" DCHECK128\n", __func__, src_idx);
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BUG();
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}
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return le32_to_cpu(dma_hw_desc->sg1l);
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case DMA_CDB_OPC_MULTICAST:
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case DMA_CDB_OPC_MV_SG1_SG2:
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if (unlikely(src_idx > 2)) {
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printk(KERN_ERR "%s: try to get %d source from"
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" DMA descr\n", __func__, src_idx);
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BUG();
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}
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if (src_idx) {
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if (le32_to_cpu(dma_hw_desc->sg1u) &
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DMA_CUED_XOR_WIN_MSK) {
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u8 region;
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if (src_idx == 1)
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return le32_to_cpu(
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dma_hw_desc->sg1l) +
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desc->unmap_len;
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region = (le32_to_cpu(
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dma_hw_desc->sg1u)) >>
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DMA_CUED_REGION_OFF;
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region &= DMA_CUED_REGION_MSK;
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switch (region) {
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case DMA_RXOR123:
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return le32_to_cpu(
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dma_hw_desc->sg1l) +
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(desc->unmap_len << 1);
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case DMA_RXOR124:
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return le32_to_cpu(
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dma_hw_desc->sg1l) +
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(desc->unmap_len * 3);
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case DMA_RXOR125:
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return le32_to_cpu(
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dma_hw_desc->sg1l) +
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(desc->unmap_len << 2);
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default:
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printk(KERN_ERR
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"%s: try to"
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" get src3 for region %02x"
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"PPC440SPE_DESC_RXOR12?\n",
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__func__, region);
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BUG();
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}
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} else {
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printk(KERN_ERR
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"%s: try to get %d"
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" source for non-cued descr\n",
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__func__, src_idx);
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BUG();
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}
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}
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return le32_to_cpu(dma_hw_desc->sg1l);
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default:
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printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
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__func__, dma_hw_desc->opc);
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BUG();
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}
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return le32_to_cpu(dma_hw_desc->sg1l);
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case PPC440SPE_XOR_ID:
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/* May have up to 16 sources */
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xor_hw_desc = desc->hw_desc;
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return xor_hw_desc->ops[src_idx].l;
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}
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return 0;
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}
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/**
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* ppc440spe_desc_get_dest_addr - extract the destination address from the
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* descriptor
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*/
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static u32 ppc440spe_desc_get_dest_addr(struct ppc440spe_adma_desc_slot *desc,
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struct ppc440spe_adma_chan *chan, int idx)
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{
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struct dma_cdb *dma_hw_desc;
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struct xor_cb *xor_hw_desc;
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switch (chan->device->id) {
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case PPC440SPE_DMA0_ID:
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case PPC440SPE_DMA1_ID:
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dma_hw_desc = desc->hw_desc;
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if (likely(!idx))
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return le32_to_cpu(dma_hw_desc->sg2l);
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return le32_to_cpu(dma_hw_desc->sg3l);
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case PPC440SPE_XOR_ID:
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xor_hw_desc = desc->hw_desc;
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return xor_hw_desc->cbtal;
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}
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return 0;
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}
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/**
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* ppc440spe_desc_get_src_num - extract the number of source addresses from
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* the descriptor
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*/
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static u32 ppc440spe_desc_get_src_num(struct ppc440spe_adma_desc_slot *desc,
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struct ppc440spe_adma_chan *chan)
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{
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struct dma_cdb *dma_hw_desc;
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struct xor_cb *xor_hw_desc;
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switch (chan->device->id) {
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case PPC440SPE_DMA0_ID:
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case PPC440SPE_DMA1_ID:
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dma_hw_desc = desc->hw_desc;
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switch (dma_hw_desc->opc) {
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case DMA_CDB_OPC_NO_OP:
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case DMA_CDB_OPC_DFILL128:
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return 0;
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case DMA_CDB_OPC_DCHECK128:
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return 1;
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case DMA_CDB_OPC_MV_SG1_SG2:
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case DMA_CDB_OPC_MULTICAST:
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/*
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* Only for RXOR operations we have more than
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* one source
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*/
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if (le32_to_cpu(dma_hw_desc->sg1u) &
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DMA_CUED_XOR_WIN_MSK) {
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/* RXOR op, there are 2 or 3 sources */
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if (((le32_to_cpu(dma_hw_desc->sg1u) >>
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DMA_CUED_REGION_OFF) &
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DMA_CUED_REGION_MSK) == DMA_RXOR12) {
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/* RXOR 1-2 */
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return 2;
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} else {
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/* RXOR 1-2-3/1-2-4/1-2-5 */
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return 3;
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}
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}
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return 1;
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default:
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printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
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__func__, dma_hw_desc->opc);
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BUG();
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}
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case PPC440SPE_XOR_ID:
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/* up to 16 sources */
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xor_hw_desc = desc->hw_desc;
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return xor_hw_desc->cbc & XOR_CDCR_OAC_MSK;
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default:
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BUG();
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}
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return 0;
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}
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/**
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* ppc440spe_desc_get_dst_num - get the number of destination addresses in
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* this descriptor
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*/
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static u32 ppc440spe_desc_get_dst_num(struct ppc440spe_adma_desc_slot *desc,
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struct ppc440spe_adma_chan *chan)
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{
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struct dma_cdb *dma_hw_desc;
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switch (chan->device->id) {
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case PPC440SPE_DMA0_ID:
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case PPC440SPE_DMA1_ID:
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/* May be 1 or 2 destinations */
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dma_hw_desc = desc->hw_desc;
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switch (dma_hw_desc->opc) {
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case DMA_CDB_OPC_NO_OP:
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case DMA_CDB_OPC_DCHECK128:
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return 0;
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case DMA_CDB_OPC_MV_SG1_SG2:
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case DMA_CDB_OPC_DFILL128:
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return 1;
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case DMA_CDB_OPC_MULTICAST:
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if (desc->dst_cnt == 2)
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return 2;
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else
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return 1;
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default:
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printk(KERN_ERR "%s: unknown OPC 0x%02x\n",
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__func__, dma_hw_desc->opc);
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BUG();
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}
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case PPC440SPE_XOR_ID:
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/* Always only 1 destination */
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return 1;
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default:
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BUG();
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}
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return 0;
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}
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/**
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* ppc440spe_desc_get_link - get the address of the descriptor that
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* follows this one
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@@ -1705,43 +1493,6 @@ static void ppc440spe_adma_free_slots(struct ppc440spe_adma_desc_slot *slot,
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}
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}
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static void ppc440spe_adma_unmap(struct ppc440spe_adma_chan *chan,
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struct ppc440spe_adma_desc_slot *desc)
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{
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u32 src_cnt, dst_cnt;
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dma_addr_t addr;
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/*
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* get the number of sources & destination
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* included in this descriptor and unmap
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* them all
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*/
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src_cnt = ppc440spe_desc_get_src_num(desc, chan);
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dst_cnt = ppc440spe_desc_get_dst_num(desc, chan);
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/* unmap destinations */
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if (!(desc->async_tx.flags & DMA_COMPL_SKIP_DEST_UNMAP)) {
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while (dst_cnt--) {
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addr = ppc440spe_desc_get_dest_addr(
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desc, chan, dst_cnt);
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dma_unmap_page(chan->device->dev,
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addr, desc->unmap_len,
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DMA_FROM_DEVICE);
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}
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}
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/* unmap sources */
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if (!(desc->async_tx.flags & DMA_COMPL_SKIP_SRC_UNMAP)) {
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while (src_cnt--) {
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addr = ppc440spe_desc_get_src_addr(
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desc, chan, src_cnt);
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dma_unmap_page(chan->device->dev,
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addr, desc->unmap_len,
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DMA_TO_DEVICE);
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}
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}
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}
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/**
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* ppc440spe_adma_run_tx_complete_actions - call functions to be called
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* upon completion
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@@ -1765,26 +1516,7 @@ static dma_cookie_t ppc440spe_adma_run_tx_complete_actions(
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desc->async_tx.callback(
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desc->async_tx.callback_param);
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/* unmap dma addresses
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* (unmap_single vs unmap_page?)
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*
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* actually, ppc's dma_unmap_page() functions are empty, so
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* the following code is just for the sake of completeness
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*/
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if (chan && chan->needs_unmap && desc->group_head &&
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desc->unmap_len) {
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struct ppc440spe_adma_desc_slot *unmap =
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desc->group_head;
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/* assume 1 slot per op always */
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u32 slot_count = unmap->slot_cnt;
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/* Run through the group list and unmap addresses */
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for (i = 0; i < slot_count; i++) {
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BUG_ON(!unmap);
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ppc440spe_adma_unmap(chan, unmap);
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unmap = unmap->hw_next;
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}
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}
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dma_descriptor_unmap(&desc->async_tx);
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}
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/* run dependent operations */
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