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igb: add counter for dma out of sync errors
Add a counter for dma out of sync errors reported via interrupt. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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committed by
David S. Miller
parent
2753f4cebf
commit
dda0e0834c
@@ -413,6 +413,7 @@
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/* LAN connected device generates an interrupt */
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#define E1000_ICR_PHYINT 0x00001000
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#define E1000_ICR_EPRST 0x00100000 /* ME handware reset occurs */
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#define E1000_ICR_DOUTSYNC 0x10000000 /* NIC DMA out of sync */
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/* Extended Interrupt Cause Read */
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#define E1000_EICR_RX_QUEUE0 0x00000001 /* Rx Queue 0 Interrupt */
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@@ -441,7 +442,8 @@
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E1000_IMS_TXDW | \
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E1000_IMS_RXDMT0 | \
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E1000_IMS_RXSEQ | \
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E1000_IMS_LSC)
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E1000_IMS_LSC | \
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E1000_IMS_DOUTSYNC)
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/* Interrupt Mask Set */
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#define E1000_IMS_TXDW E1000_ICR_TXDW /* Transmit desc written back */
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@@ -449,6 +451,7 @@
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#define E1000_IMS_RXSEQ E1000_ICR_RXSEQ /* rx sequence error */
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#define E1000_IMS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */
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#define E1000_IMS_RXT0 E1000_ICR_RXT0 /* rx timer intr */
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#define E1000_IMS_DOUTSYNC E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
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/* Extended Interrupt Mask Set */
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#define E1000_EIMS_TCP_TIMER E1000_EICR_TCP_TIMER /* TCP Timer */
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@@ -457,6 +460,7 @@
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/* Interrupt Cause Set */
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#define E1000_ICS_LSC E1000_ICR_LSC /* Link Status Change */
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#define E1000_ICS_RXDMT0 E1000_ICR_RXDMT0 /* rx desc min. threshold */
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#define E1000_ICS_DOUTSYNC E1000_ICR_DOUTSYNC /* NIC DMA out of sync */
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/* Extended Interrupt Cause Set */
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