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[POWERPC] spufs: rework class 0 and 1 interrupt handling

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Based on original patches from
 Arnd Bergmann <arnd.bergman@de.ibm.com>; and
 Luke Browning <lukebr@linux.vnet.ibm.com>

Currently, spu contexts need to be loaded to the SPU in order to take
class 0 and class 1 exceptions.

This change makes the actual interrupt-handlers much simpler (ie,
set the exception information in the context save area), and defers the
handling code to the spufs_handle_class[01] functions, called from
spufs_run_spu.

This should improve the concurrency of the spu scheduling leading to
greater SPU utilization when SPUs are overcommited.

Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
Jeremy Kerr
2007-12-20 16:39:59 +09:00
committed by Paul Mackerras
parent 8af30675c3
commit d6ad39bc53
8 changed files with 109 additions and 122 deletions
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include/asm-powerpc/spu_csa.h
+1 -1
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@@ -254,7 +254,7 @@ struct spu_state {
u64 spu_chnldata_RW[32];
u32 spu_mailbox_data[4];
u32 pu_mailbox_data[1];
u64 dar, dsisr;
u64 dar, dsisr, class_0_pending;
unsigned long suspend_time;
spinlock_t register_lock;
};