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Merge branch 'linus' into core/generic-dma-coherent
Conflicts: arch/x86/Kconfig Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
+3
-2
@@ -1,3 +1,6 @@
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# Top-level Makefile calls into asm-$(ARCH)
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# List only non-arch directories below
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header-y += asm-generic/
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header-y += linux/
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header-y += sound/
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@@ -5,5 +8,3 @@ header-y += mtd/
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header-y += rdma/
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header-y += video/
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header-y += drm/
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header-y += asm-$(ARCH)/
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@@ -24,8 +24,8 @@
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pci_unmap_sg(alpha_gendev_to_pci(dev), sg, nents, dir)
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#define dma_supported(dev, mask) \
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pci_dma_supported(alpha_gendev_to_pci(dev), mask)
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#define dma_mapping_error(addr) \
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pci_dma_mapping_error(addr)
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#define dma_mapping_error(dev, addr) \
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pci_dma_mapping_error(alpha_gendev_to_pci(dev), addr)
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#else /* no PCI - no IOMMU. */
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@@ -45,7 +45,7 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
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#define dma_unmap_page(dev, addr, size, dir) ((void)0)
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#define dma_unmap_sg(dev, sg, nents, dir) ((void)0)
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#define dma_mapping_error(addr) (0)
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#define dma_mapping_error(dev, addr) (0)
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#endif /* !CONFIG_PCI */
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@@ -1,44 +0,0 @@
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/*
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* linux/include/asm-alpha/ide.h
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*
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* Copyright (C) 1994-1996 Linus Torvalds & authors
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*/
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/*
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* This file contains the alpha architecture specific IDE code.
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*/
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#ifndef __ASMalpha_IDE_H
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#define __ASMalpha_IDE_H
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#ifdef __KERNEL__
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static inline int ide_default_irq(unsigned long base)
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{
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switch (base) {
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case 0x1f0: return 14;
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case 0x170: return 15;
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case 0x1e8: return 11;
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case 0x168: return 10;
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default:
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return 0;
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}
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}
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static inline unsigned long ide_default_io_base(int index)
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{
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switch (index) {
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case 0: return 0x1f0;
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case 1: return 0x170;
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case 2: return 0x1e8;
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case 3: return 0x168;
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default:
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return 0;
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}
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}
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#include <asm-generic/ide_iops.h>
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#endif /* __KERNEL__ */
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#endif /* __ASMalpha_IDE_H */
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@@ -1,6 +0,0 @@
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#ifndef __LINUX_KVM_ALPHA_H
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#define __LINUX_KVM_ALPHA_H
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/* alpha does not support KVM */
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#endif
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@@ -1,17 +0,0 @@
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/* $Id: namei.h,v 1.1 1996/12/13 14:48:21 jj Exp $
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* linux/include/asm-alpha/namei.h
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*
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* Included from linux/fs/namei.c
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*/
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#ifndef __ALPHA_NAMEI_H
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#define __ALPHA_NAMEI_H
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/* This dummy routine maybe changed to something useful
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* for /usr/gnemul/ emulation stuff.
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* Look at asm-sparc/namei.h for details.
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*/
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#define __emul_prefix() NULL
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#endif /* __ALPHA_NAMEI_H */
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@@ -80,9 +80,6 @@ typedef struct page *pgtable_t;
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#endif /* !__ASSEMBLY__ */
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/* to align the pointer to the (next) page boundary */
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#define PAGE_ALIGN(addr) (((addr)+PAGE_SIZE-1)&PAGE_MASK)
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#define __pa(x) ((unsigned long) (x) - PAGE_OFFSET)
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#define __va(x) ((void *)((unsigned long) (x) + PAGE_OFFSET))
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#ifndef CONFIG_DISCONTIGMEM
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@@ -106,7 +106,7 @@ extern dma_addr_t pci_map_page(struct pci_dev *, struct page *,
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/* Test for pci_map_single or pci_map_page having generated an error. */
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static inline int
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pci_dma_mapping_error(dma_addr_t dma_addr)
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pci_dma_mapping_error(struct pci_dev *pdev, dma_addr_t dma_addr)
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{
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return dma_addr == 0;
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}
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@@ -1 +0,0 @@
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#include <linux/semaphore.h>
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@@ -62,4 +62,9 @@
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#define SO_MARK 36
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/* O_NONBLOCK clashes with the bits used for socket types. Therefore we
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* have to define SOCK_NONBLOCK to a different value here.
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*/
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#define SOCK_NONBLOCK 0x40000000
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#endif /* _ASM_SOCKET_H */
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@@ -50,10 +50,8 @@ register struct thread_info *__current_thread_info __asm__("$8");
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#define current_thread_info() __current_thread_info
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/* Thread information allocation. */
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#define THREAD_SIZE_ORDER 1
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#define THREAD_SIZE (2*PAGE_SIZE)
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#define alloc_thread_info(tsk) \
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((struct thread_info *) __get_free_pages(GFP_KERNEL,1))
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#define free_thread_info(ti) free_pages((unsigned long) (ti), 1)
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#endif /* __ASSEMBLY__ */
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@@ -1,38 +0,0 @@
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/*
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* include/asm-arm/arch-at91/at91_ecc.h
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*
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* Error Corrected Code Controller (ECC) - System peripherals regsters.
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* Based on AT91SAM9260 datasheet revision B.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
|
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#ifndef AT91_ECC_H
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#define AT91_ECC_H
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#define AT91_ECC_CR 0x00 /* Control register */
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#define AT91_ECC_RST (1 << 0) /* Reset parity */
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#define AT91_ECC_MR 0x04 /* Mode register */
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#define AT91_ECC_PAGESIZE (3 << 0) /* Page Size */
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#define AT91_ECC_PAGESIZE_528 (0)
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#define AT91_ECC_PAGESIZE_1056 (1)
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#define AT91_ECC_PAGESIZE_2112 (2)
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#define AT91_ECC_PAGESIZE_4224 (3)
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#define AT91_ECC_SR 0x08 /* Status register */
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#define AT91_ECC_RECERR (1 << 0) /* Recoverable Error */
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#define AT91_ECC_ECCERR (1 << 1) /* ECC Single Bit Error */
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#define AT91_ECC_MULERR (1 << 2) /* Multiple Errors */
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#define AT91_ECC_PR 0x0c /* Parity register */
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#define AT91_ECC_BITADDR (0xf << 0) /* Bit Error Address */
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#define AT91_ECC_WORDADDR (0xfff << 4) /* Word Error Address */
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#define AT91_ECC_NPR 0x10 /* NParity register */
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#define AT91_ECC_NPARITY (0xffff << 0) /* NParity */
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#endif
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@@ -89,7 +89,7 @@ struct at91_usbh_data {
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extern void __init at91_add_device_usbh(struct at91_usbh_data *data);
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/* NAND / SmartMedia */
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struct at91_nand_data {
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struct atmel_nand_data {
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u8 enable_pin; /* chip enable */
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u8 det_pin; /* card detect */
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u8 rdy_pin; /* ready/busy */
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@@ -98,7 +98,7 @@ struct at91_nand_data {
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u8 bus_width_16; /* buswidth is 16 bit */
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struct mtd_partition* (*partition_info)(int, int*);
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};
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extern void __init at91_add_device_nand(struct at91_nand_data *data);
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extern void __init at91_add_device_nand(struct atmel_nand_data *data);
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/* I2C*/
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extern void __init at91_add_device_i2c(struct i2c_board_info *devices, int nr_devices);
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@@ -198,17 +198,13 @@ iop_chan_memset_slot_count(size_t len, int *slots_per_op)
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static inline int
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iop_chan_xor_slot_count(size_t len, int src_cnt, int *slots_per_op)
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{
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int num_slots;
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/* slots_to_find = 1 for basic descriptor + 1 per 4 sources above 1
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* (1 source => 8 bytes) (1 slot => 32 bytes)
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*/
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num_slots = 1 + (((src_cnt - 1) << 3) >> 5);
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if (((src_cnt - 1) << 3) & 0x1f)
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num_slots++;
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*slots_per_op = num_slots;
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return num_slots;
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static const char slot_count_table[] = { 1, 2, 2, 2,
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2, 3, 3, 3,
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3, 4, 4, 4,
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4, 5, 5, 5,
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};
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*slots_per_op = slot_count_table[src_cnt - 1];
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return *slots_per_op;
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}
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#define ADMA_MAX_BYTE_COUNT (16 * 1024 * 1024)
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@@ -135,30 +135,30 @@
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#define PNX4008_IRQ_TYPES \
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{ /*IRQ #'s: */ \
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IRQT_LOW, IRQT_LOW, IRQT_LOW, IRQT_HIGH, /* 0, 1, 2, 3 */ \
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IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 4, 5, 6, 7 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 8, 9,10,11 */ \
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IRQT_LOW, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 12,13,14,15 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 16,17,18,19 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 20,21,22,23 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 24,25,26,27 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 28,29,30,31 */ \
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IRQT_HIGH, IRQT_LOW, IRQT_HIGH, IRQT_HIGH, /* 32,33,34,35 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_FALLING, IRQT_HIGH, /* 36,37,38,39 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 40,41,42,43 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 44,45,46,47 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_LOW, /* 48,49,50,51 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 52,53,54,55 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_LOW, IRQT_HIGH, /* 56,57,58,59 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 60,61,62,63 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 64,65,66,67 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 68,69,70,71 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 72,73,74,75 */ \
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||||
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 76,77,78,79 */ \
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IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 80,81,82,83 */ \
|
||||
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 84,85,86,87 */ \
|
||||
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 88,89,90,91 */ \
|
||||
IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, IRQT_HIGH, /* 92,93,94,95 */ \
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IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 0, 1, 2, 3 */ \
|
||||
IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 4, 5, 6, 7 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 8, 9,10,11 */ \
|
||||
IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 12,13,14,15 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 16,17,18,19 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 20,21,22,23 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 24,25,26,27 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 28,29,30,31 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 32,33,34,35 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_EDGE_FALLING, IRQ_TYPE_LEVEL_HIGH, /* 36,37,38,39 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 40,41,42,43 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 44,45,46,47 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_LOW, /* 48,49,50,51 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 52,53,54,55 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_LOW, IRQ_TYPE_LEVEL_HIGH, /* 56,57,58,59 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 60,61,62,63 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 64,65,66,67 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 68,69,70,71 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 72,73,74,75 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 76,77,78,79 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 80,81,82,83 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 84,85,86,87 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 88,89,90,91 */ \
|
||||
IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, IRQ_TYPE_LEVEL_HIGH, /* 92,93,94,95 */ \
|
||||
}
|
||||
|
||||
/* Start Enable Pin Interrupts - table 58 page 66 */
|
||||
|
||||
@@ -1,50 +0,0 @@
|
||||
/*
|
||||
* linux/include/asm/arch-pxa/cm-x270.h
|
||||
*
|
||||
* Copyright Compulab Ltd., 2003, 2007
|
||||
* Mike Rapoport <mike@compulab.co.il>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*/
|
||||
|
||||
|
||||
/* CM-x270 device physical addresses */
|
||||
#define CMX270_CS1_PHYS (PXA_CS1_PHYS)
|
||||
#define MARATHON_PHYS (PXA_CS2_PHYS)
|
||||
#define CMX270_IDE104_PHYS (PXA_CS3_PHYS)
|
||||
#define CMX270_IT8152_PHYS (PXA_CS4_PHYS)
|
||||
|
||||
/* Statically mapped regions */
|
||||
#define CMX270_VIRT_BASE (0xe8000000)
|
||||
#define CMX270_IT8152_VIRT (CMX270_VIRT_BASE)
|
||||
#define CMX270_IDE104_VIRT (CMX270_IT8152_VIRT + SZ_64M)
|
||||
|
||||
/* GPIO related definitions */
|
||||
#define GPIO_IT8152_IRQ (22)
|
||||
|
||||
#define IRQ_GPIO_IT8152_IRQ IRQ_GPIO(GPIO_IT8152_IRQ)
|
||||
#define PME_IRQ IRQ_GPIO(0)
|
||||
#define CMX270_IDE_IRQ IRQ_GPIO(100)
|
||||
#define CMX270_GPIRQ1 IRQ_GPIO(101)
|
||||
#define CMX270_TOUCHIRQ IRQ_GPIO(96)
|
||||
#define CMX270_ETHIRQ IRQ_GPIO(10)
|
||||
#define CMX270_GFXIRQ IRQ_GPIO(95)
|
||||
#define CMX270_NANDIRQ IRQ_GPIO(89)
|
||||
#define CMX270_MMC_IRQ IRQ_GPIO(83)
|
||||
|
||||
/* PCMCIA related definitions */
|
||||
#define PCC_DETECT(x) (GPLR(84 - (x)) & GPIO_bit(84 - (x)))
|
||||
#define PCC_READY(x) (GPLR(82 - (x)) & GPIO_bit(82 - (x)))
|
||||
|
||||
#define PCMCIA_S0_CD_VALID IRQ_GPIO(84)
|
||||
#define PCMCIA_S0_CD_VALID_EDGE GPIO_BOTH_EDGES
|
||||
|
||||
#define PCMCIA_S1_CD_VALID IRQ_GPIO(83)
|
||||
#define PCMCIA_S1_CD_VALID_EDGE GPIO_BOTH_EDGES
|
||||
|
||||
#define PCMCIA_S0_RDYINT IRQ_GPIO(82)
|
||||
#define PCMCIA_S1_RDYINT IRQ_GPIO(81)
|
||||
|
||||
#define PCMCIA_RESET_GPIO 53
|
||||
@@ -0,0 +1,50 @@
|
||||
/*
|
||||
* eseries-gpio.h
|
||||
*
|
||||
* Copyright (C) Ian Molton <spyro@f2s.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
/* e-series power button */
|
||||
#define GPIO_ESERIES_POWERBTN 0
|
||||
|
||||
/* UDC GPIO definitions */
|
||||
#define GPIO_E7XX_USB_DISC 13
|
||||
#define GPIO_E7XX_USB_PULLUP 3
|
||||
|
||||
#define GPIO_E800_USB_DISC 4
|
||||
#define GPIO_E800_USB_PULLUP 84
|
||||
|
||||
/* e740 PCMCIA GPIO definitions */
|
||||
/* Note: PWR1 seems to be inverted */
|
||||
#define GPIO_E740_PCMCIA_CD0 8
|
||||
#define GPIO_E740_PCMCIA_CD1 44
|
||||
#define GPIO_E740_PCMCIA_RDY0 11
|
||||
#define GPIO_E740_PCMCIA_RDY1 6
|
||||
#define GPIO_E740_PCMCIA_RST0 27
|
||||
#define GPIO_E740_PCMCIA_RST1 24
|
||||
#define GPIO_E740_PCMCIA_PWR0 20
|
||||
#define GPIO_E740_PCMCIA_PWR1 23
|
||||
|
||||
/* e750 PCMCIA GPIO definitions */
|
||||
#define GPIO_E750_PCMCIA_CD0 8
|
||||
#define GPIO_E750_PCMCIA_RDY0 12
|
||||
#define GPIO_E750_PCMCIA_RST0 27
|
||||
#define GPIO_E750_PCMCIA_PWR0 20
|
||||
|
||||
/* e800 PCMCIA GPIO definitions */
|
||||
#define GPIO_E800_PCMCIA_RST0 69
|
||||
#define GPIO_E800_PCMCIA_RST1 72
|
||||
#define GPIO_E800_PCMCIA_PWR0 20
|
||||
#define GPIO_E800_PCMCIA_PWR1 73
|
||||
|
||||
/* e7xx IrDA power control */
|
||||
#define GPIO_E7XX_IR_ON 38
|
||||
|
||||
/* ASIC related GPIOs */
|
||||
#define GPIO_ESERIES_TMIO_IRQ 5
|
||||
#define GPIO_E800_ANGELX_IRQ 8
|
||||
@@ -0,0 +1,27 @@
|
||||
/*
|
||||
* eseries-irq.h
|
||||
*
|
||||
* Copyright (C) Ian Molton <spyro@f2s.com>
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License version 2 as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
|
||||
#define ANGELX_IRQ_BASE (IRQ_BOARD_START+8)
|
||||
#define IRQ_ANGELX(n) (ANGELX_IRQ_BASE + (n))
|
||||
|
||||
#define ANGELX_RDY0_IRQ IRQ_ANGELX(0)
|
||||
#define ANGELX_ST0_IRQ IRQ_ANGELX(1)
|
||||
#define ANGELX_CD0_IRQ IRQ_ANGELX(2)
|
||||
#define ANGELX_RDY1_IRQ IRQ_ANGELX(3)
|
||||
#define ANGELX_ST1_IRQ IRQ_ANGELX(4)
|
||||
#define ANGELX_CD1_IRQ IRQ_ANGELX(5)
|
||||
|
||||
#define TMIO_IRQ_BASE (IRQ_BOARD_START+0)
|
||||
#define IRQ_TMIO(n) (TMIO_IRQ_BASE + (n))
|
||||
|
||||
#define TMIO_SD_IRQ IRQ_TMIO(1)
|
||||
#define TMIO_USB_IRQ IRQ_TMIO(2)
|
||||
|
||||
@@ -69,6 +69,12 @@
|
||||
_id == 0x212; \
|
||||
})
|
||||
|
||||
#define __cpu_is_pxa255(id) \
|
||||
({ \
|
||||
unsigned int _id = (id) >> 4 & 0xfff; \
|
||||
_id == 0x2d0; \
|
||||
})
|
||||
|
||||
#define __cpu_is_pxa25x(id) \
|
||||
({ \
|
||||
unsigned int _id = (id) >> 4 & 0xfff; \
|
||||
@@ -76,6 +82,7 @@
|
||||
})
|
||||
#else
|
||||
#define __cpu_is_pxa21x(id) (0)
|
||||
#define __cpu_is_pxa255(id) (0)
|
||||
#define __cpu_is_pxa25x(id) (0)
|
||||
#endif
|
||||
|
||||
@@ -119,11 +126,26 @@
|
||||
#define __cpu_is_pxa320(id) (0)
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_CPU_PXA930
|
||||
#define __cpu_is_pxa930(id) \
|
||||
({ \
|
||||
unsigned int _id = (id) >> 4 & 0xfff; \
|
||||
_id == 0x683; \
|
||||
})
|
||||
#else
|
||||
#define __cpu_is_pxa930(id) (0)
|
||||
#endif
|
||||
|
||||
#define cpu_is_pxa21x() \
|
||||
({ \
|
||||
__cpu_is_pxa21x(read_cpuid_id()); \
|
||||
})
|
||||
|
||||
#define cpu_is_pxa255() \
|
||||
({ \
|
||||
__cpu_is_pxa255(read_cpuid_id()); \
|
||||
})
|
||||
|
||||
#define cpu_is_pxa25x() \
|
||||
({ \
|
||||
__cpu_is_pxa25x(read_cpuid_id()); \
|
||||
@@ -149,6 +171,12 @@
|
||||
__cpu_is_pxa320(read_cpuid_id()); \
|
||||
})
|
||||
|
||||
#define cpu_is_pxa930() \
|
||||
({ \
|
||||
unsigned int id = read_cpuid(CPUID_ID); \
|
||||
__cpu_is_pxa930(id); \
|
||||
})
|
||||
|
||||
/*
|
||||
* CPUID Core Generation Bit
|
||||
* <= 0x2 for pxa21x/pxa25x/pxa26x/pxa27x
|
||||
@@ -196,6 +224,11 @@ extern void pxa_gpio_set_value(unsigned gpio, int value);
|
||||
*/
|
||||
extern unsigned int get_memclk_frequency_10khz(void);
|
||||
|
||||
/*
|
||||
* register GPIO as reset generator
|
||||
*/
|
||||
extern int init_gpio_reset(int gpio);
|
||||
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_MACH_ARMCORE) && defined(CONFIG_PCI)
|
||||
|
||||
@@ -138,18 +138,18 @@
|
||||
#define TOUCH_PANEL_IRQ IRQ_GPIO(5)
|
||||
#define IDE_IRQ IRQ_GPIO(21)
|
||||
|
||||
#define TOUCH_PANEL_IRQ_EDGE IRQT_FALLING
|
||||
#define TOUCH_PANEL_IRQ_EDGE IRQ_TYPE_EDGE_FALLING
|
||||
|
||||
#define ETHERNET_IRQ IRQ_GPIO(4)
|
||||
#define ETHERNET_IRQ_EDGE IRQT_RISING
|
||||
#define ETHERNET_IRQ_EDGE IRQ_TYPE_EDGE_RISING
|
||||
|
||||
#define IDE_IRQ_EDGE IRQT_RISING
|
||||
#define IDE_IRQ_EDGE IRQ_TYPE_EDGE_RISING
|
||||
|
||||
#define PCMCIA_S0_CD_VALID IRQ_GPIO(7)
|
||||
#define PCMCIA_S0_CD_VALID_EDGE IRQT_BOTHEDGE
|
||||
#define PCMCIA_S0_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
|
||||
|
||||
#define PCMCIA_S1_CD_VALID IRQ_GPIO(8)
|
||||
#define PCMCIA_S1_CD_VALID_EDGE IRQT_BOTHEDGE
|
||||
#define PCMCIA_S1_CD_VALID_EDGE IRQ_TYPE_EDGE_BOTH
|
||||
|
||||
#define PCMCIA_S0_RDYINT IRQ_GPIO(19)
|
||||
#define PCMCIA_S1_RDYINT IRQ_GPIO(22)
|
||||
|
||||
@@ -180,10 +180,13 @@
|
||||
#define NR_IRQS (IRQ_LOCOMO_SPI_TEND + 1)
|
||||
#elif defined(CONFIG_ARCH_LUBBOCK) || \
|
||||
defined(CONFIG_MACH_LOGICPD_PXA270) || \
|
||||
defined(CONFIG_MACH_TOSA) || \
|
||||
defined(CONFIG_MACH_MAINSTONE) || \
|
||||
defined(CONFIG_MACH_PCM027) || \
|
||||
defined(CONFIG_MACH_MAGICIAN)
|
||||
#define NR_IRQS (IRQ_BOARD_END)
|
||||
#elif defined(CONFIG_MACH_ZYLONITE)
|
||||
#define NR_IRQS (IRQ_BOARD_START + 32)
|
||||
#else
|
||||
#define NR_IRQS (IRQ_BOARD_START)
|
||||
#endif
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user