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Merge branch 'for-rmk' of git://git.kernel.org/pub/scm/linux/kernel/git/kgene/linux-samsung into devel-stable

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This commit is contained in:
Russell King
2011-01-15 13:24:02 +00:00
parent 073154459b ccbc87693d
commit bbba756069
111 changed files with 4283 additions and 812 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/Kconfig
+1
View File
@@ -766,6 +766,7 @@ config ARCH_S5PV310
select ARCH_SPARSEMEM_ENABLE
select GENERIC_GPIO
select HAVE_CLK
select ARCH_HAS_CPUFREQ
select GENERIC_CLOCKEVENTS
select HAVE_S3C_RTC if RTC_CLASS
select HAVE_S3C2410_I2C if I2C
arch/arm/mach-s3c2410/bast-irq.c
+11 -11
View File
@@ -75,38 +75,38 @@ static unsigned char bast_pc104_irqmasks[] = {
static unsigned char bast_pc104_irqs[] = { 3, 5, 7, 10 };
static void
bast_pc104_mask(unsigned int irqno)
bast_pc104_mask(struct irq_data *data)
{
unsigned long temp;
temp = __raw_readb(BAST_VA_PC104_IRQMASK);
temp &= ~bast_pc104_irqmasks[irqno];
temp &= ~bast_pc104_irqmasks[data->irq];
__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
}
static void
bast_pc104_maskack(unsigned int irqno)
bast_pc104_maskack(struct irq_data *data)
{
struct irq_desc *desc = irq_desc + IRQ_ISA;
bast_pc104_mask(irqno);
desc->chip->ack(IRQ_ISA);
bast_pc104_mask(data);
desc->irq_data.chip->irq_ack(&desc->irq_data);
}
static void
bast_pc104_unmask(unsigned int irqno)
bast_pc104_unmask(struct irq_data *data)
{
unsigned long temp;
temp = __raw_readb(BAST_VA_PC104_IRQMASK);
temp |= bast_pc104_irqmasks[irqno];
temp |= bast_pc104_irqmasks[data->irq];
__raw_writeb(temp, BAST_VA_PC104_IRQMASK);
}
static struct irq_chip bast_pc104_chip = {
.mask = bast_pc104_mask,
.unmask = bast_pc104_unmask,
.ack = bast_pc104_maskack
.irq_mask = bast_pc104_mask,
.irq_unmask = bast_pc104_unmask,
.irq_ack = bast_pc104_maskack
};
static void
@@ -123,7 +123,7 @@ bast_irq_pc104_demux(unsigned int irq,
/* ack if we get an irq with nothing (ie, startup) */
desc = irq_desc + IRQ_ISA;
desc->chip->ack(IRQ_ISA);
desc->irq_data.chip->irq_ack(&desc->irq_data);
} else {
/* handle the IRQ */
arch/arm/mach-s3c2410/include/mach/irqs.h
+2 -2
View File
@@ -152,8 +152,8 @@
#define IRQ_S3C2416_HSMMC0 S3C2410_IRQ(21) /* S3C2416/S3C2450 */
#define IRQ_HSMMC0 IRQ_S3C2443_HSMMC
#define IRQ_HSMMC1 IRQ_S3C2416_HSMMC0
#define IRQ_HSMMC0 IRQ_S3C2416_HSMMC0
#define IRQ_HSMMC1 IRQ_S3C2443_HSMMC
#define IRQ_S3C2443_LCD1 S3C2410_IRQSUB(14)
#define IRQ_S3C2443_LCD2 S3C2410_IRQSUB(15)
arch/arm/mach-s3c2410/include/mach/map.h
+2 -2
View File
@@ -112,8 +112,8 @@
#define S3C_PA_IIC S3C2410_PA_IIC
#define S3C_PA_UART S3C24XX_PA_UART
#define S3C_PA_USBHOST S3C2410_PA_USBHOST
#define S3C_PA_HSMMC0 S3C2443_PA_HSMMC
#define S3C_PA_HSMMC1 S3C2416_PA_HSMMC0
#define S3C_PA_HSMMC0 S3C2416_PA_HSMMC0
#define S3C_PA_HSMMC1 S3C2443_PA_HSMMC
#define S3C_PA_WDT S3C2410_PA_WATCHDOG
#define S3C_PA_NAND S3C24XX_PA_NAND
arch/arm/mach-s3c2410/include/mach/regs-s3c2443-clock.h
+1
View File
@@ -86,6 +86,7 @@
#define S3C2443_HCLKCON_LCDC (1<<9)
#define S3C2443_HCLKCON_USBH (1<<11)
#define S3C2443_HCLKCON_USBD (1<<12)
#define S3C2416_HCLKCON_HSMMC0 (1<<15)
#define S3C2443_HCLKCON_HSMMC (1<<16)
#define S3C2443_HCLKCON_CFC (1<<17)
#define S3C2443_HCLKCON_SSMC (1<<18)
arch/arm/mach-s3c2412/irq.c
+25 -25
View File
@@ -49,9 +49,9 @@
*/
static void
s3c2412_irq_mask(unsigned int irqno)
s3c2412_irq_mask(struct irq_data *data)
{
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long bitval = 1UL << (data->irq - IRQ_EINT0);
unsigned long mask;
mask = __raw_readl(S3C2410_INTMSK);
@@ -62,9 +62,9 @@ s3c2412_irq_mask(unsigned int irqno)
}
static inline void
s3c2412_irq_ack(unsigned int irqno)
s3c2412_irq_ack(struct irq_data *data)
{
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long bitval = 1UL << (data->irq - IRQ_EINT0);
__raw_writel(bitval, S3C2412_EINTPEND);
__raw_writel(bitval, S3C2410_SRCPND);
@@ -72,9 +72,9 @@ s3c2412_irq_ack(unsigned int irqno)
}
static inline void
s3c2412_irq_maskack(unsigned int irqno)
s3c2412_irq_maskack(struct irq_data *data)
{
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long bitval = 1UL << (data->irq - IRQ_EINT0);
unsigned long mask;
mask = __raw_readl(S3C2410_INTMSK);
@@ -89,9 +89,9 @@ s3c2412_irq_maskack(unsigned int irqno)
}
static void
s3c2412_irq_unmask(unsigned int irqno)
s3c2412_irq_unmask(struct irq_data *data)
{
unsigned long bitval = 1UL << (irqno - IRQ_EINT0);
unsigned long bitval = 1UL << (data->irq - IRQ_EINT0);
unsigned long mask;
mask = __raw_readl(S3C2412_EINTMASK);
@@ -102,11 +102,11 @@ s3c2412_irq_unmask(unsigned int irqno)
}
static struct irq_chip s3c2412_irq_eint0t4 = {
.ack = s3c2412_irq_ack,
.mask = s3c2412_irq_mask,
.unmask = s3c2412_irq_unmask,
.set_wake = s3c_irq_wake,
.set_type = s3c_irqext_type,
.irq_ack = s3c2412_irq_ack,
.irq_mask = s3c2412_irq_mask,
.irq_unmask = s3c2412_irq_unmask,
.irq_set_wake = s3c_irq_wake,
.irq_set_type = s3c_irqext_type,
};
#define INTBIT(x) (1 << ((x) - S3C2410_IRQSUB(0)))
@@ -132,29 +132,29 @@ static void s3c2412_irq_demux_cfsdi(unsigned int irq, struct irq_desc *desc)
#define INTMSK_CFSDI (1UL << (IRQ_S3C2412_CFSDI - IRQ_EINT0))
#define SUBMSK_CFSDI INTMSK_SUB(IRQ_S3C2412_SDI, IRQ_S3C2412_CF)
static void s3c2412_irq_cfsdi_mask(unsigned int irqno)
static void s3c2412_irq_cfsdi_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
s3c_irqsub_mask(data->irq, INTMSK_CFSDI, SUBMSK_CFSDI);
}
static void s3c2412_irq_cfsdi_unmask(unsigned int irqno)
static void s3c2412_irq_cfsdi_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_CFSDI);
s3c_irqsub_unmask(data->irq, INTMSK_CFSDI);
}
static void s3c2412_irq_cfsdi_ack(unsigned int irqno)
static void s3c2412_irq_cfsdi_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_CFSDI, SUBMSK_CFSDI);
s3c_irqsub_maskack(data->irq, INTMSK_CFSDI, SUBMSK_CFSDI);
}
static struct irq_chip s3c2412_irq_cfsdi = {
.name = "s3c2412-cfsdi",
.ack = s3c2412_irq_cfsdi_ack,
.mask = s3c2412_irq_cfsdi_mask,
.unmask = s3c2412_irq_cfsdi_unmask,
.irq_ack = s3c2412_irq_cfsdi_ack,
.irq_mask = s3c2412_irq_cfsdi_mask,
.irq_unmask = s3c2412_irq_cfsdi_unmask,
};
static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state)
static int s3c2412_irq_rtc_wake(struct irq_data *data, unsigned int state)
{
unsigned long pwrcfg;
@@ -165,7 +165,7 @@ static int s3c2412_irq_rtc_wake(unsigned int irqno, unsigned int state)
pwrcfg |= S3C2412_PWRCFG_RTC_MASKIRQ;
__raw_writel(pwrcfg, S3C2412_PWRCFG);
return s3c_irq_chip.set_wake(irqno, state);
return s3c_irq_chip.irq_set_wake(data, state);
}
static struct irq_chip s3c2412_irq_rtc_chip;
@@ -193,7 +193,7 @@ static int s3c2412_irq_add(struct sys_device *sysdev)
/* change RTC IRQ's set wake method */
s3c2412_irq_rtc_chip = s3c_irq_chip;
s3c2412_irq_rtc_chip.set_wake = s3c2412_irq_rtc_wake;
s3c2412_irq_rtc_chip.irq_set_wake = s3c2412_irq_rtc_wake;
set_irq_chip(IRQ_RTC, &s3c2412_irq_rtc_chip);
arch/arm/mach-s3c2416/Kconfig
+12
View File
@@ -31,6 +31,17 @@ config S3C2416_PM
help
Internal config node to apply S3C2416 power management
config S3C2416_SETUP_SDHCI
bool
select S3C2416_SETUP_SDHCI_GPIO
help
Internal helper functions for S3C2416 based SDHCI systems
config S3C2416_SETUP_SDHCI_GPIO
bool
help
Common setup code for SDHCI gpio.
menu "S3C2416 Machines"
config MACH_SMDK2416
@@ -42,6 +53,7 @@ config MACH_SMDK2416
select S3C_DEV_HSMMC1
select S3C_DEV_NAND
select S3C_DEV_USB_HOST
select S3C2416_SETUP_SDHCI
select S3C2416_PM if PM
help
Say Y here if you are using an SMDK2416
arch/arm/mach-s3c2416/Makefile
+4
View File
@@ -14,6 +14,10 @@ obj-$(CONFIG_CPU_S3C2416) += irq.o
obj-$(CONFIG_S3C2416_PM) += pm.o
#obj-$(CONFIG_S3C2416_DMA) += dma.o
# Device setup
obj-$(CONFIG_S3C2416_SETUP_SDHCI) += setup-sdhci.o
obj-$(CONFIG_S3C2416_SETUP_SDHCI_GPIO) += setup-sdhci-gpio.o
# Machine support
obj-$(CONFIG_MACH_SMDK2416) += mach-smdk2416.o
arch/arm/mach-s3c2416/clock.c
+13 -5
View File
@@ -38,12 +38,11 @@ static unsigned int armdiv[8] = {
[7] = 8,
};
/* ID to hardware numbering, 0 is HSMMC1, 1 is HSMMC0 */
static struct clksrc_clk hsmmc_div[] = {
[0] = {
.clk = {
.name = "hsmmc-div",
.id = 1,
.id = 0,
.parent = &clk_esysclk.clk,
},
.reg_div = { .reg = S3C2416_CLKDIV2, .size = 2, .shift = 6 },
@@ -51,7 +50,7 @@ static struct clksrc_clk hsmmc_div[] = {
[1] = {
.clk = {
.name = "hsmmc-div",
.id = 0,
.id = 1,
.parent = &clk_esysclk.clk,
},
.reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
@@ -61,7 +60,7 @@ static struct clksrc_clk hsmmc_div[] = {
static struct clksrc_clk hsmmc_mux[] = {
[0] = {
.clk = {
.id = 1,
.id = 0,
.name = "hsmmc-if",
.ctrlbit = (1 << 6),
.enable = s3c2443_clkcon_enable_s,
@@ -77,7 +76,7 @@ static struct clksrc_clk hsmmc_mux[] = {
},
[1] = {
.clk = {
.id = 0,
.id = 1,
.name = "hsmmc-if",
.ctrlbit = (1 << 12),
.enable = s3c2443_clkcon_enable_s,
@@ -93,6 +92,13 @@ static struct clksrc_clk hsmmc_mux[] = {
},
};
static struct clk hsmmc0_clk = {
.name = "hsmmc",
.id = 0,
.parent = &clk_h,
.enable = s3c2443_clkcon_enable_h,
.ctrlbit = S3C2416_HCLKCON_HSMMC0,
};
static inline unsigned int s3c2416_fclk_div(unsigned long clkcon0)
{
@@ -130,6 +136,8 @@ void __init s3c2416_init_clocks(int xtal)
for (ptr = 0; ptr < ARRAY_SIZE(clksrcs); ptr++)
s3c_register_clksrc(clksrcs[ptr], 1);
s3c24xx_register_clock(&hsmmc0_clk);
s3c_pwmclk_init();
}
arch/arm/mach-s3c2416/irq.c
+36 -40
View File
@@ -77,28 +77,27 @@ static void s3c2416_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
#define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
#define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
static void s3c2416_irq_wdtac97_mask(unsigned int irqno)
static void s3c2416_irq_wdtac97_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
}
static void s3c2416_irq_wdtac97_unmask(unsigned int irqno)
static void s3c2416_irq_wdtac97_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97);
}
static void s3c2416_irq_wdtac97_ack(unsigned int irqno)
static void s3c2416_irq_wdtac97_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
}
static struct irq_chip s3c2416_irq_wdtac97 = {
.mask = s3c2416_irq_wdtac97_mask,
.unmask = s3c2416_irq_wdtac97_unmask,
.ack = s3c2416_irq_wdtac97_ack,
.irq_mask = s3c2416_irq_wdtac97_mask,
.irq_unmask = s3c2416_irq_wdtac97_unmask,
.irq_ack = s3c2416_irq_wdtac97_ack,
};
/* LCD sub interrupts */
static void s3c2416_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
@@ -109,28 +108,27 @@ static void s3c2416_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
#define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
#define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
static void s3c2416_irq_lcd_mask(unsigned int irqno)
static void s3c2416_irq_lcd_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD);
}
static void s3c2416_irq_lcd_unmask(unsigned int irqno)
static void s3c2416_irq_lcd_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_LCD);
s3c_irqsub_unmask(data->irq, INTMSK_LCD);
}
static void s3c2416_irq_lcd_ack(unsigned int irqno)
static void s3c2416_irq_lcd_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD);
}
static struct irq_chip s3c2416_irq_lcd = {
.mask = s3c2416_irq_lcd_mask,
.unmask = s3c2416_irq_lcd_unmask,
.ack = s3c2416_irq_lcd_ack,
.irq_mask = s3c2416_irq_lcd_mask,
.irq_unmask = s3c2416_irq_lcd_unmask,
.irq_ack = s3c2416_irq_lcd_ack,
};
/* DMA sub interrupts */
static void s3c2416_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
@@ -142,28 +140,27 @@ static void s3c2416_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
#define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
static void s3c2416_irq_dma_mask(unsigned int irqno)
static void s3c2416_irq_dma_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA);
}
static void s3c2416_irq_dma_unmask(unsigned int irqno)
static void s3c2416_irq_dma_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_DMA);
s3c_irqsub_unmask(data->irq, INTMSK_DMA);
}
static void s3c2416_irq_dma_ack(unsigned int irqno)
static void s3c2416_irq_dma_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA);
}
static struct irq_chip s3c2416_irq_dma = {
.mask = s3c2416_irq_dma_mask,
.unmask = s3c2416_irq_dma_unmask,
.ack = s3c2416_irq_dma_ack,
.irq_mask = s3c2416_irq_dma_mask,
.irq_unmask = s3c2416_irq_dma_unmask,
.irq_ack = s3c2416_irq_dma_ack,
};
/* UART3 sub interrupts */
static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
@@ -174,28 +171,27 @@ static void s3c2416_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
#define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
#define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
static void s3c2416_irq_uart3_mask(unsigned int irqno)
static void s3c2416_irq_uart3_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3);
}
static void s3c2416_irq_uart3_unmask(unsigned int irqno)
static void s3c2416_irq_uart3_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_UART3);
s3c_irqsub_unmask(data->irq, INTMSK_UART3);
}
static void s3c2416_irq_uart3_ack(unsigned int irqno)
static void s3c2416_irq_uart3_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3);
}
static struct irq_chip s3c2416_irq_uart3 = {
.mask = s3c2416_irq_uart3_mask,
.unmask = s3c2416_irq_uart3_unmask,
.ack = s3c2416_irq_uart3_ack,
.irq_mask = s3c2416_irq_uart3_mask,
.irq_unmask = s3c2416_irq_uart3_unmask,
.irq_ack = s3c2416_irq_uart3_ack,
};
/* IRQ initialisation code */
static int __init s3c2416_add_sub(unsigned int base,
arch/arm/mach-s3c2416/mach-smdk2416.c
+23
View File
@@ -46,6 +46,7 @@
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/nand.h>
#include <plat/sdhci.h>
#include <plat/regs-fb-v4.h>
#include <plat/fb.h>
@@ -110,6 +111,13 @@ static struct s3c2410_uartcfg smdk2416_uartcfgs[] __initdata = {
.ucon = UCON,
.ulcon = ULCON | 0x50,
.ufcon = UFCON,
},
[3] = {
.hwport = 3,
.flags = 0,
.ucon = UCON,
.ulcon = ULCON,
.ufcon = UFCON,
}
};
@@ -159,6 +167,18 @@ static struct s3c_fb_platdata smdk2416_fb_platdata = {
.vidcon1 = VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};
static struct s3c_sdhci_platdata smdk2416_hsmmc0_pdata __initdata = {
.max_width = 4,
.cd_type = S3C_SDHCI_CD_GPIO,
.ext_cd_gpio = S3C2410_GPF(1),
.ext_cd_gpio_invert = 1,
};
static struct s3c_sdhci_platdata smdk2416_hsmmc1_pdata __initdata = {
.max_width = 4,
.cd_type = S3C_SDHCI_CD_NONE,
};
static struct platform_device *smdk2416_devices[] __initdata = {
&s3c_device_fb,
&s3c_device_wdt,
@@ -180,6 +200,9 @@ static void __init smdk2416_machine_init(void)
s3c_i2c0_set_platdata(NULL);
s3c_fb_set_platdata(&smdk2416_fb_platdata);
s3c_sdhci0_set_platdata(&smdk2416_hsmmc0_pdata);
s3c_sdhci1_set_platdata(&smdk2416_hsmmc1_pdata);
gpio_request(S3C2410_GPB(4), "USBHost Power");
gpio_direction_output(S3C2410_GPB(4), 1);
arch/arm/mach-s3c2416/s3c2416.c
+5
View File
@@ -53,6 +53,7 @@
#include <plat/s3c2416.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/sdhci.h>
#include <plat/iic-core.h>
#include <plat/fb-core.h>
@@ -115,6 +116,10 @@ void __init s3c2416_map_io(void)
s3c24xx_gpiocfg_default.set_pull = s3c_gpio_setpull_updown;
s3c24xx_gpiocfg_default.get_pull = s3c_gpio_getpull_updown;
/* initialize device information early */
s3c2416_default_sdhci0();
s3c2416_default_sdhci1();
iotable_init(s3c2416_iodesc, ARRAY_SIZE(s3c2416_iodesc));
}
arch/arm/mach-s3c2416/setup-sdhci-gpio.c
+34
View File
@@ -0,0 +1,34 @@
/* linux/arch/arm/plat-s3c2416/setup-sdhci-gpio.c
*
* Copyright 2010 Promwad Innovation Company
* Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
*
* S3C2416 - Helper functions for setting up SDHCI device(s) GPIO (HSMMC)
*
* Based on mach-s3c64xx/setup-sdhci-gpio.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <mach/regs-gpio.h>
#include <plat/gpio-cfg.h>
void s3c2416_setup_sdhci0_cfg_gpio(struct platform_device *dev, int width)
{
s3c_gpio_cfgrange_nopull(S3C2410_GPE(5), 2 + width, S3C_GPIO_SFN(2));
}
void s3c2416_setup_sdhci1_cfg_gpio(struct platform_device *dev, int width)
{
s3c_gpio_cfgrange_nopull(S3C2410_GPL(0), width, S3C_GPIO_SFN(2));
s3c_gpio_cfgrange_nopull(S3C2410_GPL(8), 2, S3C_GPIO_SFN(2));
}
arch/arm/mach-s3c2416/setup-sdhci.c
+61
View File
@@ -0,0 +1,61 @@
/* linux/arch/arm/mach-s3c2416/setup-sdhci.c
*
* Copyright 2010 Promwad Innovation Company
* Yauhen Kharuzhy <yauhen.kharuzhy@promwad.com>
*
* S3C2416 - Helper functions for settign up SDHCI device(s) (HSMMC)
*
* Based on mach-s3c64xx/setup-sdhci.c
*
* This program is free software; you can redistribute it and/or modify
* it under the terms of the GNU General Public License version 2 as
* published by the Free Software Foundation.
*/
#include <linux/kernel.h>
#include <linux/types.h>
#include <linux/interrupt.h>
#include <linux/platform_device.h>
#include <linux/io.h>
#include <linux/mmc/card.h>
#include <linux/mmc/host.h>
#include <plat/regs-sdhci.h>
#include <plat/sdhci.h>
/* clock sources for the mmc bus clock, order as for the ctrl2[5..4] */
char *s3c2416_hsmmc_clksrcs[4] = {
[0] = "hsmmc",
[1] = "hsmmc",
[2] = "hsmmc-if",
/* [3] = "48m", - note not successfully used yet */
};
void s3c2416_setup_sdhci_cfg_card(struct platform_device *dev,
void __iomem *r,
struct mmc_ios *ios,
struct mmc_card *card)
{
u32 ctrl2, ctrl3;
ctrl2 = __raw_readl(r + S3C_SDHCI_CONTROL2);
ctrl2 &= S3C_SDHCI_CTRL2_SELBASECLK_MASK;
ctrl2 |= (S3C64XX_SDHCI_CTRL2_ENSTAASYNCCLR |
S3C64XX_SDHCI_CTRL2_ENCMDCNFMSK |
S3C_SDHCI_CTRL2_ENFBCLKRX |
S3C_SDHCI_CTRL2_DFCNT_NONE |
S3C_SDHCI_CTRL2_ENCLKOUTHOLD);
if (ios->clock < 25 * 1000000)
ctrl3 = (S3C_SDHCI_CTRL3_FCSEL3 |
S3C_SDHCI_CTRL3_FCSEL2 |
S3C_SDHCI_CTRL3_FCSEL1 |
S3C_SDHCI_CTRL3_FCSEL0);
else
ctrl3 = (S3C_SDHCI_CTRL3_FCSEL1 | S3C_SDHCI_CTRL3_FCSEL0);
__raw_writel(ctrl2, r + S3C_SDHCI_CONTROL2);
__raw_writel(ctrl3, r + S3C_SDHCI_CONTROL3);
}
arch/arm/mach-s3c2440/irq.c
+9 -9
View File
@@ -69,27 +69,27 @@ static void s3c_irq_demux_wdtac97(unsigned int irq,
#define INTMSK_WDT (1UL << (IRQ_WDT - IRQ_EINT0))
static void
s3c_irq_wdtac97_mask(unsigned int irqno)
s3c_irq_wdtac97_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_WDT, 3<<13);
s3c_irqsub_mask(data->irq, INTMSK_WDT, 3 << 13);
}
static void
s3c_irq_wdtac97_unmask(unsigned int irqno)
s3c_irq_wdtac97_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_WDT);
s3c_irqsub_unmask(data->irq, INTMSK_WDT);
}
static void
s3c_irq_wdtac97_ack(unsigned int irqno)
s3c_irq_wdtac97_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_WDT, 3<<13);
s3c_irqsub_maskack(data->irq, INTMSK_WDT, 3 << 13);
}
static struct irq_chip s3c_irq_wdtac97 = {
.mask = s3c_irq_wdtac97_mask,
.unmask = s3c_irq_wdtac97_unmask,
.ack = s3c_irq_wdtac97_ack,
.irq_mask = s3c_irq_wdtac97_mask,
.irq_unmask = s3c_irq_wdtac97_unmask,
.irq_ack = s3c_irq_wdtac97_ack,
};
static int s3c2440_irq_add(struct sys_device *sysdev)
arch/arm/mach-s3c2440/s3c244x-irq.c
+9 -9
View File
@@ -68,27 +68,27 @@ static void s3c_irq_demux_cam(unsigned int irq,
#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
static void
s3c_irq_cam_mask(unsigned int irqno)
s3c_irq_cam_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11);
s3c_irqsub_mask(data->irq, INTMSK_CAM, 3 << 11);
}
static void
s3c_irq_cam_unmask(unsigned int irqno)
s3c_irq_cam_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_CAM);
s3c_irqsub_unmask(data->irq, INTMSK_CAM);
}
static void
s3c_irq_cam_ack(unsigned int irqno)
s3c_irq_cam_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11);
s3c_irqsub_maskack(data->irq, INTMSK_CAM, 3 << 11);
}
static struct irq_chip s3c_irq_cam = {
.mask = s3c_irq_cam_mask,
.unmask = s3c_irq_cam_unmask,
.ack = s3c_irq_cam_ack,
.irq_mask = s3c_irq_cam_mask,
.irq_unmask = s3c_irq_cam_unmask,
.irq_ack = s3c_irq_cam_ack,
};
static int s3c244x_irq_add(struct sys_device *sysdev)
arch/arm/mach-s3c2443/Kconfig
+2 -1
View File
@@ -10,6 +10,7 @@ config CPU_S3C2443
select CPU_LLSERIAL_S3C2440
select SAMSUNG_CLKSRC
select S3C2443_CLOCK
select S3C_GPIO_PULL_S3C2443
help
Support for the S3C2443 SoC from the S3C24XX line
@@ -25,7 +26,7 @@ config MACH_SMDK2443
bool "SMDK2443"
select CPU_S3C2443
select MACH_SMDK
select S3C_DEV_HSMMC
select S3C_DEV_HSMMC1
help
Say Y here if you are using an SMDK2443
arch/arm/mach-s3c2443/clock.c
+2 -2
View File
@@ -196,7 +196,7 @@ static struct clksrc_clk clk_hsspi = {
static struct clksrc_clk clk_hsmmc_div = {
.clk = {
.name = "hsmmc-div",
.id = -1,
.id = 1,
.parent = &clk_esysclk.clk,
},
.reg_div = { .reg = S3C2443_CLKDIV1, .size = 2, .shift = 6 },
@@ -231,7 +231,7 @@ static int s3c2443_enable_hsmmc(struct clk *clk, int enable)
static struct clk clk_hsmmc = {
.name = "hsmmc-if",
.id = -1,
.id = 1,
.parent = &clk_hsmmc_div.clk,
.enable = s3c2443_enable_hsmmc,
.ops = &(struct clk_ops) {
arch/arm/mach-s3c2443/irq.c
+45 -50
View File
@@ -75,28 +75,27 @@ static void s3c2443_irq_demux_wdtac97(unsigned int irq, struct irq_desc *desc)
#define INTMSK_WDTAC97 (1UL << (IRQ_WDT - IRQ_EINT0))
#define SUBMSK_WDTAC97 INTMSK(IRQ_S3C2443_WDT, IRQ_S3C2443_AC97)
static void s3c2443_irq_wdtac97_mask(unsigned int irqno)
static void s3c2443_irq_wdtac97_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
s3c_irqsub_mask(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
}
static void s3c2443_irq_wdtac97_unmask(unsigned int irqno)
static void s3c2443_irq_wdtac97_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_WDTAC97);
s3c_irqsub_unmask(data->irq, INTMSK_WDTAC97);
}
static void s3c2443_irq_wdtac97_ack(unsigned int irqno)
static void s3c2443_irq_wdtac97_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_WDTAC97, SUBMSK_WDTAC97);
s3c_irqsub_maskack(data->irq, INTMSK_WDTAC97, SUBMSK_WDTAC97);
}
static struct irq_chip s3c2443_irq_wdtac97 = {
.mask = s3c2443_irq_wdtac97_mask,
.unmask = s3c2443_irq_wdtac97_unmask,
.ack = s3c2443_irq_wdtac97_ack,
.irq_mask = s3c2443_irq_wdtac97_mask,
.irq_unmask = s3c2443_irq_wdtac97_unmask,
.irq_ack = s3c2443_irq_wdtac97_ack,
};
/* LCD sub interrupts */
static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
@@ -107,28 +106,27 @@ static void s3c2443_irq_demux_lcd(unsigned int irq, struct irq_desc *desc)
#define INTMSK_LCD (1UL << (IRQ_LCD - IRQ_EINT0))
#define SUBMSK_LCD INTMSK(IRQ_S3C2443_LCD1, IRQ_S3C2443_LCD4)
static void s3c2443_irq_lcd_mask(unsigned int irqno)
static void s3c2443_irq_lcd_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_LCD, SUBMSK_LCD);
s3c_irqsub_mask(data->irq, INTMSK_LCD, SUBMSK_LCD);
}
static void s3c2443_irq_lcd_unmask(unsigned int irqno)
static void s3c2443_irq_lcd_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_LCD);
s3c_irqsub_unmask(data->irq, INTMSK_LCD);
}
static void s3c2443_irq_lcd_ack(unsigned int irqno)
static void s3c2443_irq_lcd_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_LCD, SUBMSK_LCD);
s3c_irqsub_maskack(data->irq, INTMSK_LCD, SUBMSK_LCD);
}
static struct irq_chip s3c2443_irq_lcd = {
.mask = s3c2443_irq_lcd_mask,
.unmask = s3c2443_irq_lcd_unmask,
.ack = s3c2443_irq_lcd_ack,
.irq_mask = s3c2443_irq_lcd_mask,
.irq_unmask = s3c2443_irq_lcd_unmask,
.irq_ack = s3c2443_irq_lcd_ack,
};
/* DMA sub interrupts */
static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
@@ -139,29 +137,27 @@ static void s3c2443_irq_demux_dma(unsigned int irq, struct irq_desc *desc)
#define INTMSK_DMA (1UL << (IRQ_S3C2443_DMA - IRQ_EINT0))
#define SUBMSK_DMA INTMSK(IRQ_S3C2443_DMA0, IRQ_S3C2443_DMA5)
static void s3c2443_irq_dma_mask(unsigned int irqno)
static void s3c2443_irq_dma_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_DMA, SUBMSK_DMA);
s3c_irqsub_mask(data->irq, INTMSK_DMA, SUBMSK_DMA);
}
static void s3c2443_irq_dma_unmask(unsigned int irqno)
static void s3c2443_irq_dma_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_DMA);
s3c_irqsub_unmask(data->irq, INTMSK_DMA);
}
static void s3c2443_irq_dma_ack(unsigned int irqno)
static void s3c2443_irq_dma_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_DMA, SUBMSK_DMA);
s3c_irqsub_maskack(data->irq, INTMSK_DMA, SUBMSK_DMA);
}
static struct irq_chip s3c2443_irq_dma = {
.mask = s3c2443_irq_dma_mask,
.unmask = s3c2443_irq_dma_unmask,
.ack = s3c2443_irq_dma_ack,
.irq_mask = s3c2443_irq_dma_mask,
.irq_unmask = s3c2443_irq_dma_unmask,
.irq_ack = s3c2443_irq_dma_ack,
};
/* UART3 sub interrupts */
static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
@@ -172,28 +168,27 @@ static void s3c2443_irq_demux_uart3(unsigned int irq, struct irq_desc *desc)
#define INTMSK_UART3 (1UL << (IRQ_S3C2443_UART3 - IRQ_EINT0))
#define SUBMSK_UART3 (0x7 << (IRQ_S3C2443_RX3 - S3C2410_IRQSUB(0)))
static void s3c2443_irq_uart3_mask(unsigned int irqno)
static void s3c2443_irq_uart3_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_UART3, SUBMSK_UART3);
s3c_irqsub_mask(data->irq, INTMSK_UART3, SUBMSK_UART3);
}
static void s3c2443_irq_uart3_unmask(unsigned int irqno)
static void s3c2443_irq_uart3_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_UART3);
s3c_irqsub_unmask(data->irq, INTMSK_UART3);
}
static void s3c2443_irq_uart3_ack(unsigned int irqno)
static void s3c2443_irq_uart3_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_UART3, SUBMSK_UART3);
s3c_irqsub_maskack(data->irq, INTMSK_UART3, SUBMSK_UART3);
}
static struct irq_chip s3c2443_irq_uart3 = {
.mask = s3c2443_irq_uart3_mask,
.unmask = s3c2443_irq_uart3_unmask,
.ack = s3c2443_irq_uart3_ack,
.irq_mask = s3c2443_irq_uart3_mask,
.irq_unmask = s3c2443_irq_uart3_unmask,
.irq_ack = s3c2443_irq_uart3_ack,
};
/* CAM sub interrupts */
static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc)
@@ -204,25 +199,25 @@ static void s3c2443_irq_demux_cam(unsigned int irq, struct irq_desc *desc)
#define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0))
#define SUBMSK_CAM INTMSK(IRQ_S3C2440_CAM_C, IRQ_S3C2440_CAM_P)
static void s3c2443_irq_cam_mask(unsigned int irqno)
static void s3c2443_irq_cam_mask(struct irq_data *data)
{
s3c_irqsub_mask(irqno, INTMSK_CAM, SUBMSK_CAM);
s3c_irqsub_mask(data->irq, INTMSK_CAM, SUBMSK_CAM);
}
static void s3c2443_irq_cam_unmask(unsigned int irqno)
static void s3c2443_irq_cam_unmask(struct irq_data *data)
{
s3c_irqsub_unmask(irqno, INTMSK_CAM);
s3c_irqsub_unmask(data->irq, INTMSK_CAM);
}
static void s3c2443_irq_cam_ack(unsigned int irqno)
static void s3c2443_irq_cam_ack(struct irq_data *data)
{
s3c_irqsub_maskack(irqno, INTMSK_CAM, SUBMSK_CAM);
s3c_irqsub_maskack(data->irq, INTMSK_CAM, SUBMSK_CAM);
}
static struct irq_chip s3c2443_irq_cam = {
.mask = s3c2443_irq_cam_mask,
.unmask = s3c2443_irq_cam_unmask,
.ack = s3c2443_irq_cam_ack,
.irq_mask = s3c2443_irq_cam_mask,
.irq_unmask = s3c2443_irq_cam_unmask,
.irq_ack = s3c2443_irq_cam_ack,
};
/* IRQ initialisation code */
arch/arm/mach-s3c2443/mach-smdk2443.c
+8 -1
View File
@@ -99,13 +99,20 @@ static struct s3c2410_uartcfg smdk2443_uartcfgs[] __initdata = {
.ucon = 0x3c5,
.ulcon = 0x43,
.ufcon = 0x51,
},
[3] = {
.hwport = 3,
.flags = 0,
.ucon = 0x3c5,
.ulcon = 0x03,
.ufcon = 0x51,
}
};
static struct platform_device *smdk2443_devices[] __initdata = {
&s3c_device_wdt,
&s3c_device_i2c0,
&s3c_device_hsmmc0,
&s3c_device_hsmmc1,
#ifdef CONFIG_SND_SOC_SMDK2443_WM9710
&s3c_device_ac97,
#endif

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