MIPS: Octeon: Update L2 Cache code for CN63XX

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The CN63XX has a different L2 cache architecture.  Update the helper
functions to reflect this.

Some joining of split lines was also done to improve readability, as
well as reformatting of comments.

Signed-off-by: David Daney <ddaney@caviumnetworks.com>
Patchwork: http://patchwork.linux-mips.org/patch/1663/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

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This commit is contained in:

David Daney

2010-10-07 16:03:42 -07:00

committed by Ralf Baechle

parent a70b13a9f0

commit b8db85b5b5

3 changed files with 628 additions and 416 deletions

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arch/mips/cavium-octeon/executive/cvmx-l2c.c

+487 -321

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