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Merge branch 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
* 'for-next' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68k,m68knommu: merge header files Resolve trivial conflict in arch/m68knommu/include/asm/Kbuild
This commit is contained in:
Linus Torvalds
@@ -1,2 +0,0 @@
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include include/asm-generic/Kbuild.asm
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header-y += cachectl.h
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@@ -1,67 +0,0 @@
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/* a.out coredump register dumper
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*
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* Copyright (C) 2007 Red Hat, Inc. All Rights Reserved.
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* Written by David Howells (dhowells@redhat.com)
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public Licence
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* as published by the Free Software Foundation; either version
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* 2 of the Licence, or (at your option) any later version.
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*/
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#ifndef _ASM_A_OUT_CORE_H
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#define _ASM_A_OUT_CORE_H
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#ifdef __KERNEL__
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#include <linux/user.h>
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#include <linux/elfcore.h>
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/*
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* fill in the user structure for an a.out core dump
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*/
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static inline void aout_dump_thread(struct pt_regs *regs, struct user *dump)
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{
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struct switch_stack *sw;
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/* changed the size calculations - should hopefully work better. lbt */
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dump->magic = CMAGIC;
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dump->start_code = 0;
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dump->start_stack = rdusp() & ~(PAGE_SIZE - 1);
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dump->u_tsize = ((unsigned long) current->mm->end_code) >> PAGE_SHIFT;
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dump->u_dsize = ((unsigned long) (current->mm->brk +
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(PAGE_SIZE-1))) >> PAGE_SHIFT;
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dump->u_dsize -= dump->u_tsize;
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dump->u_ssize = 0;
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if (dump->start_stack < TASK_SIZE)
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dump->u_ssize = ((unsigned long) (TASK_SIZE - dump->start_stack)) >> PAGE_SHIFT;
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dump->u_ar0 = offsetof(struct user, regs);
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sw = ((struct switch_stack *)regs) - 1;
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dump->regs.d1 = regs->d1;
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dump->regs.d2 = regs->d2;
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dump->regs.d3 = regs->d3;
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dump->regs.d4 = regs->d4;
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dump->regs.d5 = regs->d5;
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dump->regs.d6 = sw->d6;
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dump->regs.d7 = sw->d7;
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dump->regs.a0 = regs->a0;
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dump->regs.a1 = regs->a1;
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dump->regs.a2 = regs->a2;
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dump->regs.a3 = sw->a3;
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dump->regs.a4 = sw->a4;
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dump->regs.a5 = sw->a5;
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dump->regs.a6 = sw->a6;
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dump->regs.d0 = regs->d0;
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dump->regs.orig_d0 = regs->orig_d0;
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dump->regs.stkadj = regs->stkadj;
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dump->regs.sr = regs->sr;
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dump->regs.pc = regs->pc;
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dump->regs.fmtvec = (regs->format << 12) | regs->vector;
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/* dump floating point stuff */
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dump->u_fpvalid = dump_fpu (regs, &dump->m68kfp);
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}
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#endif /* __KERNEL__ */
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#endif /* _ASM_A_OUT_CORE_H */
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@@ -1,20 +0,0 @@
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#ifndef __M68K_A_OUT_H__
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#define __M68K_A_OUT_H__
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struct exec
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{
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unsigned long a_info; /* Use macros N_MAGIC, etc for access */
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unsigned a_text; /* length of text, in bytes */
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unsigned a_data; /* length of data, in bytes */
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unsigned a_bss; /* length of uninitialized data area for file, in bytes */
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unsigned a_syms; /* length of symbol table data in file, in bytes */
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unsigned a_entry; /* start address */
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unsigned a_trsize; /* length of relocation info for text, in bytes */
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unsigned a_drsize; /* length of relocation info for data, in bytes */
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};
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#define N_TRSIZE(a) ((a).a_trsize)
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#define N_DRSIZE(a) ((a).a_drsize)
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#define N_SYMSIZE(a) ((a).a_syms)
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#endif /* __M68K_A_OUT_H__ */
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@@ -1,44 +0,0 @@
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/*
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* ADB through the IOP
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* Written by Joshua M. Thompson
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*/
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/* IOP number and channel number for ADB */
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#define ADB_IOP IOP_NUM_ISM
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#define ADB_CHAN 2
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/* From the A/UX headers...maybe important, maybe not */
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#define ADB_IOP_LISTEN 0x01
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#define ADB_IOP_TALK 0x02
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#define ADB_IOP_EXISTS 0x04
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#define ADB_IOP_FLUSH 0x08
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#define ADB_IOP_RESET 0x10
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#define ADB_IOP_INT 0x20
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#define ADB_IOP_POLL 0x40
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#define ADB_IOP_UNINT 0x80
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#define AIF_RESET 0x00
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#define AIF_FLUSH 0x01
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#define AIF_LISTEN 0x08
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#define AIF_TALK 0x0C
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/* Flag bits in struct adb_iopmsg */
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#define ADB_IOP_EXPLICIT 0x80 /* nonzero if explicit command */
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#define ADB_IOP_AUTOPOLL 0x40 /* auto/SRQ polling enabled */
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#define ADB_IOP_SRQ 0x04 /* SRQ detected */
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#define ADB_IOP_TIMEOUT 0x02 /* nonzero if timeout */
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#ifndef __ASSEMBLY__
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struct adb_iopmsg {
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__u8 flags; /* ADB flags */
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__u8 count; /* no. of data bytes */
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__u8 cmd; /* ADB command */
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__u8 data[8]; /* ADB data */
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__u8 spare[21]; /* spare */
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};
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#endif /* __ASSEMBLY__ */
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@@ -1,350 +0,0 @@
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/*
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** asm-m68k/amigahw.h -- This header defines some macros and pointers for
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** the various Amiga custom hardware registers.
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** The naming conventions used here conform to those
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** used in the Amiga Hardware Reference Manual, 3rd Edition
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**
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** Copyright 1992 by Greg Harp
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**
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** This file is subject to the terms and conditions of the GNU General Public
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** License. See the file COPYING in the main directory of this archive
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** for more details.
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**
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** Created: 9/24/92 by Greg Harp
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*/
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#ifndef _M68K_AMIGAHW_H
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#define _M68K_AMIGAHW_H
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#include <linux/ioport.h>
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/*
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* Different Amiga models
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*/
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#define AMI_UNKNOWN (0)
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#define AMI_500 (1)
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#define AMI_500PLUS (2)
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#define AMI_600 (3)
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#define AMI_1000 (4)
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#define AMI_1200 (5)
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#define AMI_2000 (6)
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#define AMI_2500 (7)
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#define AMI_3000 (8)
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#define AMI_3000T (9)
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#define AMI_3000PLUS (10)
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#define AMI_4000 (11)
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#define AMI_4000T (12)
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#define AMI_CDTV (13)
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#define AMI_CD32 (14)
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#define AMI_DRACO (15)
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/*
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* Chipsets
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*/
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extern unsigned long amiga_chipset;
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#define CS_STONEAGE (0)
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#define CS_OCS (1)
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#define CS_ECS (2)
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#define CS_AGA (3)
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/*
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* Miscellaneous
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*/
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extern unsigned long amiga_eclock; /* 700 kHz E Peripheral Clock */
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extern unsigned long amiga_colorclock; /* 3.5 MHz Color Clock */
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extern unsigned long amiga_chip_size; /* Chip RAM Size (bytes) */
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extern unsigned char amiga_vblank; /* VBLANK Frequency */
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#define AMIGAHW_DECLARE(name) unsigned name : 1
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#define AMIGAHW_SET(name) (amiga_hw_present.name = 1)
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#define AMIGAHW_PRESENT(name) (amiga_hw_present.name)
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struct amiga_hw_present {
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/* video hardware */
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AMIGAHW_DECLARE(AMI_VIDEO); /* Amiga Video */
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AMIGAHW_DECLARE(AMI_BLITTER); /* Amiga Blitter */
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AMIGAHW_DECLARE(AMBER_FF); /* Amber Flicker Fixer */
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/* sound hardware */
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AMIGAHW_DECLARE(AMI_AUDIO); /* Amiga Audio */
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/* disk storage interfaces */
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AMIGAHW_DECLARE(AMI_FLOPPY); /* Amiga Floppy */
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AMIGAHW_DECLARE(A3000_SCSI); /* SCSI (wd33c93, A3000 alike) */
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AMIGAHW_DECLARE(A4000_SCSI); /* SCSI (ncr53c710, A4000T alike) */
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AMIGAHW_DECLARE(A1200_IDE); /* IDE (A1200 alike) */
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AMIGAHW_DECLARE(A4000_IDE); /* IDE (A4000 alike) */
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AMIGAHW_DECLARE(CD_ROM); /* CD ROM drive */
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/* other I/O hardware */
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AMIGAHW_DECLARE(AMI_KEYBOARD); /* Amiga Keyboard */
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AMIGAHW_DECLARE(AMI_MOUSE); /* Amiga Mouse */
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AMIGAHW_DECLARE(AMI_SERIAL); /* Amiga Serial */
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AMIGAHW_DECLARE(AMI_PARALLEL); /* Amiga Parallel */
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/* real time clocks */
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AMIGAHW_DECLARE(A2000_CLK); /* Hardware Clock (A2000 alike) */
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AMIGAHW_DECLARE(A3000_CLK); /* Hardware Clock (A3000 alike) */
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/* supporting hardware */
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AMIGAHW_DECLARE(CHIP_RAM); /* Chip RAM */
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AMIGAHW_DECLARE(PAULA); /* Paula (8364) */
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AMIGAHW_DECLARE(DENISE); /* Denise (8362) */
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AMIGAHW_DECLARE(DENISE_HR); /* Denise (8373) */
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AMIGAHW_DECLARE(LISA); /* Lisa (8375) */
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AMIGAHW_DECLARE(AGNUS_PAL); /* Normal/Fat PAL Agnus (8367/8371) */
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AMIGAHW_DECLARE(AGNUS_NTSC); /* Normal/Fat NTSC Agnus (8361/8370) */
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AMIGAHW_DECLARE(AGNUS_HR_PAL); /* Fat Hires PAL Agnus (8372) */
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AMIGAHW_DECLARE(AGNUS_HR_NTSC); /* Fat Hires NTSC Agnus (8372) */
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AMIGAHW_DECLARE(ALICE_PAL); /* PAL Alice (8374) */
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AMIGAHW_DECLARE(ALICE_NTSC); /* NTSC Alice (8374) */
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AMIGAHW_DECLARE(MAGIC_REKICK); /* A3000 Magic Hard Rekick */
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AMIGAHW_DECLARE(PCMCIA); /* PCMCIA Slot */
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AMIGAHW_DECLARE(GG2_ISA); /* GG2 Zorro2ISA Bridge */
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AMIGAHW_DECLARE(ZORRO); /* Zorro AutoConfig */
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AMIGAHW_DECLARE(ZORRO3); /* Zorro III */
|
||||
};
|
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|
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extern struct amiga_hw_present amiga_hw_present;
|
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|
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struct CUSTOM {
|
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unsigned short bltddat;
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unsigned short dmaconr;
|
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unsigned short vposr;
|
||||
unsigned short vhposr;
|
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unsigned short dskdatr;
|
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unsigned short joy0dat;
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unsigned short joy1dat;
|
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unsigned short clxdat;
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unsigned short adkconr;
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unsigned short pot0dat;
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unsigned short pot1dat;
|
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unsigned short potgor;
|
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unsigned short serdatr;
|
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unsigned short dskbytr;
|
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unsigned short intenar;
|
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unsigned short intreqr;
|
||||
unsigned char *dskptr;
|
||||
unsigned short dsklen;
|
||||
unsigned short dskdat;
|
||||
unsigned short refptr;
|
||||
unsigned short vposw;
|
||||
unsigned short vhposw;
|
||||
unsigned short copcon;
|
||||
unsigned short serdat;
|
||||
unsigned short serper;
|
||||
unsigned short potgo;
|
||||
unsigned short joytest;
|
||||
unsigned short strequ;
|
||||
unsigned short strvbl;
|
||||
unsigned short strhor;
|
||||
unsigned short strlong;
|
||||
unsigned short bltcon0;
|
||||
unsigned short bltcon1;
|
||||
unsigned short bltafwm;
|
||||
unsigned short bltalwm;
|
||||
unsigned char *bltcpt;
|
||||
unsigned char *bltbpt;
|
||||
unsigned char *bltapt;
|
||||
unsigned char *bltdpt;
|
||||
unsigned short bltsize;
|
||||
unsigned char pad2d;
|
||||
unsigned char bltcon0l;
|
||||
unsigned short bltsizv;
|
||||
unsigned short bltsizh;
|
||||
unsigned short bltcmod;
|
||||
unsigned short bltbmod;
|
||||
unsigned short bltamod;
|
||||
unsigned short bltdmod;
|
||||
unsigned short spare2[4];
|
||||
unsigned short bltcdat;
|
||||
unsigned short bltbdat;
|
||||
unsigned short bltadat;
|
||||
unsigned short spare3[3];
|
||||
unsigned short deniseid;
|
||||
unsigned short dsksync;
|
||||
unsigned short *cop1lc;
|
||||
unsigned short *cop2lc;
|
||||
unsigned short copjmp1;
|
||||
unsigned short copjmp2;
|
||||
unsigned short copins;
|
||||
unsigned short diwstrt;
|
||||
unsigned short diwstop;
|
||||
unsigned short ddfstrt;
|
||||
unsigned short ddfstop;
|
||||
unsigned short dmacon;
|
||||
unsigned short clxcon;
|
||||
unsigned short intena;
|
||||
unsigned short intreq;
|
||||
unsigned short adkcon;
|
||||
struct {
|
||||
unsigned short *audlc;
|
||||
unsigned short audlen;
|
||||
unsigned short audper;
|
||||
unsigned short audvol;
|
||||
unsigned short auddat;
|
||||
unsigned short audspare[2];
|
||||
} aud[4];
|
||||
unsigned char *bplpt[8];
|
||||
unsigned short bplcon0;
|
||||
unsigned short bplcon1;
|
||||
unsigned short bplcon2;
|
||||
unsigned short bplcon3;
|
||||
unsigned short bpl1mod;
|
||||
unsigned short bpl2mod;
|
||||
unsigned short bplcon4;
|
||||
unsigned short clxcon2;
|
||||
unsigned short bpldat[8];
|
||||
unsigned char *sprpt[8];
|
||||
struct {
|
||||
unsigned short pos;
|
||||
unsigned short ctl;
|
||||
unsigned short dataa;
|
||||
unsigned short datab;
|
||||
} spr[8];
|
||||
unsigned short color[32];
|
||||
unsigned short htotal;
|
||||
unsigned short hsstop;
|
||||
unsigned short hbstrt;
|
||||
unsigned short hbstop;
|
||||
unsigned short vtotal;
|
||||
unsigned short vsstop;
|
||||
unsigned short vbstrt;
|
||||
unsigned short vbstop;
|
||||
unsigned short sprhstrt;
|
||||
unsigned short sprhstop;
|
||||
unsigned short bplhstrt;
|
||||
unsigned short bplhstop;
|
||||
unsigned short hhposw;
|
||||
unsigned short hhposr;
|
||||
unsigned short beamcon0;
|
||||
unsigned short hsstrt;
|
||||
unsigned short vsstrt;
|
||||
unsigned short hcenter;
|
||||
unsigned short diwhigh;
|
||||
unsigned short spare4[11];
|
||||
unsigned short fmode;
|
||||
};
|
||||
|
||||
/*
|
||||
* DMA register bits
|
||||
*/
|
||||
#define DMAF_SETCLR (0x8000)
|
||||
#define DMAF_AUD0 (0x0001)
|
||||
#define DMAF_AUD1 (0x0002)
|
||||
#define DMAF_AUD2 (0x0004)
|
||||
#define DMAF_AUD3 (0x0008)
|
||||
#define DMAF_DISK (0x0010)
|
||||
#define DMAF_SPRITE (0x0020)
|
||||
#define DMAF_BLITTER (0x0040)
|
||||
#define DMAF_COPPER (0x0080)
|
||||
#define DMAF_RASTER (0x0100)
|
||||
#define DMAF_MASTER (0x0200)
|
||||
#define DMAF_BLITHOG (0x0400)
|
||||
#define DMAF_BLTNZERO (0x2000)
|
||||
#define DMAF_BLTDONE (0x4000)
|
||||
#define DMAF_ALL (0x01FF)
|
||||
|
||||
struct CIA {
|
||||
unsigned char pra; char pad0[0xff];
|
||||
unsigned char prb; char pad1[0xff];
|
||||
unsigned char ddra; char pad2[0xff];
|
||||
unsigned char ddrb; char pad3[0xff];
|
||||
unsigned char talo; char pad4[0xff];
|
||||
unsigned char tahi; char pad5[0xff];
|
||||
unsigned char tblo; char pad6[0xff];
|
||||
unsigned char tbhi; char pad7[0xff];
|
||||
unsigned char todlo; char pad8[0xff];
|
||||
unsigned char todmid; char pad9[0xff];
|
||||
unsigned char todhi; char pada[0x1ff];
|
||||
unsigned char sdr; char padb[0xff];
|
||||
unsigned char icr; char padc[0xff];
|
||||
unsigned char cra; char padd[0xff];
|
||||
unsigned char crb; char pade[0xff];
|
||||
};
|
||||
|
||||
#define zTwoBase (0x80000000)
|
||||
#define ZTWO_PADDR(x) (((unsigned long)(x))-zTwoBase)
|
||||
#define ZTWO_VADDR(x) (((unsigned long)(x))+zTwoBase)
|
||||
|
||||
#define CUSTOM_PHYSADDR (0xdff000)
|
||||
#define amiga_custom ((*(volatile struct CUSTOM *)(zTwoBase+CUSTOM_PHYSADDR)))
|
||||
|
||||
#define CIAA_PHYSADDR (0xbfe001)
|
||||
#define CIAB_PHYSADDR (0xbfd000)
|
||||
#define ciaa ((*(volatile struct CIA *)(zTwoBase + CIAA_PHYSADDR)))
|
||||
#define ciab ((*(volatile struct CIA *)(zTwoBase + CIAB_PHYSADDR)))
|
||||
|
||||
#define CHIP_PHYSADDR (0x000000)
|
||||
|
||||
void amiga_chip_init (void);
|
||||
void *amiga_chip_alloc(unsigned long size, const char *name);
|
||||
void *amiga_chip_alloc_res(unsigned long size, struct resource *res);
|
||||
void amiga_chip_free(void *ptr);
|
||||
unsigned long amiga_chip_avail( void ); /*MILAN*/
|
||||
extern volatile unsigned short amiga_audio_min_period;
|
||||
|
||||
static inline void amifb_video_off(void)
|
||||
{
|
||||
if (amiga_chipset == CS_ECS || amiga_chipset == CS_AGA) {
|
||||
/* program Denise/Lisa for a higher maximum play rate */
|
||||
amiga_custom.htotal = 113; /* 31 kHz */
|
||||
amiga_custom.vtotal = 223; /* 70 Hz */
|
||||
amiga_custom.beamcon0 = 0x4390; /* HARDDIS, VAR{BEAM,VSY,HSY,CSY}EN */
|
||||
/* suspend the monitor */
|
||||
amiga_custom.hsstrt = amiga_custom.hsstop = 116;
|
||||
amiga_custom.vsstrt = amiga_custom.vsstop = 226;
|
||||
amiga_audio_min_period = 57;
|
||||
}
|
||||
}
|
||||
|
||||
struct tod3000 {
|
||||
unsigned int :28, second2:4; /* lower digit */
|
||||
unsigned int :28, second1:4; /* upper digit */
|
||||
unsigned int :28, minute2:4; /* lower digit */
|
||||
unsigned int :28, minute1:4; /* upper digit */
|
||||
unsigned int :28, hour2:4; /* lower digit */
|
||||
unsigned int :28, hour1:4; /* upper digit */
|
||||
unsigned int :28, weekday:4;
|
||||
unsigned int :28, day2:4; /* lower digit */
|
||||
unsigned int :28, day1:4; /* upper digit */
|
||||
unsigned int :28, month2:4; /* lower digit */
|
||||
unsigned int :28, month1:4; /* upper digit */
|
||||
unsigned int :28, year2:4; /* lower digit */
|
||||
unsigned int :28, year1:4; /* upper digit */
|
||||
unsigned int :28, cntrl1:4; /* control-byte 1 */
|
||||
unsigned int :28, cntrl2:4; /* control-byte 2 */
|
||||
unsigned int :28, cntrl3:4; /* control-byte 3 */
|
||||
};
|
||||
#define TOD3000_CNTRL1_HOLD 0
|
||||
#define TOD3000_CNTRL1_FREE 9
|
||||
#define tod_3000 ((*(volatile struct tod3000 *)(zTwoBase+0xDC0000)))
|
||||
|
||||
struct tod2000 {
|
||||
unsigned int :28, second2:4; /* lower digit */
|
||||
unsigned int :28, second1:4; /* upper digit */
|
||||
unsigned int :28, minute2:4; /* lower digit */
|
||||
unsigned int :28, minute1:4; /* upper digit */
|
||||
unsigned int :28, hour2:4; /* lower digit */
|
||||
unsigned int :28, hour1:4; /* upper digit */
|
||||
unsigned int :28, day2:4; /* lower digit */
|
||||
unsigned int :28, day1:4; /* upper digit */
|
||||
unsigned int :28, month2:4; /* lower digit */
|
||||
unsigned int :28, month1:4; /* upper digit */
|
||||
unsigned int :28, year2:4; /* lower digit */
|
||||
unsigned int :28, year1:4; /* upper digit */
|
||||
unsigned int :28, weekday:4;
|
||||
unsigned int :28, cntrl1:4; /* control-byte 1 */
|
||||
unsigned int :28, cntrl2:4; /* control-byte 2 */
|
||||
unsigned int :28, cntrl3:4; /* control-byte 3 */
|
||||
};
|
||||
|
||||
#define TOD2000_CNTRL1_HOLD (1<<0)
|
||||
#define TOD2000_CNTRL1_BUSY (1<<1)
|
||||
#define TOD2000_CNTRL3_24HMODE (1<<2)
|
||||
#define TOD2000_HOUR1_PM (1<<2)
|
||||
#define tod_2000 ((*(volatile struct tod2000 *)(zTwoBase+0xDC0000)))
|
||||
|
||||
#endif /* _M68K_AMIGAHW_H */
|
||||
@@ -1,113 +0,0 @@
|
||||
/*
|
||||
** amigaints.h -- Amiga Linux interrupt handling structs and prototypes
|
||||
**
|
||||
** Copyright 1992 by Greg Harp
|
||||
**
|
||||
** This file is subject to the terms and conditions of the GNU General Public
|
||||
** License. See the file COPYING in the main directory of this archive
|
||||
** for more details.
|
||||
**
|
||||
** Created 10/2/92 by Greg Harp
|
||||
*/
|
||||
|
||||
#ifndef _ASMm68k_AMIGAINTS_H_
|
||||
#define _ASMm68k_AMIGAINTS_H_
|
||||
|
||||
#include <asm/irq.h>
|
||||
|
||||
/*
|
||||
** Amiga Interrupt sources.
|
||||
**
|
||||
*/
|
||||
|
||||
#define AUTO_IRQS (8)
|
||||
#define AMI_STD_IRQS (14)
|
||||
#define CIA_IRQS (5)
|
||||
#define AMI_IRQS (32) /* AUTO_IRQS+AMI_STD_IRQS+2*CIA_IRQS */
|
||||
|
||||
/* builtin serial port interrupts */
|
||||
#define IRQ_AMIGA_TBE (IRQ_USER+0)
|
||||
#define IRQ_AMIGA_RBF (IRQ_USER+11)
|
||||
|
||||
/* floppy disk interrupts */
|
||||
#define IRQ_AMIGA_DSKBLK (IRQ_USER+1)
|
||||
#define IRQ_AMIGA_DSKSYN (IRQ_USER+12)
|
||||
|
||||
/* software interrupts */
|
||||
#define IRQ_AMIGA_SOFT (IRQ_USER+2)
|
||||
|
||||
/* interrupts from external hardware */
|
||||
#define IRQ_AMIGA_PORTS IRQ_AUTO_2
|
||||
#define IRQ_AMIGA_EXTER IRQ_AUTO_6
|
||||
|
||||
/* copper interrupt */
|
||||
#define IRQ_AMIGA_COPPER (IRQ_USER+4)
|
||||
|
||||
/* vertical blanking interrupt */
|
||||
#define IRQ_AMIGA_VERTB (IRQ_USER+5)
|
||||
|
||||
/* Blitter done interrupt */
|
||||
#define IRQ_AMIGA_BLIT (IRQ_USER+6)
|
||||
|
||||
/* Audio interrupts */
|
||||
#define IRQ_AMIGA_AUD0 (IRQ_USER+7)
|
||||
#define IRQ_AMIGA_AUD1 (IRQ_USER+8)
|
||||
#define IRQ_AMIGA_AUD2 (IRQ_USER+9)
|
||||
#define IRQ_AMIGA_AUD3 (IRQ_USER+10)
|
||||
|
||||
/* CIA interrupt sources */
|
||||
#define IRQ_AMIGA_CIAA (IRQ_USER+14)
|
||||
#define IRQ_AMIGA_CIAA_TA (IRQ_USER+14)
|
||||
#define IRQ_AMIGA_CIAA_TB (IRQ_USER+15)
|
||||
#define IRQ_AMIGA_CIAA_ALRM (IRQ_USER+16)
|
||||
#define IRQ_AMIGA_CIAA_SP (IRQ_USER+17)
|
||||
#define IRQ_AMIGA_CIAA_FLG (IRQ_USER+18)
|
||||
#define IRQ_AMIGA_CIAB (IRQ_USER+19)
|
||||
#define IRQ_AMIGA_CIAB_TA (IRQ_USER+19)
|
||||
#define IRQ_AMIGA_CIAB_TB (IRQ_USER+20)
|
||||
#define IRQ_AMIGA_CIAB_ALRM (IRQ_USER+21)
|
||||
#define IRQ_AMIGA_CIAB_SP (IRQ_USER+22)
|
||||
#define IRQ_AMIGA_CIAB_FLG (IRQ_USER+23)
|
||||
|
||||
|
||||
/* INTREQR masks */
|
||||
#define IF_SETCLR 0x8000 /* set/clr bit */
|
||||
#define IF_INTEN 0x4000 /* master interrupt bit in INT* registers */
|
||||
#define IF_EXTER 0x2000 /* external level 6 and CIA B interrupt */
|
||||
#define IF_DSKSYN 0x1000 /* disk sync interrupt */
|
||||
#define IF_RBF 0x0800 /* serial receive buffer full interrupt */
|
||||
#define IF_AUD3 0x0400 /* audio channel 3 done interrupt */
|
||||
#define IF_AUD2 0x0200 /* audio channel 2 done interrupt */
|
||||
#define IF_AUD1 0x0100 /* audio channel 1 done interrupt */
|
||||
#define IF_AUD0 0x0080 /* audio channel 0 done interrupt */
|
||||
#define IF_BLIT 0x0040 /* blitter done interrupt */
|
||||
#define IF_VERTB 0x0020 /* vertical blanking interrupt */
|
||||
#define IF_COPER 0x0010 /* copper interrupt */
|
||||
#define IF_PORTS 0x0008 /* external level 2 and CIA A interrupt */
|
||||
#define IF_SOFT 0x0004 /* software initiated interrupt */
|
||||
#define IF_DSKBLK 0x0002 /* diskblock DMA finished */
|
||||
#define IF_TBE 0x0001 /* serial transmit buffer empty interrupt */
|
||||
|
||||
/* CIA interrupt control register bits */
|
||||
|
||||
#define CIA_ICR_TA 0x01
|
||||
#define CIA_ICR_TB 0x02
|
||||
#define CIA_ICR_ALRM 0x04
|
||||
#define CIA_ICR_SP 0x08
|
||||
#define CIA_ICR_FLG 0x10
|
||||
#define CIA_ICR_ALL 0x1f
|
||||
#define CIA_ICR_SETCLR 0x80
|
||||
|
||||
extern void amiga_init_IRQ(void);
|
||||
|
||||
/* to access the interrupt control registers of CIA's use only
|
||||
** these functions, they behave exactly like the amiga os routines
|
||||
*/
|
||||
|
||||
extern struct ciabase ciaa_base, ciab_base;
|
||||
|
||||
extern void cia_init_IRQ(struct ciabase *base);
|
||||
extern unsigned char cia_set_irq(struct ciabase *base, unsigned char mask);
|
||||
extern unsigned char cia_able_irq(struct ciabase *base, unsigned char mask);
|
||||
|
||||
#endif /* asm-m68k/amigaints.h */
|
||||
@@ -1,107 +0,0 @@
|
||||
/*
|
||||
** asm-m68k/amigayle.h -- This header defines the registers of the gayle chip
|
||||
** found on the Amiga 1200
|
||||
** This information was found by disassembling card.resource,
|
||||
** so the definitions may not be 100% correct
|
||||
** anyone has an official doc ?
|
||||
**
|
||||
** Copyright 1997 by Alain Malek
|
||||
**
|
||||
** This file is subject to the terms and conditions of the GNU General Public
|
||||
** License. See the file COPYING in the main directory of this archive
|
||||
** for more details.
|
||||
**
|
||||
** Created: 11/28/97 by Alain Malek
|
||||
*/
|
||||
|
||||
#ifndef _M68K_AMIGAYLE_H_
|
||||
#define _M68K_AMIGAYLE_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <asm/amigahw.h>
|
||||
|
||||
/* memory layout */
|
||||
|
||||
#define GAYLE_RAM (0x600000+zTwoBase)
|
||||
#define GAYLE_RAMSIZE (0x400000)
|
||||
#define GAYLE_ATTRIBUTE (0xa00000+zTwoBase)
|
||||
#define GAYLE_ATTRIBUTESIZE (0x020000)
|
||||
#define GAYLE_IO (0xa20000+zTwoBase) /* 16bit and even 8bit registers */
|
||||
#define GAYLE_IOSIZE (0x010000)
|
||||
#define GAYLE_IO_8BITODD (0xa30000+zTwoBase) /* odd 8bit registers */
|
||||
|
||||
/* offset for accessing odd IO registers */
|
||||
#define GAYLE_ODD (GAYLE_IO_8BITODD-GAYLE_IO-1)
|
||||
|
||||
/* GAYLE registers */
|
||||
|
||||
struct GAYLE {
|
||||
u_char cardstatus;
|
||||
u_char pad0[0x1000-1];
|
||||
|
||||
u_char intreq;
|
||||
u_char pad1[0x1000-1];
|
||||
|
||||
u_char inten;
|
||||
u_char pad2[0x1000-1];
|
||||
|
||||
u_char config;
|
||||
u_char pad3[0x1000-1];
|
||||
};
|
||||
|
||||
#define GAYLE_ADDRESS (0xda8000) /* gayle main registers base address */
|
||||
|
||||
#define GAYLE_RESET (0xa40000) /* write 0x00 to start reset,
|
||||
read 1 byte to stop reset */
|
||||
|
||||
#define gayle (*(volatile struct GAYLE *)(zTwoBase+GAYLE_ADDRESS))
|
||||
#define gayle_reset (*(volatile u_char *)(zTwoBase+GAYLE_RESET))
|
||||
|
||||
#define gayle_attribute ((volatile u_char *)(GAYLE_ATTRIBUTE))
|
||||
|
||||
#if 0
|
||||
#define gayle_inb(a) readb( GAYLE_IO+(a)+(((a)&1)*GAYLE_ODD) )
|
||||
#define gayle_outb(v,a) writeb( v, GAYLE_IO+(a)+(((a)&1)*GAYLE_ODD) )
|
||||
|
||||
#define gayle_inw(a) readw( GAYLE_IO+(a) )
|
||||
#define gayle_outw(v,a) writew( v, GAYLE_IO+(a) )
|
||||
#endif
|
||||
|
||||
/* GAYLE_CARDSTATUS bit def */
|
||||
|
||||
#define GAYLE_CS_CCDET 0x40 /* credit card detect */
|
||||
#define GAYLE_CS_BVD1 0x20 /* battery voltage detect 1 */
|
||||
#define GAYLE_CS_SC 0x20 /* credit card status change */
|
||||
#define GAYLE_CS_BVD2 0x10 /* battery voltage detect 2 */
|
||||
#define GAYLE_CS_DA 0x10 /* digital audio */
|
||||
#define GAYLE_CS_WR 0x08 /* write enable (1 == enabled) */
|
||||
#define GAYLE_CS_BSY 0x04 /* credit card busy */
|
||||
#define GAYLE_CS_IRQ 0x04 /* interrupt request */
|
||||
|
||||
/* GAYLE_IRQ bit def */
|
||||
|
||||
#define GAYLE_IRQ_IDE 0x80
|
||||
#define GAYLE_IRQ_CCDET 0x40
|
||||
#define GAYLE_IRQ_BVD1 0x20
|
||||
#define GAYLE_IRQ_SC 0x20
|
||||
#define GAYLE_IRQ_BVD2 0x10
|
||||
#define GAYLE_IRQ_DA 0x10
|
||||
#define GAYLE_IRQ_WR 0x08
|
||||
#define GAYLE_IRQ_BSY 0x04
|
||||
#define GAYLE_IRQ_IRQ 0x04
|
||||
#define GAYLE_IRQ_IDEACK1 0x02
|
||||
#define GAYLE_IRQ_IDEACK0 0x01
|
||||
|
||||
/* GAYLE_CONFIG bit def
|
||||
(bit 0-1 for program voltage, bit 2-3 for access speed */
|
||||
|
||||
#define GAYLE_CFG_0V 0x00
|
||||
#define GAYLE_CFG_5V 0x01
|
||||
#define GAYLE_CFG_12V 0x02
|
||||
|
||||
#define GAYLE_CFG_100NS 0x08
|
||||
#define GAYLE_CFG_150NS 0x04
|
||||
#define GAYLE_CFG_250NS 0x00
|
||||
#define GAYLE_CFG_720NS 0x0c
|
||||
|
||||
#endif /* asm-m68k/amigayle.h */
|
||||
@@ -1,110 +0,0 @@
|
||||
/*
|
||||
** asm-m68k/pcmcia.h -- Amiga Linux PCMCIA Definitions
|
||||
**
|
||||
** Copyright 1997 by Alain Malek
|
||||
**
|
||||
** This file is subject to the terms and conditions of the GNU General Public
|
||||
** License. See the file COPYING in the main directory of this archive
|
||||
** for more details.
|
||||
**
|
||||
** Created: 12/10/97 by Alain Malek
|
||||
*/
|
||||
|
||||
#ifndef __AMIGA_PCMCIA_H__
|
||||
#define __AMIGA_PCMCIA_H__
|
||||
|
||||
#include <asm/amigayle.h>
|
||||
|
||||
/* prototypes */
|
||||
|
||||
void pcmcia_reset(void);
|
||||
int pcmcia_copy_tuple(unsigned char tuple_id, void *tuple, int max_len);
|
||||
void pcmcia_program_voltage(int voltage);
|
||||
void pcmcia_access_speed(int speed);
|
||||
void pcmcia_write_enable(void);
|
||||
void pcmcia_write_disable(void);
|
||||
|
||||
static inline u_char pcmcia_read_status(void)
|
||||
{
|
||||
return (gayle.cardstatus & 0x7c);
|
||||
}
|
||||
|
||||
static inline u_char pcmcia_get_intreq(void)
|
||||
{
|
||||
return (gayle.intreq);
|
||||
}
|
||||
|
||||
static inline void pcmcia_ack_int(u_char intreq)
|
||||
{
|
||||
gayle.intreq = 0xf8;
|
||||
}
|
||||
|
||||
static inline void pcmcia_enable_irq(void)
|
||||
{
|
||||
gayle.inten |= GAYLE_IRQ_IRQ;
|
||||
}
|
||||
|
||||
static inline void pcmcia_disable_irq(void)
|
||||
{
|
||||
gayle.inten &= ~GAYLE_IRQ_IRQ;
|
||||
}
|
||||
|
||||
#define PCMCIA_INSERTED (gayle.cardstatus & GAYLE_CS_CCDET)
|
||||
|
||||
/* valid voltages for pcmcia_ProgramVoltage */
|
||||
|
||||
#define PCMCIA_0V 0
|
||||
#define PCMCIA_5V 5
|
||||
#define PCMCIA_12V 12
|
||||
|
||||
/* valid speeds for pcmcia_AccessSpeed */
|
||||
|
||||
#define PCMCIA_SPEED_100NS 100
|
||||
#define PCMCIA_SPEED_150NS 150
|
||||
#define PCMCIA_SPEED_250NS 250
|
||||
#define PCMCIA_SPEED_720NS 720
|
||||
|
||||
/* PCMCIA Tuple codes */
|
||||
|
||||
#define CISTPL_NULL 0x00
|
||||
#define CISTPL_DEVICE 0x01
|
||||
#define CISTPL_LONGLINK_CB 0x02
|
||||
#define CISTPL_CONFIG_CB 0x04
|
||||
#define CISTPL_CFTABLE_ENTRY_CB 0x05
|
||||
#define CISTPL_LONGLINK_MFC 0x06
|
||||
#define CISTPL_BAR 0x07
|
||||
#define CISTPL_CHECKSUM 0x10
|
||||
#define CISTPL_LONGLINK_A 0x11
|
||||
#define CISTPL_LONGLINK_C 0x12
|
||||
#define CISTPL_LINKTARGET 0x13
|
||||
#define CISTPL_NO_LINK 0x14
|
||||
#define CISTPL_VERS_1 0x15
|
||||
#define CISTPL_ALTSTR 0x16
|
||||
#define CISTPL_DEVICE_A 0x17
|
||||
#define CISTPL_JEDEC_C 0x18
|
||||
#define CISTPL_JEDEC_A 0x19
|
||||
#define CISTPL_CONFIG 0x1a
|
||||
#define CISTPL_CFTABLE_ENTRY 0x1b
|
||||
#define CISTPL_DEVICE_OC 0x1c
|
||||
#define CISTPL_DEVICE_OA 0x1d
|
||||
#define CISTPL_DEVICE_GEO 0x1e
|
||||
#define CISTPL_DEVICE_GEO_A 0x1f
|
||||
#define CISTPL_MANFID 0x20
|
||||
#define CISTPL_FUNCID 0x21
|
||||
#define CISTPL_FUNCE 0x22
|
||||
#define CISTPL_SWIL 0x23
|
||||
#define CISTPL_END 0xff
|
||||
|
||||
/* FUNCID */
|
||||
|
||||
#define CISTPL_FUNCID_MULTI 0x00
|
||||
#define CISTPL_FUNCID_MEMORY 0x01
|
||||
#define CISTPL_FUNCID_SERIAL 0x02
|
||||
#define CISTPL_FUNCID_PARALLEL 0x03
|
||||
#define CISTPL_FUNCID_FIXED 0x04
|
||||
#define CISTPL_FUNCID_VIDEO 0x05
|
||||
#define CISTPL_FUNCID_NETWORK 0x06
|
||||
#define CISTPL_FUNCID_AIMS 0x07
|
||||
#define CISTPL_FUNCID_SCSI 0x08
|
||||
|
||||
#endif
|
||||
@@ -1,248 +0,0 @@
|
||||
/*
|
||||
* linux/include/asm/dma.h: Defines for using and allocating dma channels.
|
||||
* Written by Hennus Bergman, 1992.
|
||||
* High DMA channel support & info by Hannu Savolainen
|
||||
* and John Boyd, Nov. 1992.
|
||||
*/
|
||||
|
||||
#ifndef _ASM_APOLLO_DMA_H
|
||||
#define _ASM_APOLLO_DMA_H
|
||||
|
||||
#include <asm/apollohw.h> /* need byte IO */
|
||||
#include <linux/spinlock.h> /* And spinlocks */
|
||||
#include <linux/delay.h>
|
||||
|
||||
|
||||
#define dma_outb(val,addr) (*((volatile unsigned char *)(addr+IO_BASE)) = (val))
|
||||
#define dma_inb(addr) (*((volatile unsigned char *)(addr+IO_BASE)))
|
||||
|
||||
/*
|
||||
* NOTES about DMA transfers:
|
||||
*
|
||||
* controller 1: channels 0-3, byte operations, ports 00-1F
|
||||
* controller 2: channels 4-7, word operations, ports C0-DF
|
||||
*
|
||||
* - ALL registers are 8 bits only, regardless of transfer size
|
||||
* - channel 4 is not used - cascades 1 into 2.
|
||||
* - channels 0-3 are byte - addresses/counts are for physical bytes
|
||||
* - channels 5-7 are word - addresses/counts are for physical words
|
||||
* - transfers must not cross physical 64K (0-3) or 128K (5-7) boundaries
|
||||
* - transfer count loaded to registers is 1 less than actual count
|
||||
* - controller 2 offsets are all even (2x offsets for controller 1)
|
||||
* - page registers for 5-7 don't use data bit 0, represent 128K pages
|
||||
* - page registers for 0-3 use bit 0, represent 64K pages
|
||||
*
|
||||
* DMA transfers are limited to the lower 16MB of _physical_ memory.
|
||||
* Note that addresses loaded into registers must be _physical_ addresses,
|
||||
* not logical addresses (which may differ if paging is active).
|
||||
*
|
||||
* Address mapping for channels 0-3:
|
||||
*
|
||||
* A23 ... A16 A15 ... A8 A7 ... A0 (Physical addresses)
|
||||
* | ... | | ... | | ... |
|
||||
* | ... | | ... | | ... |
|
||||
* | ... | | ... | | ... |
|
||||
* P7 ... P0 A7 ... A0 A7 ... A0
|
||||
* | Page | Addr MSB | Addr LSB | (DMA registers)
|
||||
*
|
||||
* Address mapping for channels 5-7:
|
||||
*
|
||||
* A23 ... A17 A16 A15 ... A9 A8 A7 ... A1 A0 (Physical addresses)
|
||||
* | ... | \ \ ... \ \ \ ... \ \
|
||||
* | ... | \ \ ... \ \ \ ... \ (not used)
|
||||
* | ... | \ \ ... \ \ \ ... \
|
||||
* P7 ... P1 (0) A7 A6 ... A0 A7 A6 ... A0
|
||||
* | Page | Addr MSB | Addr LSB | (DMA registers)
|
||||
*
|
||||
* Again, channels 5-7 transfer _physical_ words (16 bits), so addresses
|
||||
* and counts _must_ be word-aligned (the lowest address bit is _ignored_ at
|
||||
* the hardware level, so odd-byte transfers aren't possible).
|
||||
*
|
||||
* Transfer count (_not # bytes_) is limited to 64K, represented as actual
|
||||
* count - 1 : 64K => 0xFFFF, 1 => 0x0000. Thus, count is always 1 or more,
|
||||
* and up to 128K bytes may be transferred on channels 5-7 in one operation.
|
||||
*
|
||||
*/
|
||||
|
||||
#define MAX_DMA_CHANNELS 8
|
||||
|
||||
/* The maximum address that we can perform a DMA transfer to on this platform */#define MAX_DMA_ADDRESS (PAGE_OFFSET+0x1000000)
|
||||
|
||||
/* 8237 DMA controllers */
|
||||
#define IO_DMA1_BASE 0x10C00 /* 8 bit slave DMA, channels 0..3 */
|
||||
#define IO_DMA2_BASE 0x10D00 /* 16 bit master DMA, ch 4(=slave input)..7 */
|
||||
|
||||
/* DMA controller registers */
|
||||
#define DMA1_CMD_REG (IO_DMA1_BASE+0x08) /* command register (w) */
|
||||
#define DMA1_STAT_REG (IO_DMA1_BASE+0x08) /* status register (r) */
|
||||
#define DMA1_REQ_REG (IO_DMA1_BASE+0x09) /* request register (w) */
|
||||
#define DMA1_MASK_REG (IO_DMA1_BASE+0x0A) /* single-channel mask (w) */
|
||||
#define DMA1_MODE_REG (IO_DMA1_BASE+0x0B) /* mode register (w) */
|
||||
#define DMA1_CLEAR_FF_REG (IO_DMA1_BASE+0x0C) /* clear pointer flip-flop (w) */
|
||||
#define DMA1_TEMP_REG (IO_DMA1_BASE+0x0D) /* Temporary Register (r) */
|
||||
#define DMA1_RESET_REG (IO_DMA1_BASE+0x0D) /* Master Clear (w) */
|
||||
#define DMA1_CLR_MASK_REG (IO_DMA1_BASE+0x0E) /* Clear Mask */
|
||||
#define DMA1_MASK_ALL_REG (IO_DMA1_BASE+0x0F) /* all-channels mask (w) */
|
||||
|
||||
#define DMA2_CMD_REG (IO_DMA2_BASE+0x10) /* command register (w) */
|
||||
#define DMA2_STAT_REG (IO_DMA2_BASE+0x10) /* status register (r) */
|
||||
#define DMA2_REQ_REG (IO_DMA2_BASE+0x12) /* request register (w) */
|
||||
#define DMA2_MASK_REG (IO_DMA2_BASE+0x14) /* single-channel mask (w) */
|
||||
#define DMA2_MODE_REG (IO_DMA2_BASE+0x16) /* mode register (w) */
|
||||
#define DMA2_CLEAR_FF_REG (IO_DMA2_BASE+0x18) /* clear pointer flip-flop (w) */
|
||||
#define DMA2_TEMP_REG (IO_DMA2_BASE+0x1A) /* Temporary Register (r) */
|
||||
#define DMA2_RESET_REG (IO_DMA2_BASE+0x1A) /* Master Clear (w) */
|
||||
#define DMA2_CLR_MASK_REG (IO_DMA2_BASE+0x1C) /* Clear Mask */
|
||||
#define DMA2_MASK_ALL_REG (IO_DMA2_BASE+0x1E) /* all-channels mask (w) */
|
||||
|
||||
#define DMA_ADDR_0 (IO_DMA1_BASE+0x00) /* DMA address registers */
|
||||
#define DMA_ADDR_1 (IO_DMA1_BASE+0x02)
|
||||
#define DMA_ADDR_2 (IO_DMA1_BASE+0x04)
|
||||
#define DMA_ADDR_3 (IO_DMA1_BASE+0x06)
|
||||
#define DMA_ADDR_4 (IO_DMA2_BASE+0x00)
|
||||
#define DMA_ADDR_5 (IO_DMA2_BASE+0x04)
|
||||
#define DMA_ADDR_6 (IO_DMA2_BASE+0x08)
|
||||
#define DMA_ADDR_7 (IO_DMA2_BASE+0x0C)
|
||||
|
||||
#define DMA_CNT_0 (IO_DMA1_BASE+0x01) /* DMA count registers */
|
||||
#define DMA_CNT_1 (IO_DMA1_BASE+0x03)
|
||||
#define DMA_CNT_2 (IO_DMA1_BASE+0x05)
|
||||
#define DMA_CNT_3 (IO_DMA1_BASE+0x07)
|
||||
#define DMA_CNT_4 (IO_DMA2_BASE+0x02)
|
||||
#define DMA_CNT_5 (IO_DMA2_BASE+0x06)
|
||||
#define DMA_CNT_6 (IO_DMA2_BASE+0x0A)
|
||||
#define DMA_CNT_7 (IO_DMA2_BASE+0x0E)
|
||||
|
||||
#define DMA_MODE_READ 0x44 /* I/O to memory, no autoinit, increment, single mode */
|
||||
#define DMA_MODE_WRITE 0x48 /* memory to I/O, no autoinit, increment, single mode */
|
||||
#define DMA_MODE_CASCADE 0xC0 /* pass thru DREQ->HRQ, DACK<-HLDA only */
|
||||
|
||||
#define DMA_AUTOINIT 0x10
|
||||
|
||||
#define DMA_8BIT 0
|
||||
#define DMA_16BIT 1
|
||||
#define DMA_BUSMASTER 2
|
||||
|
||||
extern spinlock_t dma_spin_lock;
|
||||
|
||||
static __inline__ unsigned long claim_dma_lock(void)
|
||||
{
|
||||
unsigned long flags;
|
||||
spin_lock_irqsave(&dma_spin_lock, flags);
|
||||
return flags;
|
||||
}
|
||||
|
||||
static __inline__ void release_dma_lock(unsigned long flags)
|
||||
{
|
||||
spin_unlock_irqrestore(&dma_spin_lock, flags);
|
||||
}
|
||||
|
||||
/* enable/disable a specific DMA channel */
|
||||
static __inline__ void enable_dma(unsigned int dmanr)
|
||||
{
|
||||
if (dmanr<=3)
|
||||
dma_outb(dmanr, DMA1_MASK_REG);
|
||||
else
|
||||
dma_outb(dmanr & 3, DMA2_MASK_REG);
|
||||
}
|
||||
|
||||
static __inline__ void disable_dma(unsigned int dmanr)
|
||||
{
|
||||
if (dmanr<=3)
|
||||
dma_outb(dmanr | 4, DMA1_MASK_REG);
|
||||
else
|
||||
dma_outb((dmanr & 3) | 4, DMA2_MASK_REG);
|
||||
}
|
||||
|
||||
/* Clear the 'DMA Pointer Flip Flop'.
|
||||
* Write 0 for LSB/MSB, 1 for MSB/LSB access.
|
||||
* Use this once to initialize the FF to a known state.
|
||||
* After that, keep track of it. :-)
|
||||
* --- In order to do that, the DMA routines below should ---
|
||||
* --- only be used while holding the DMA lock ! ---
|
||||
*/
|
||||
static __inline__ void clear_dma_ff(unsigned int dmanr)
|
||||
{
|
||||
if (dmanr<=3)
|
||||
dma_outb(0, DMA1_CLEAR_FF_REG);
|
||||
else
|
||||
dma_outb(0, DMA2_CLEAR_FF_REG);
|
||||
}
|
||||
|
||||
/* set mode (above) for a specific DMA channel */
|
||||
static __inline__ void set_dma_mode(unsigned int dmanr, char mode)
|
||||
{
|
||||
if (dmanr<=3)
|
||||
dma_outb(mode | dmanr, DMA1_MODE_REG);
|
||||
else
|
||||
dma_outb(mode | (dmanr&3), DMA2_MODE_REG);
|
||||
}
|
||||
|
||||
/* Set transfer address & page bits for specific DMA channel.
|
||||
* Assumes dma flipflop is clear.
|
||||
*/
|
||||
static __inline__ void set_dma_addr(unsigned int dmanr, unsigned int a)
|
||||
{
|
||||
if (dmanr <= 3) {
|
||||
dma_outb( a & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
|
||||
dma_outb( (a>>8) & 0xff, ((dmanr&3)<<1) + IO_DMA1_BASE );
|
||||
} else {
|
||||
dma_outb( (a>>1) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
|
||||
dma_outb( (a>>9) & 0xff, ((dmanr&3)<<2) + IO_DMA2_BASE );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Set transfer size (max 64k for DMA1..3, 128k for DMA5..7) for
|
||||
* a specific DMA channel.
|
||||
* You must ensure the parameters are valid.
|
||||
* NOTE: from a manual: "the number of transfers is one more
|
||||
* than the initial word count"! This is taken into account.
|
||||
* Assumes dma flip-flop is clear.
|
||||
* NOTE 2: "count" represents _bytes_ and must be even for channels 5-7.
|
||||
*/
|
||||
static __inline__ void set_dma_count(unsigned int dmanr, unsigned int count)
|
||||
{
|
||||
count--;
|
||||
if (dmanr <= 3) {
|
||||
dma_outb( count & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
|
||||
dma_outb( (count>>8) & 0xff, ((dmanr&3)<<1) + 1 + IO_DMA1_BASE );
|
||||
} else {
|
||||
dma_outb( (count>>1) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
|
||||
dma_outb( (count>>9) & 0xff, ((dmanr&3)<<2) + 2 + IO_DMA2_BASE );
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/* Get DMA residue count. After a DMA transfer, this
|
||||
* should return zero. Reading this while a DMA transfer is
|
||||
* still in progress will return unpredictable results.
|
||||
* If called before the channel has been used, it may return 1.
|
||||
* Otherwise, it returns the number of _bytes_ left to transfer.
|
||||
*
|
||||
* Assumes DMA flip-flop is clear.
|
||||
*/
|
||||
static __inline__ int get_dma_residue(unsigned int dmanr)
|
||||
{
|
||||
unsigned int io_port = (dmanr<=3)? ((dmanr&3)<<1) + 1 + IO_DMA1_BASE
|
||||
: ((dmanr&3)<<2) + 2 + IO_DMA2_BASE;
|
||||
|
||||
/* using short to get 16-bit wrap around */
|
||||
unsigned short count;
|
||||
|
||||
count = 1 + dma_inb(io_port);
|
||||
count += dma_inb(io_port) << 8;
|
||||
|
||||
return (dmanr<=3)? count : (count<<1);
|
||||
}
|
||||
|
||||
|
||||
/* These are in kernel/dma.c: */
|
||||
extern int request_dma(unsigned int dmanr, const char * device_id); /* reserve a DMA channel */
|
||||
extern void free_dma(unsigned int dmanr); /* release it again */
|
||||
|
||||
/* These are in arch/m68k/apollo/dma.c: */
|
||||
extern unsigned short dma_map_page(unsigned long phys_addr,int count,int type);
|
||||
extern void dma_unmap_page(unsigned short dma_addr);
|
||||
|
||||
#endif /* _ASM_APOLLO_DMA_H */
|
||||
@@ -1,108 +0,0 @@
|
||||
/* apollohw.h : some structures to access apollo HW */
|
||||
|
||||
#ifndef _ASMm68k_APOLLOHW_H_
|
||||
#define _ASMm68k_APOLLOHW_H_
|
||||
|
||||
#include <linux/types.h>
|
||||
|
||||
/*
|
||||
apollo models
|
||||
*/
|
||||
|
||||
extern u_long apollo_model;
|
||||
|
||||
#define APOLLO_UNKNOWN (0)
|
||||
#define APOLLO_DN3000 (1)
|
||||
#define APOLLO_DN3010 (2)
|
||||
#define APOLLO_DN3500 (3)
|
||||
#define APOLLO_DN4000 (4)
|
||||
#define APOLLO_DN4500 (5)
|
||||
|
||||
/*
|
||||
see scn2681 data sheet for more info.
|
||||
member names are read_write.
|
||||
*/
|
||||
|
||||
#define DECLARE_2681_FIELD(x) unsigned char x; unsigned char dummy##x
|
||||
|
||||
struct SCN2681 {
|
||||
|
||||
DECLARE_2681_FIELD(mra);
|
||||
DECLARE_2681_FIELD(sra_csra);
|
||||
DECLARE_2681_FIELD(BRGtest_cra);
|
||||
DECLARE_2681_FIELD(rhra_thra);
|
||||
DECLARE_2681_FIELD(ipcr_acr);
|
||||
DECLARE_2681_FIELD(isr_imr);
|
||||
DECLARE_2681_FIELD(ctu_ctur);
|
||||
DECLARE_2681_FIELD(ctl_ctlr);
|
||||
DECLARE_2681_FIELD(mrb);
|
||||
DECLARE_2681_FIELD(srb_csrb);
|
||||
DECLARE_2681_FIELD(tst_crb);
|
||||
DECLARE_2681_FIELD(rhrb_thrb);
|
||||
DECLARE_2681_FIELD(reserved);
|
||||
DECLARE_2681_FIELD(ip_opcr);
|
||||
DECLARE_2681_FIELD(startCnt_setOutBit);
|
||||
DECLARE_2681_FIELD(stopCnt_resetOutBit);
|
||||
|
||||
};
|
||||
|
||||
#if 0
|
||||
struct mc146818 {
|
||||
|
||||
unsigned int second1:4, second2:4, alarm_second1:4, alarm_second2:4,
|
||||
minute1:4, minute2:4, alarm_minute1:4, alarm_minute2:4;
|
||||
unsigned int hours1:4, hours2:4, alarm_hours1:4, alarm_hours2:4,
|
||||
day_of_week1:4, day_of_week2:4, day_of_month1:4, day_of_month2:4;
|
||||
unsigned int month1:4, month2:4, year1:4, year2:4, :16;
|
||||
|
||||
};
|
||||
#endif
|
||||
|
||||
struct mc146818 {
|
||||
unsigned char second, alarm_second;
|
||||
unsigned char minute, alarm_minute;
|
||||
unsigned char hours, alarm_hours;
|
||||
unsigned char day_of_week, day_of_month;
|
||||
unsigned char month, year;
|
||||
};
|
||||
|
||||
|
||||
#define IO_BASE 0x80000000
|
||||
|
||||
extern u_long sio01_physaddr;
|
||||
extern u_long sio23_physaddr;
|
||||
extern u_long rtc_physaddr;
|
||||
extern u_long pica_physaddr;
|
||||
extern u_long picb_physaddr;
|
||||
extern u_long cpuctrl_physaddr;
|
||||
extern u_long timer_physaddr;
|
||||
|
||||
#define SAU7_SIO01_PHYSADDR 0x10400
|
||||
#define SAU7_SIO23_PHYSADDR 0x10500
|
||||
#define SAU7_RTC_PHYSADDR 0x10900
|
||||
#define SAU7_PICA 0x11000
|
||||
#define SAU7_PICB 0x11100
|
||||
#define SAU7_CPUCTRL 0x10100
|
||||
#define SAU7_TIMER 0x010800
|
||||
|
||||
#define SAU8_SIO01_PHYSADDR 0x8400
|
||||
#define SAU8_RTC_PHYSADDR 0x8900
|
||||
#define SAU8_PICA 0x9400
|
||||
#define SAU8_PICB 0x9500
|
||||
#define SAU8_CPUCTRL 0x8100
|
||||
#define SAU8_TIMER 0x8800
|
||||
|
||||
#define sio01 ((*(volatile struct SCN2681 *)(IO_BASE + sio01_physaddr)))
|
||||
#define sio23 ((*(volatile struct SCN2681 *)(IO_BASE + sio23_physaddr)))
|
||||
#define rtc (((volatile struct mc146818 *)(IO_BASE + rtc_physaddr)))
|
||||
#define cpuctrl (*(volatile unsigned int *)(IO_BASE + cpuctrl_physaddr))
|
||||
#define pica (IO_BASE + pica_physaddr)
|
||||
#define picb (IO_BASE + picb_physaddr)
|
||||
#define timer (IO_BASE + timer_physaddr)
|
||||
#define addr_xlat_map ((unsigned short *)(IO_BASE + 0x17000))
|
||||
|
||||
#define isaIO2mem(x) (((((x) & 0x3f8) << 7) | (((x) & 0xfc00) >> 6) | ((x) & 0x7)) + 0x40000 + IO_BASE)
|
||||
|
||||
#define IRQ_APOLLO IRQ_USER
|
||||
|
||||
#endif
|
||||
@@ -1,12 +0,0 @@
|
||||
#ifndef _ASM_M68K_FD_H
|
||||
#define _ASM_M68K_FD_H
|
||||
|
||||
/* Definitions for the Atari Floppy driver */
|
||||
|
||||
struct atari_format_descr {
|
||||
int track; /* to be formatted */
|
||||
int head; /* "" "" */
|
||||
int sect_offset; /* offset of first sector */
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -1,79 +0,0 @@
|
||||
#ifndef _LINUX_FDREG_H
|
||||
#define _LINUX_FDREG_H
|
||||
|
||||
/*
|
||||
** WD1772 stuff
|
||||
*/
|
||||
|
||||
/* register codes */
|
||||
|
||||
#define FDCSELREG_STP (0x80) /* command/status register */
|
||||
#define FDCSELREG_TRA (0x82) /* track register */
|
||||
#define FDCSELREG_SEC (0x84) /* sector register */
|
||||
#define FDCSELREG_DTA (0x86) /* data register */
|
||||
|
||||
/* register names for FDC_READ/WRITE macros */
|
||||
|
||||
#define FDCREG_CMD 0
|
||||
#define FDCREG_STATUS 0
|
||||
#define FDCREG_TRACK 2
|
||||
#define FDCREG_SECTOR 4
|
||||
#define FDCREG_DATA 6
|
||||
|
||||
/* command opcodes */
|
||||
|
||||
#define FDCCMD_RESTORE (0x00) /* - */
|
||||
#define FDCCMD_SEEK (0x10) /* | */
|
||||
#define FDCCMD_STEP (0x20) /* | TYP 1 Commands */
|
||||
#define FDCCMD_STIN (0x40) /* | */
|
||||
#define FDCCMD_STOT (0x60) /* - */
|
||||
#define FDCCMD_RDSEC (0x80) /* - TYP 2 Commands */
|
||||
#define FDCCMD_WRSEC (0xa0) /* - " */
|
||||
#define FDCCMD_RDADR (0xc0) /* - */
|
||||
#define FDCCMD_RDTRA (0xe0) /* | TYP 3 Commands */
|
||||
#define FDCCMD_WRTRA (0xf0) /* - */
|
||||
#define FDCCMD_FORCI (0xd0) /* - TYP 4 Command */
|
||||
|
||||
/* command modifier bits */
|
||||
|
||||
#define FDCCMDADD_SR6 (0x00) /* step rate settings */
|
||||
#define FDCCMDADD_SR12 (0x01)
|
||||
#define FDCCMDADD_SR2 (0x02)
|
||||
#define FDCCMDADD_SR3 (0x03)
|
||||
#define FDCCMDADD_V (0x04) /* verify */
|
||||
#define FDCCMDADD_H (0x08) /* wait for spin-up */
|
||||
#define FDCCMDADD_U (0x10) /* update track register */
|
||||
#define FDCCMDADD_M (0x10) /* multiple sector access */
|
||||
#define FDCCMDADD_E (0x04) /* head settling flag */
|
||||
#define FDCCMDADD_P (0x02) /* precompensation off */
|
||||
#define FDCCMDADD_A0 (0x01) /* DAM flag */
|
||||
|
||||
/* status register bits */
|
||||
|
||||
#define FDCSTAT_MOTORON (0x80) /* motor on */
|
||||
#define FDCSTAT_WPROT (0x40) /* write protected (FDCCMD_WR*) */
|
||||
#define FDCSTAT_SPINUP (0x20) /* motor speed stable (Type I) */
|
||||
#define FDCSTAT_DELDAM (0x20) /* sector has deleted DAM (Type II+III) */
|
||||
#define FDCSTAT_RECNF (0x10) /* record not found */
|
||||
#define FDCSTAT_CRC (0x08) /* CRC error */
|
||||
#define FDCSTAT_TR00 (0x04) /* Track 00 flag (Type I) */
|
||||
#define FDCSTAT_LOST (0x04) /* Lost Data (Type II+III) */
|
||||
#define FDCSTAT_IDX (0x02) /* Index status (Type I) */
|
||||
#define FDCSTAT_DRQ (0x02) /* DRQ status (Type II+III) */
|
||||
#define FDCSTAT_BUSY (0x01) /* FDC is busy */
|
||||
|
||||
|
||||
/* PSG Port A Bit Nr 0 .. Side Sel .. 0 -> Side 1 1 -> Side 2 */
|
||||
#define DSKSIDE (0x01)
|
||||
|
||||
#define DSKDRVNONE (0x06)
|
||||
#define DSKDRV0 (0x02)
|
||||
#define DSKDRV1 (0x04)
|
||||
|
||||
/* step rates */
|
||||
#define FDCSTEP_6 0x00
|
||||
#define FDCSTEP_12 0x01
|
||||
#define FDCSTEP_2 0x02
|
||||
#define FDCSTEP_3 0x03
|
||||
|
||||
#endif
|
||||
@@ -1,22 +0,0 @@
|
||||
#ifndef _LINUX_ATARI_JOYSTICK_H
|
||||
#define _LINUX_ATARI_JOYSTICK_H
|
||||
|
||||
/*
|
||||
* linux/include/linux/atari_joystick.h
|
||||
* header file for Atari Joystick driver
|
||||
* by Robert de Vries (robert@and.nl) on 19Jul93
|
||||
*/
|
||||
|
||||
void atari_joystick_interrupt(char*);
|
||||
int atari_joystick_init(void);
|
||||
extern int atari_mouse_buttons;
|
||||
|
||||
struct joystick_status {
|
||||
char fire;
|
||||
char dir;
|
||||
int ready;
|
||||
int active;
|
||||
wait_queue_head_t wait;
|
||||
};
|
||||
|
||||
#endif
|
||||
@@ -1,22 +0,0 @@
|
||||
|
||||
#ifndef _atari_stdma_h
|
||||
#define _atari_stdma_h
|
||||
|
||||
|
||||
#include <linux/interrupt.h>
|
||||
|
||||
|
||||
/***************************** Prototypes *****************************/
|
||||
|
||||
void stdma_lock(irq_handler_t handler, void *data);
|
||||
void stdma_release( void );
|
||||
int stdma_others_waiting( void );
|
||||
int stdma_islocked( void );
|
||||
void *stdma_locked_by( void );
|
||||
void stdma_init( void );
|
||||
|
||||
/************************* End of Prototypes **************************/
|
||||
|
||||
|
||||
|
||||
#endif /* _atari_stdma_h */
|
||||
@@ -1,17 +0,0 @@
|
||||
#ifndef _M68K_ATARI_STRAM_H
|
||||
#define _M68K_ATARI_STRAM_H
|
||||
|
||||
/*
|
||||
* Functions for Atari ST-RAM management
|
||||
*/
|
||||
|
||||
/* public interface */
|
||||
void *atari_stram_alloc(long size, const char *owner);
|
||||
void atari_stram_free(void *);
|
||||
|
||||
/* functions called internally by other parts of the kernel */
|
||||
void atari_stram_init(void);
|
||||
void atari_stram_reserve_pages(void *start_mem);
|
||||
void atari_stram_mem_init_hook (void);
|
||||
|
||||
#endif /*_M68K_ATARI_STRAM_H */
|
||||
File diff suppressed because it is too large
Load Diff
@@ -1,204 +0,0 @@
|
||||
/*
|
||||
** atariints.h -- Atari Linux interrupt handling structs and prototypes
|
||||
**
|
||||
** Copyright 1994 by Björn Brauel
|
||||
**
|
||||
** 5/2/94 Roman Hodek:
|
||||
** TT interrupt definitions added.
|
||||
**
|
||||
** 12/02/96: (Roman)
|
||||
** Adapted to new int handling scheme (see ataints.c); revised numbering
|
||||
**
|
||||
** This file is subject to the terms and conditions of the GNU General Public
|
||||
** License. See the file COPYING in the main directory of this archive
|
||||
** for more details.
|
||||
**
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_ATARIINTS_H_
|
||||
#define _LINUX_ATARIINTS_H_
|
||||
|
||||
#include <asm/irq.h>
|
||||
#include <asm/atarihw.h>
|
||||
|
||||
/*
|
||||
** Atari Interrupt sources.
|
||||
**
|
||||
*/
|
||||
|
||||
#define STMFP_SOURCE_BASE 8
|
||||
#define TTMFP_SOURCE_BASE 24
|
||||
#define SCC_SOURCE_BASE 40
|
||||
#define VME_SOURCE_BASE 56
|
||||
#define VME_MAX_SOURCES 16
|
||||
|
||||
#define NUM_ATARI_SOURCES (VME_SOURCE_BASE+VME_MAX_SOURCES-STMFP_SOURCE_BASE)
|
||||
|
||||
/* convert vector number to int source number */
|
||||
#define IRQ_VECTOR_TO_SOURCE(v) ((v) - ((v) < 0x20 ? 0x18 : (0x40-8)))
|
||||
|
||||
/* convert irq_handler index to vector number */
|
||||
#define IRQ_SOURCE_TO_VECTOR(i) ((i) + ((i) < 8 ? 0x18 : (0x40-8)))
|
||||
|
||||
/* interrupt service types */
|
||||
#define IRQ_TYPE_SLOW 0
|
||||
#define IRQ_TYPE_FAST 1
|
||||
#define IRQ_TYPE_PRIO 2
|
||||
|
||||
/* ST-MFP interrupts */
|
||||
#define IRQ_MFP_BUSY (8)
|
||||
#define IRQ_MFP_DCD (9)
|
||||
#define IRQ_MFP_CTS (10)
|
||||
#define IRQ_MFP_GPU (11)
|
||||
#define IRQ_MFP_TIMD (12)
|
||||
#define IRQ_MFP_TIMC (13)
|
||||
#define IRQ_MFP_ACIA (14)
|
||||
#define IRQ_MFP_FDC (15)
|
||||
#define IRQ_MFP_ACSI IRQ_MFP_FDC
|
||||
#define IRQ_MFP_FSCSI IRQ_MFP_FDC
|
||||
#define IRQ_MFP_IDE IRQ_MFP_FDC
|
||||
#define IRQ_MFP_TIMB (16)
|
||||
#define IRQ_MFP_SERERR (17)
|
||||
#define IRQ_MFP_SEREMPT (18)
|
||||
#define IRQ_MFP_RECERR (19)
|
||||
#define IRQ_MFP_RECFULL (20)
|
||||
#define IRQ_MFP_TIMA (21)
|
||||
#define IRQ_MFP_RI (22)
|
||||
#define IRQ_MFP_MMD (23)
|
||||
|
||||
/* TT-MFP interrupts */
|
||||
#define IRQ_TT_MFP_IO0 (24)
|
||||
#define IRQ_TT_MFP_IO1 (25)
|
||||
#define IRQ_TT_MFP_SCC (26)
|
||||
#define IRQ_TT_MFP_RI (27)
|
||||
#define IRQ_TT_MFP_TIMD (28)
|
||||
#define IRQ_TT_MFP_TIMC (29)
|
||||
#define IRQ_TT_MFP_DRVRDY (30)
|
||||
#define IRQ_TT_MFP_SCSIDMA (31)
|
||||
#define IRQ_TT_MFP_TIMB (32)
|
||||
#define IRQ_TT_MFP_SERERR (33)
|
||||
#define IRQ_TT_MFP_SEREMPT (34)
|
||||
#define IRQ_TT_MFP_RECERR (35)
|
||||
#define IRQ_TT_MFP_RECFULL (36)
|
||||
#define IRQ_TT_MFP_TIMA (37)
|
||||
#define IRQ_TT_MFP_RTC (38)
|
||||
#define IRQ_TT_MFP_SCSI (39)
|
||||
|
||||
/* SCC interrupts */
|
||||
#define IRQ_SCCB_TX (40)
|
||||
#define IRQ_SCCB_STAT (42)
|
||||
#define IRQ_SCCB_RX (44)
|
||||
#define IRQ_SCCB_SPCOND (46)
|
||||
#define IRQ_SCCA_TX (48)
|
||||
#define IRQ_SCCA_STAT (50)
|
||||
#define IRQ_SCCA_RX (52)
|
||||
#define IRQ_SCCA_SPCOND (54)
|
||||
|
||||
|
||||
#define INT_CLK 24576 /* CLK while int_clk =2.456MHz and divide = 100 */
|
||||
#define INT_TICKS 246 /* to make sched_time = 99.902... HZ */
|
||||
|
||||
|
||||
#define MFP_ENABLE 0
|
||||
#define MFP_PENDING 1
|
||||
#define MFP_SERVICE 2
|
||||
#define MFP_MASK 3
|
||||
|
||||
/* Utility functions for setting/clearing bits in the interrupt registers of
|
||||
* the MFP. 'type' should be constant, if 'irq' is constant, too, code size is
|
||||
* reduced. set_mfp_bit() is nonsense for PENDING and SERVICE registers. */
|
||||
|
||||
static inline int get_mfp_bit( unsigned irq, int type )
|
||||
|
||||
{ unsigned char mask, *reg;
|
||||
|
||||
mask = 1 << (irq & 7);
|
||||
reg = (unsigned char *)&mfp.int_en_a + type*4 +
|
||||
((irq & 8) >> 2) + (((irq-8) & 16) << 3);
|
||||
return( *reg & mask );
|
||||
}
|
||||
|
||||
static inline void set_mfp_bit( unsigned irq, int type )
|
||||
|
||||
{ unsigned char mask, *reg;
|
||||
|
||||
mask = 1 << (irq & 7);
|
||||
reg = (unsigned char *)&mfp.int_en_a + type*4 +
|
||||
((irq & 8) >> 2) + (((irq-8) & 16) << 3);
|
||||
__asm__ __volatile__ ( "orb %0,%1"
|
||||
: : "di" (mask), "m" (*reg) : "memory" );
|
||||
}
|
||||
|
||||
static inline void clear_mfp_bit( unsigned irq, int type )
|
||||
|
||||
{ unsigned char mask, *reg;
|
||||
|
||||
mask = ~(1 << (irq & 7));
|
||||
reg = (unsigned char *)&mfp.int_en_a + type*4 +
|
||||
((irq & 8) >> 2) + (((irq-8) & 16) << 3);
|
||||
if (type == MFP_PENDING || type == MFP_SERVICE)
|
||||
__asm__ __volatile__ ( "moveb %0,%1"
|
||||
: : "di" (mask), "m" (*reg) : "memory" );
|
||||
else
|
||||
__asm__ __volatile__ ( "andb %0,%1"
|
||||
: : "di" (mask), "m" (*reg) : "memory" );
|
||||
}
|
||||
|
||||
/*
|
||||
* {en,dis}able_irq have the usual semantics of temporary blocking the
|
||||
* interrupt, but not loosing requests that happen between disabling and
|
||||
* enabling. This is done with the MFP mask registers.
|
||||
*/
|
||||
|
||||
static inline void atari_enable_irq( unsigned irq )
|
||||
|
||||
{
|
||||
if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
|
||||
set_mfp_bit( irq, MFP_MASK );
|
||||
}
|
||||
|
||||
static inline void atari_disable_irq( unsigned irq )
|
||||
|
||||
{
|
||||
if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
|
||||
clear_mfp_bit( irq, MFP_MASK );
|
||||
}
|
||||
|
||||
/*
|
||||
* In opposite to {en,dis}able_irq, requests between turn{off,on}_irq are not
|
||||
* "stored"
|
||||
*/
|
||||
|
||||
static inline void atari_turnon_irq( unsigned irq )
|
||||
|
||||
{
|
||||
if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
|
||||
set_mfp_bit( irq, MFP_ENABLE );
|
||||
}
|
||||
|
||||
static inline void atari_turnoff_irq( unsigned irq )
|
||||
|
||||
{
|
||||
if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
|
||||
clear_mfp_bit( irq, MFP_ENABLE );
|
||||
clear_mfp_bit( irq, MFP_PENDING );
|
||||
}
|
||||
|
||||
static inline void atari_clear_pending_irq( unsigned irq )
|
||||
|
||||
{
|
||||
if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return;
|
||||
clear_mfp_bit( irq, MFP_PENDING );
|
||||
}
|
||||
|
||||
static inline int atari_irq_pending( unsigned irq )
|
||||
|
||||
{
|
||||
if (irq < STMFP_SOURCE_BASE || irq >= SCC_SOURCE_BASE) return( 0 );
|
||||
return( get_mfp_bit( irq, MFP_PENDING ) );
|
||||
}
|
||||
|
||||
unsigned long atari_register_vme_int( void );
|
||||
void atari_unregister_vme_int( unsigned long );
|
||||
|
||||
#endif /* linux/atariints.h */
|
||||
@@ -1,46 +0,0 @@
|
||||
/*
|
||||
** atarikb.h -- This header contains the prototypes of functions of
|
||||
** the intelligent keyboard of the Atari needed by the
|
||||
** mouse and joystick drivers.
|
||||
**
|
||||
** Copyright 1994 by Robert de Vries
|
||||
**
|
||||
** This file is subject to the terms and conditions of the GNU General Public
|
||||
** License. See the file COPYING in the main directory of this archive
|
||||
** for more details.
|
||||
**
|
||||
** Created: 20 Feb 1994 by Robert de Vries
|
||||
*/
|
||||
|
||||
#ifndef _LINUX_ATARIKB_H
|
||||
#define _LINUX_ATARIKB_H
|
||||
|
||||
void ikbd_write(const char *, int);
|
||||
void ikbd_mouse_button_action(int mode);
|
||||
void ikbd_mouse_rel_pos(void);
|
||||
void ikbd_mouse_abs_pos(int xmax, int ymax);
|
||||
void ikbd_mouse_kbd_mode(int dx, int dy);
|
||||
void ikbd_mouse_thresh(int x, int y);
|
||||
void ikbd_mouse_scale(int x, int y);
|
||||
void ikbd_mouse_pos_get(int *x, int *y);
|
||||
void ikbd_mouse_pos_set(int x, int y);
|
||||
void ikbd_mouse_y0_bot(void);
|
||||
void ikbd_mouse_y0_top(void);
|
||||
void ikbd_mouse_disable(void);
|
||||
void ikbd_joystick_event_on(void);
|
||||
void ikbd_joystick_event_off(void);
|
||||
void ikbd_joystick_get_state(void);
|
||||
void ikbd_joystick_disable(void);
|
||||
|
||||
/* Hook for MIDI serial driver */
|
||||
extern void (*atari_MIDI_interrupt_hook) (void);
|
||||
/* Hook for mouse driver */
|
||||
extern void (*atari_mouse_interrupt_hook) (char *);
|
||||
/* Hook for keyboard inputdev driver */
|
||||
extern void (*atari_input_keyboard_interrupt_hook) (unsigned char, char);
|
||||
/* Hook for mouse inputdev driver */
|
||||
extern void (*atari_input_mouse_interrupt_hook) (char *);
|
||||
|
||||
int atari_keyb_init(void);
|
||||
|
||||
#endif /* _LINUX_ATARIKB_H */
|
||||
@@ -1,196 +0,0 @@
|
||||
#ifndef __ARCH_M68K_ATOMIC__
|
||||
#define __ARCH_M68K_ATOMIC__
|
||||
|
||||
#include <linux/types.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
/*
|
||||
* Atomic operations that C can't guarantee us. Useful for
|
||||
* resource counting etc..
|
||||
*/
|
||||
|
||||
/*
|
||||
* We do not have SMP m68k systems, so we don't have to deal with that.
|
||||
*/
|
||||
|
||||
#define ATOMIC_INIT(i) { (i) }
|
||||
|
||||
#define atomic_read(v) ((v)->counter)
|
||||
#define atomic_set(v, i) (((v)->counter) = i)
|
||||
|
||||
static inline void atomic_add(int i, atomic_t *v)
|
||||
{
|
||||
__asm__ __volatile__("addl %1,%0" : "+m" (*v) : "id" (i));
|
||||
}
|
||||
|
||||
static inline void atomic_sub(int i, atomic_t *v)
|
||||
{
|
||||
__asm__ __volatile__("subl %1,%0" : "+m" (*v) : "id" (i));
|
||||
}
|
||||
|
||||
static inline void atomic_inc(atomic_t *v)
|
||||
{
|
||||
__asm__ __volatile__("addql #1,%0" : "+m" (*v));
|
||||
}
|
||||
|
||||
static inline void atomic_dec(atomic_t *v)
|
||||
{
|
||||
__asm__ __volatile__("subql #1,%0" : "+m" (*v));
|
||||
}
|
||||
|
||||
static inline int atomic_dec_and_test(atomic_t *v)
|
||||
{
|
||||
char c;
|
||||
__asm__ __volatile__("subql #1,%1; seq %0" : "=d" (c), "+m" (*v));
|
||||
return c != 0;
|
||||
}
|
||||
|
||||
static inline int atomic_inc_and_test(atomic_t *v)
|
||||
{
|
||||
char c;
|
||||
__asm__ __volatile__("addql #1,%1; seq %0" : "=d" (c), "+m" (*v));
|
||||
return c != 0;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_RMW_INSNS
|
||||
|
||||
static inline int atomic_add_return(int i, atomic_t *v)
|
||||
{
|
||||
int t, tmp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: movel %2,%1\n"
|
||||
" addl %3,%1\n"
|
||||
" casl %2,%1,%0\n"
|
||||
" jne 1b"
|
||||
: "+m" (*v), "=&d" (t), "=&d" (tmp)
|
||||
: "g" (i), "2" (atomic_read(v)));
|
||||
return t;
|
||||
}
|
||||
|
||||
static inline int atomic_sub_return(int i, atomic_t *v)
|
||||
{
|
||||
int t, tmp;
|
||||
|
||||
__asm__ __volatile__(
|
||||
"1: movel %2,%1\n"
|
||||
" subl %3,%1\n"
|
||||
" casl %2,%1,%0\n"
|
||||
" jne 1b"
|
||||
: "+m" (*v), "=&d" (t), "=&d" (tmp)
|
||||
: "g" (i), "2" (atomic_read(v)));
|
||||
return t;
|
||||
}
|
||||
|
||||
#define atomic_cmpxchg(v, o, n) ((int)cmpxchg(&((v)->counter), (o), (n)))
|
||||
#define atomic_xchg(v, new) (xchg(&((v)->counter), new))
|
||||
|
||||
#else /* !CONFIG_RMW_INSNS */
|
||||
|
||||
static inline int atomic_add_return(int i, atomic_t * v)
|
||||
{
|
||||
unsigned long flags;
|
||||
int t;
|
||||
|
||||
local_irq_save(flags);
|
||||
t = atomic_read(v);
|
||||
t += i;
|
||||
atomic_set(v, t);
|
||||
local_irq_restore(flags);
|
||||
|
||||
return t;
|
||||
}
|
||||
|
||||
static inline int atomic_sub_return(int i, atomic_t * v)
|
||||
{
|
||||
unsigned long flags;
|
||||
int t;
|
||||
|
||||
local_irq_save(flags);
|
||||
t = atomic_read(v);
|
||||
t -= i;
|
||||
atomic_set(v, t);
|
||||
local_irq_restore(flags);
|
||||
|
||||
return t;
|
||||
}
|
||||
|
||||
static inline int atomic_cmpxchg(atomic_t *v, int old, int new)
|
||||
{
|
||||
unsigned long flags;
|
||||
int prev;
|
||||
|
||||
local_irq_save(flags);
|
||||
prev = atomic_read(v);
|
||||
if (prev == old)
|
||||
atomic_set(v, new);
|
||||
local_irq_restore(flags);
|
||||
return prev;
|
||||
}
|
||||
|
||||
static inline int atomic_xchg(atomic_t *v, int new)
|
||||
{
|
||||
unsigned long flags;
|
||||
int prev;
|
||||
|
||||
local_irq_save(flags);
|
||||
prev = atomic_read(v);
|
||||
atomic_set(v, new);
|
||||
local_irq_restore(flags);
|
||||
return prev;
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_RMW_INSNS */
|
||||
|
||||
#define atomic_dec_return(v) atomic_sub_return(1, (v))
|
||||
#define atomic_inc_return(v) atomic_add_return(1, (v))
|
||||
|
||||
static inline int atomic_sub_and_test(int i, atomic_t *v)
|
||||
{
|
||||
char c;
|
||||
__asm__ __volatile__("subl %2,%1; seq %0" : "=d" (c), "+m" (*v): "g" (i));
|
||||
return c != 0;
|
||||
}
|
||||
|
||||
static inline int atomic_add_negative(int i, atomic_t *v)
|
||||
{
|
||||
char c;
|
||||
__asm__ __volatile__("addl %2,%1; smi %0" : "=d" (c), "+m" (*v): "g" (i));
|
||||
return c != 0;
|
||||
}
|
||||
|
||||
static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
|
||||
{
|
||||
__asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
|
||||
}
|
||||
|
||||
static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
|
||||
{
|
||||
__asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
|
||||
}
|
||||
|
||||
static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
|
||||
{
|
||||
int c, old;
|
||||
c = atomic_read(v);
|
||||
for (;;) {
|
||||
if (unlikely(c == (u)))
|
||||
break;
|
||||
old = atomic_cmpxchg((v), c, c + (a));
|
||||
if (likely(old == c))
|
||||
break;
|
||||
c = old;
|
||||
}
|
||||
return c != (u);
|
||||
}
|
||||
|
||||
#define atomic_inc_not_zero(v) atomic_add_unless((v), 1, 0)
|
||||
|
||||
/* Atomic operations are already serializing */
|
||||
#define smp_mb__before_atomic_dec() barrier()
|
||||
#define smp_mb__after_atomic_dec() barrier()
|
||||
#define smp_mb__before_atomic_inc() barrier()
|
||||
#define smp_mb__after_atomic_inc() barrier()
|
||||
|
||||
#include <asm-generic/atomic.h>
|
||||
#endif /* __ARCH_M68K_ATOMIC __ */
|
||||
@@ -1,4 +0,0 @@
|
||||
#ifndef __ASMm68k_AUXVEC_H
|
||||
#define __ASMm68k_AUXVEC_H
|
||||
|
||||
#endif
|
||||
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Reference in New Issue
Block a user