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powerpc/mm: Replace _PAGE_USER with _PAGE_PRIVILEGED
_PAGE_PRIVILEGED means the page can be accessed only by the kernel. This is done to keep pte bits similar to PowerISA 3.0 Radix PTE format. User pages are now marked by clearing _PAGE_PRIVILEGED bit. Previously we allowed the kernel to have a privileged page in the lower address range (USER_REGION). With this patch such access is denied. We also prevent a kernel access to a non-privileged page in higher address range (ie, REGION_ID != 0). Both the above access scenarios should never happen. Cc: Arnd Bergmann <arnd@arndb.de> Cc: Jeremy Kerr <jk@ozlabs.org> Cc: Frederic Barrat <fbarrat@linux.vnet.ibm.com> Acked-by: Ian Munsie <imunsie@au1.ibm.com> Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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committed by
Michael Ellerman
parent
e7bfc462d3
commit
ac29c64089
@@ -187,7 +187,7 @@ extern struct page *pgd_page(pgd_t pgd);
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static inline bool pte_user(pte_t pte)
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{
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return !!(pte_val(pte) & _PAGE_USER);
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return !(pte_val(pte) & _PAGE_PRIVILEGED);
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}
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#ifdef CONFIG_MEM_SOFT_DIRTY
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@@ -211,6 +211,22 @@ static inline pte_t pte_swp_clear_soft_dirty(pte_t pte)
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}
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#endif /* CONFIG_HAVE_ARCH_SOFT_DIRTY */
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static inline bool check_pte_access(unsigned long access, unsigned long ptev)
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{
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/*
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* This check for _PAGE_RWX and _PAGE_PRESENT bits
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*/
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if (access & ~ptev)
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return false;
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/*
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* This check for access to privilege space
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*/
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if ((access & _PAGE_PRIVILEGED) != (ptev & _PAGE_PRIVILEGED))
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return false;
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return true;
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}
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void pgtable_cache_add(unsigned shift, void (*ctor)(void *));
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void pgtable_cache_init(void);
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