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[PATCH] powerpc: Merge bitops.h
Here's a revised version. This re-introduces the set_bits() function from ppc64, which I removed because I thought it was unused (it exists on no other arch). In fact it is used in the powermac interrupt code (but not on pSeries). - We use LARXL/STCXL macros to generate the right (32 or 64 bit) instructions, similar to LDL/STL from ppc_asm.h, used in fpu.S - ppc32 previously used a full "sync" barrier at the end of test_and_*_bit(), whereas ppc64 used an "isync". The merged version uses "isync", since I believe that's sufficient. - The ppc64 versions of then minix_*() bitmap functions have changed semantics. Previously on ppc64, these functions were big-endian (that is bit 0 was the LSB in the first 64-bit, big-endian word). On ppc32 (and x86, for that matter, they were little-endian. As far as I can tell, the big-endian usage was simply wrong - I guess no-one ever tried to use minixfs on ppc64. - On ppc32 find_next_bit() and find_next_zero_bit() are no longer inline (they were already out-of-line on ppc64). - For ppc64, sched_find_first_bit() has moved from mmu_context.h to the merged bitops. What it was doing in mmu_context.h in the first place, I have no idea. - The fls() function is now implemented using the cntlzw instruction on ppc64, instead of generic_fls(), as it already was on ppc32. - For ARCH=ppc, this patch requires adding arch/powerpc/lib to the arch/ppc/Makefile. This in turn requires some changes to arch/powerpc/lib/Makefile which didn't correctly handle ARCH=ppc. Built and running on G5. Signed-off-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Paul Mackerras <paulus@samba.org>
This commit is contained in:
David Gibson
committed by
Paul Mackerras
Paul Mackerras
parent
031ef0a72a
commit
a0e60b2033
@@ -1,460 +0,0 @@
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/*
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* bitops.h: Bit string operations on the ppc
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*/
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#ifdef __KERNEL__
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#ifndef _PPC_BITOPS_H
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#define _PPC_BITOPS_H
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#include <linux/config.h>
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#include <linux/compiler.h>
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#include <asm/byteorder.h>
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#include <asm/atomic.h>
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/*
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* The test_and_*_bit operations are taken to imply a memory barrier
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* on SMP systems.
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*/
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#ifdef CONFIG_SMP
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#define SMP_WMB "eieio\n"
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#define SMP_MB "\nsync"
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#else
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#define SMP_WMB
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#define SMP_MB
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#endif /* CONFIG_SMP */
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static __inline__ void set_bit(int nr, volatile unsigned long * addr)
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{
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unsigned long old;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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__asm__ __volatile__("\n\
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1: lwarx %0,0,%3 \n\
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or %0,%0,%2 \n"
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (old), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc" );
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}
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/*
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* non-atomic version
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*/
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static __inline__ void __set_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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*p |= mask;
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}
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/*
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* clear_bit doesn't imply a memory barrier
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*/
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#define smp_mb__before_clear_bit() smp_mb()
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#define smp_mb__after_clear_bit() smp_mb()
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static __inline__ void clear_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long old;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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__asm__ __volatile__("\n\
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1: lwarx %0,0,%3 \n\
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andc %0,%0,%2 \n"
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (old), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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}
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/*
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* non-atomic version
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*/
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static __inline__ void __clear_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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*p &= ~mask;
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}
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static __inline__ void change_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long old;
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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__asm__ __volatile__("\n\
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1: lwarx %0,0,%3 \n\
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xor %0,%0,%2 \n"
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PPC405_ERR77(0,%3)
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" stwcx. %0,0,%3 \n\
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bne- 1b"
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: "=&r" (old), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc");
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}
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/*
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* non-atomic version
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*/
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static __inline__ void __change_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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*p ^= mask;
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}
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/*
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* test_and_*_bit do imply a memory barrier (?)
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*/
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static __inline__ int test_and_set_bit(int nr, volatile unsigned long *addr)
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{
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unsigned int old, t;
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unsigned int mask = 1 << (nr & 0x1f);
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volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
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__asm__ __volatile__(SMP_WMB "\n\
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1: lwarx %0,0,%4 \n\
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or %1,%0,%3 \n"
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PPC405_ERR77(0,%4)
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" stwcx. %1,0,%4 \n\
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bne 1b"
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SMP_MB
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: "=&r" (old), "=&r" (t), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc", "memory");
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return (old & mask) != 0;
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}
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/*
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* non-atomic version
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*/
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static __inline__ int __test_and_set_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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unsigned long old = *p;
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*p = old | mask;
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return (old & mask) != 0;
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}
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static __inline__ int test_and_clear_bit(int nr, volatile unsigned long *addr)
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{
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unsigned int old, t;
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unsigned int mask = 1 << (nr & 0x1f);
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volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
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__asm__ __volatile__(SMP_WMB "\n\
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1: lwarx %0,0,%4 \n\
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andc %1,%0,%3 \n"
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PPC405_ERR77(0,%4)
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" stwcx. %1,0,%4 \n\
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bne 1b"
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SMP_MB
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: "=&r" (old), "=&r" (t), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc", "memory");
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return (old & mask) != 0;
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}
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/*
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* non-atomic version
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*/
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static __inline__ int __test_and_clear_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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unsigned long old = *p;
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*p = old & ~mask;
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return (old & mask) != 0;
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}
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static __inline__ int test_and_change_bit(int nr, volatile unsigned long *addr)
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{
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unsigned int old, t;
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unsigned int mask = 1 << (nr & 0x1f);
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volatile unsigned int *p = ((volatile unsigned int *)addr) + (nr >> 5);
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__asm__ __volatile__(SMP_WMB "\n\
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1: lwarx %0,0,%4 \n\
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xor %1,%0,%3 \n"
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PPC405_ERR77(0,%4)
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" stwcx. %1,0,%4 \n\
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bne 1b"
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SMP_MB
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: "=&r" (old), "=&r" (t), "=m" (*p)
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: "r" (mask), "r" (p), "m" (*p)
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: "cc", "memory");
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return (old & mask) != 0;
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}
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/*
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* non-atomic version
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*/
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static __inline__ int __test_and_change_bit(int nr, volatile unsigned long *addr)
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{
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unsigned long mask = 1 << (nr & 0x1f);
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unsigned long *p = ((unsigned long *)addr) + (nr >> 5);
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unsigned long old = *p;
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*p = old ^ mask;
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return (old & mask) != 0;
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}
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static __inline__ int test_bit(int nr, __const__ volatile unsigned long *addr)
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{
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return ((addr[nr >> 5] >> (nr & 0x1f)) & 1) != 0;
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}
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/* Return the bit position of the most significant 1 bit in a word */
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static __inline__ int __ilog2(unsigned long x)
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{
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int lz;
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asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
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return 31 - lz;
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}
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static __inline__ int ffz(unsigned long x)
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{
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if ((x = ~x) == 0)
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return 32;
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return __ilog2(x & -x);
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}
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static inline int __ffs(unsigned long x)
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{
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return __ilog2(x & -x);
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}
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/*
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* ffs: find first bit set. This is defined the same way as
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* the libc and compiler builtin ffs routines, therefore
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* differs in spirit from the above ffz (man ffs).
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*/
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static __inline__ int ffs(int x)
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{
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return __ilog2(x & -x) + 1;
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}
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/*
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* fls: find last (most-significant) bit set.
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* Note fls(0) = 0, fls(1) = 1, fls(0x80000000) = 32.
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*/
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static __inline__ int fls(unsigned int x)
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{
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int lz;
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asm ("cntlzw %0,%1" : "=r" (lz) : "r" (x));
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return 32 - lz;
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}
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/*
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* hweightN: returns the hamming weight (i.e. the number
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* of bits set) of a N-bit word
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*/
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#define hweight32(x) generic_hweight32(x)
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#define hweight16(x) generic_hweight16(x)
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#define hweight8(x) generic_hweight8(x)
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/*
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* Find the first bit set in a 140-bit bitmap.
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* The first 100 bits are unlikely to be set.
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*/
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static inline int sched_find_first_bit(const unsigned long *b)
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{
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if (unlikely(b[0]))
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return __ffs(b[0]);
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if (unlikely(b[1]))
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return __ffs(b[1]) + 32;
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if (unlikely(b[2]))
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return __ffs(b[2]) + 64;
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if (b[3])
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return __ffs(b[3]) + 96;
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return __ffs(b[4]) + 128;
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}
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/**
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* find_next_bit - find the next set bit in a memory region
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* @addr: The address to base the search on
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* @offset: The bitnumber to start searching at
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* @size: The maximum size to search
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*/
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static __inline__ unsigned long find_next_bit(const unsigned long *addr,
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unsigned long size, unsigned long offset)
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{
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unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
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unsigned int result = offset & ~31UL;
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unsigned int tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= 31UL;
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if (offset) {
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tmp = *p++;
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tmp &= ~0UL << offset;
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if (size < 32)
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goto found_first;
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if (tmp)
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goto found_middle;
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size -= 32;
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result += 32;
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}
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while (size >= 32) {
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if ((tmp = *p++) != 0)
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goto found_middle;
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result += 32;
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size -= 32;
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}
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if (!size)
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return result;
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tmp = *p;
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found_first:
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tmp &= ~0UL >> (32 - size);
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if (tmp == 0UL) /* Are any bits set? */
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return result + size; /* Nope. */
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found_middle:
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return result + __ffs(tmp);
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}
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/**
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* find_first_bit - find the first set bit in a memory region
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* @addr: The address to start the search at
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* @size: The maximum size to search
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*
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* Returns the bit-number of the first set bit, not the number of the byte
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* containing a bit.
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*/
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#define find_first_bit(addr, size) \
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find_next_bit((addr), (size), 0)
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/*
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* This implementation of find_{first,next}_zero_bit was stolen from
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* Linus' asm-alpha/bitops.h.
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*/
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#define find_first_zero_bit(addr, size) \
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find_next_zero_bit((addr), (size), 0)
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static __inline__ unsigned long find_next_zero_bit(const unsigned long *addr,
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unsigned long size, unsigned long offset)
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{
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unsigned int * p = ((unsigned int *) addr) + (offset >> 5);
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unsigned int result = offset & ~31UL;
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unsigned int tmp;
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if (offset >= size)
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return size;
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size -= result;
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offset &= 31UL;
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if (offset) {
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tmp = *p++;
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tmp |= ~0UL >> (32-offset);
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if (size < 32)
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goto found_first;
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if (tmp != ~0U)
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goto found_middle;
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size -= 32;
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result += 32;
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}
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while (size >= 32) {
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if ((tmp = *p++) != ~0U)
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goto found_middle;
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result += 32;
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size -= 32;
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}
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if (!size)
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return result;
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tmp = *p;
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found_first:
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tmp |= ~0UL << size;
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if (tmp == ~0UL) /* Are any bits zero? */
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return result + size; /* Nope. */
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found_middle:
|
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return result + ffz(tmp);
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}
|
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|
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|
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#define ext2_set_bit(nr, addr) __test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr))
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#define ext2_set_bit_atomic(lock, nr, addr) test_and_set_bit((nr) ^ 0x18, (unsigned long *)(addr))
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#define ext2_clear_bit(nr, addr) __test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr))
|
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#define ext2_clear_bit_atomic(lock, nr, addr) test_and_clear_bit((nr) ^ 0x18, (unsigned long *)(addr))
|
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static __inline__ int ext2_test_bit(int nr, __const__ void * addr)
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{
|
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__const__ unsigned char *ADDR = (__const__ unsigned char *) addr;
|
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|
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return (ADDR[nr >> 3] >> (nr & 7)) & 1;
|
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}
|
||||
|
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/*
|
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* This implementation of ext2_find_{first,next}_zero_bit was stolen from
|
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* Linus' asm-alpha/bitops.h and modified for a big-endian machine.
|
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*/
|
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|
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#define ext2_find_first_zero_bit(addr, size) \
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ext2_find_next_zero_bit((addr), (size), 0)
|
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|
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static __inline__ unsigned long ext2_find_next_zero_bit(const void *addr,
|
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unsigned long size, unsigned long offset)
|
||||
{
|
||||
unsigned int *p = ((unsigned int *) addr) + (offset >> 5);
|
||||
unsigned int result = offset & ~31UL;
|
||||
unsigned int tmp;
|
||||
|
||||
if (offset >= size)
|
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return size;
|
||||
size -= result;
|
||||
offset &= 31UL;
|
||||
if (offset) {
|
||||
tmp = cpu_to_le32p(p++);
|
||||
tmp |= ~0UL >> (32-offset);
|
||||
if (size < 32)
|
||||
goto found_first;
|
||||
if (tmp != ~0U)
|
||||
goto found_middle;
|
||||
size -= 32;
|
||||
result += 32;
|
||||
}
|
||||
while (size >= 32) {
|
||||
if ((tmp = cpu_to_le32p(p++)) != ~0U)
|
||||
goto found_middle;
|
||||
result += 32;
|
||||
size -= 32;
|
||||
}
|
||||
if (!size)
|
||||
return result;
|
||||
tmp = cpu_to_le32p(p);
|
||||
found_first:
|
||||
tmp |= ~0U << size;
|
||||
if (tmp == ~0UL) /* Are any bits zero? */
|
||||
return result + size; /* Nope. */
|
||||
found_middle:
|
||||
return result + ffz(tmp);
|
||||
}
|
||||
|
||||
/* Bitmap functions for the minix filesystem. */
|
||||
#define minix_test_and_set_bit(nr,addr) ext2_set_bit(nr,addr)
|
||||
#define minix_set_bit(nr,addr) ((void)ext2_set_bit(nr,addr))
|
||||
#define minix_test_and_clear_bit(nr,addr) ext2_clear_bit(nr,addr)
|
||||
#define minix_test_bit(nr,addr) ext2_test_bit(nr,addr)
|
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#define minix_find_first_zero_bit(addr,size) ext2_find_first_zero_bit(addr,size)
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#endif /* _PPC_BITOPS_H */
|
||||
#endif /* __KERNEL__ */
|
||||
Reference in New Issue
Block a user