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Merge tag 'kvm-arm-for-3.18-take-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm
Pull second batch of changes for KVM/{arm,arm64} from Marc Zyngier:
"The most obvious thing is the sizeable MMU changes to support 48bit
VAs on arm64.
Summary:
- support for 48bit IPA and VA (EL2)
- a number of fixes for devices mapped into guests
- yet another VGIC fix for BE
- a fix for CPU hotplug
- a few compile fixes (disabled VGIC, strict mm checks)"
[ I'm pulling directly from Marc at the request of Paolo Bonzini, whose
backpack was stolen at Düsseldorf airport and will do new keys and
rebuild his web of trust. - Linus ]
* tag 'kvm-arm-for-3.18-take-2' of git://git.kernel.org/pub/scm/linux/kernel/git/kvmarm/kvmarm:
arm/arm64: KVM: Fix BE accesses to GICv2 EISR and ELRSR regs
arm: kvm: STRICT_MM_TYPECHECKS fix for user_mem_abort
arm/arm64: KVM: Ensure memslots are within KVM_PHYS_SIZE
arm64: KVM: Implement 48 VA support for KVM EL2 and Stage-2
arm/arm64: KVM: map MMIO regions at creation time
arm64: kvm: define PAGE_S2_DEVICE as read-only by default
ARM: kvm: define PAGE_S2_DEVICE as read-only by default
arm/arm64: KVM: add 'writable' parameter to kvm_phys_addr_ioremap
arm/arm64: KVM: fix potential NULL dereference in user_mem_abort()
arm/arm64: KVM: use __GFP_ZERO not memset() to get zeroed pages
ARM: KVM: fix vgic-disabled build
arm: kvm: fix CPU hotplug
This commit is contained in:
+3
-21
@@ -71,35 +71,17 @@ static void vgic_v2_sync_lr_elrsr(struct kvm_vcpu *vcpu, int lr,
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struct vgic_lr lr_desc)
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{
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if (!(lr_desc.state & LR_STATE_MASK))
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__set_bit(lr, (unsigned long *)vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr);
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vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr |= (1ULL << lr);
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}
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static u64 vgic_v2_get_elrsr(const struct kvm_vcpu *vcpu)
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{
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u64 val;
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#if BITS_PER_LONG == 64
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val = vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr[1];
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val <<= 32;
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val |= vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr[0];
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#else
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val = *(u64 *)vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr;
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#endif
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return val;
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return vcpu->arch.vgic_cpu.vgic_v2.vgic_elrsr;
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}
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static u64 vgic_v2_get_eisr(const struct kvm_vcpu *vcpu)
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{
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u64 val;
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#if BITS_PER_LONG == 64
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val = vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr[1];
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val <<= 32;
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val |= vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr[0];
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#else
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val = *(u64 *)vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr;
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#endif
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return val;
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return vcpu->arch.vgic_cpu.vgic_v2.vgic_eisr;
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}
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static u32 vgic_v2_get_interrupt_status(const struct kvm_vcpu *vcpu)
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+18
-3
@@ -145,6 +145,20 @@ static void vgic_free_bitmap(struct vgic_bitmap *b)
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b->shared = NULL;
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}
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/*
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* Call this function to convert a u64 value to an unsigned long * bitmask
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* in a way that works on both 32-bit and 64-bit LE and BE platforms.
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*
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* Warning: Calling this function may modify *val.
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*/
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static unsigned long *u64_to_bitmask(u64 *val)
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{
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#if defined(CONFIG_CPU_BIG_ENDIAN) && BITS_PER_LONG == 32
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*val = (*val >> 32) | (*val << 32);
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#endif
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return (unsigned long *)val;
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}
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static u32 *vgic_bitmap_get_reg(struct vgic_bitmap *x,
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int cpuid, u32 offset)
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{
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@@ -1442,7 +1456,7 @@ static bool vgic_process_maintenance(struct kvm_vcpu *vcpu)
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* active bit.
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*/
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u64 eisr = vgic_get_eisr(vcpu);
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unsigned long *eisr_ptr = (unsigned long *)&eisr;
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unsigned long *eisr_ptr = u64_to_bitmask(&eisr);
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int lr;
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for_each_set_bit(lr, eisr_ptr, vgic->nr_lr) {
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@@ -1505,7 +1519,7 @@ static void __kvm_vgic_sync_hwstate(struct kvm_vcpu *vcpu)
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level_pending = vgic_process_maintenance(vcpu);
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elrsr = vgic_get_elrsr(vcpu);
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elrsr_ptr = (unsigned long *)&elrsr;
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elrsr_ptr = u64_to_bitmask(&elrsr);
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/* Clear mappings for empty LRs */
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for_each_set_bit(lr, elrsr_ptr, vgic->nr_lr) {
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@@ -1899,7 +1913,8 @@ int kvm_vgic_init(struct kvm *kvm)
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}
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ret = kvm_phys_addr_ioremap(kvm, kvm->arch.vgic.vgic_cpu_base,
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vgic->vcpu_base, KVM_VGIC_V2_CPU_SIZE);
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vgic->vcpu_base, KVM_VGIC_V2_CPU_SIZE,
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true);
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if (ret) {
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kvm_err("Unable to remap VGIC CPU to VCPU\n");
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goto out;
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