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drm/i915: re-enable rc6 support for Ironlake+
Re-enable rc6 support on Ironlake for power savings. Adds a debugfs file to check current RC state, adds a missing workaround for Ironlake MI_SET_CONTEXT instructions, and renames MCHBAR_RENDER_STANDBY to RSTDBYCTL to match the docs. Keep RC6 and the power context disabled on pre-ILK. It only seems to hang and doesn't save any power. Signed-off-by: Jesse Barnes <jbarnes@virtuousgeek.org> Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
This commit is contained in:
committed by
Chris Wilson
parent
0dc79fb2a3
commit
88271da3f3
@@ -6420,35 +6420,37 @@ void intel_enable_clock_gating(struct drm_device *dev)
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* GPU can automatically power down the render unit if given a page
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* to save state.
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*/
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if (IS_IRONLAKE_M(dev) && 0) { /* XXX causes a failure during suspend */
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if (IS_IRONLAKE_M(dev)) {
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if (dev_priv->renderctx == NULL)
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dev_priv->renderctx = intel_alloc_context_page(dev);
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if (dev_priv->renderctx) {
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struct drm_i915_gem_object *obj = dev_priv->renderctx;
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if (BEGIN_LP_RING(4) == 0) {
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OUT_RING(MI_SET_CONTEXT);
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OUT_RING(obj->gtt_offset |
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MI_MM_SPACE_GTT |
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MI_SAVE_EXT_STATE_EN |
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MI_RESTORE_EXT_STATE_EN |
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MI_RESTORE_INHIBIT);
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OUT_RING(MI_NOOP);
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OUT_RING(MI_FLUSH);
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ADVANCE_LP_RING();
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if (BEGIN_LP_RING(6) != 0) {
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i915_gem_object_unpin(obj);
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drm_gem_object_unreference(&obj->base);
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dev_priv->renderctx = NULL;
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return;
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}
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OUT_RING(MI_SUSPEND_FLUSH | MI_SUSPEND_FLUSH_EN);
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OUT_RING(MI_SET_CONTEXT);
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OUT_RING(obj->gtt_offset |
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MI_MM_SPACE_GTT |
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MI_SAVE_EXT_STATE_EN |
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MI_RESTORE_EXT_STATE_EN |
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MI_RESTORE_INHIBIT);
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OUT_RING(MI_SUSPEND_FLUSH);
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OUT_RING(MI_NOOP);
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OUT_RING(MI_FLUSH);
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ADVANCE_LP_RING();
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} else
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DRM_DEBUG_KMS("Failed to allocate render context."
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"Disable RC6\n");
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}
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if (IS_GEN4(dev) && IS_MOBILE(dev)) {
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if (dev_priv->pwrctx == NULL)
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dev_priv->pwrctx = intel_alloc_context_page(dev);
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if (dev_priv->pwrctx) {
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struct drm_i915_gem_object *obj = dev_priv->pwrctx;
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I915_WRITE(PWRCTXA, obj->gtt_offset | PWRCTX_EN);
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I915_WRITE(MCHBAR_RENDER_STANDBY,
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I915_READ(MCHBAR_RENDER_STANDBY) & ~RCX_SW_EXIT);
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}
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}
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}
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