Merge branch 'master' of git://git.kernel.org/pub/scm/linux/kernel/git/rusty/linux-2.6-cpumask into merge-rr-cpumask

Conflicts: arch/x86/kernel/io_apic.c kernel/rcuclassic.c kernel/sched.c kernel/time/tick-sched.c Signed-off-by: Mike Travis <travis@sgi.com> [ mingo@elte.hu: backmerged typo fix for io_apic.c ] Signed-off-by: Ingo Molnar <mingo@elte.hu>
2026-05-01 15:00:59 -07:00 · 2008-12-31 17:34:16 -08:00
parent 6092848a2a 8c384cdee3
commit 7eb1955336
4791 changed files with 280260 additions and 129933 deletions
@@ -6,6 +6,8 @@ config OPROFILE
 	tristate "OProfile system profiling (EXPERIMENTAL)"
 	depends on PROFILING
 	depends on HAVE_OPROFILE
+	select TRACING
+	select RING_BUFFER
 	help
 	  OProfile is a profiling system capable of profiling the
 	  whole system, include the kernel, kernel modules, libraries,
@@ -96,9 +96,6 @@ static inline dma_addr_t __deprecated isa_page_to_bus(struct page *page)
 	return page_to_phys(page);
 }

-/* This depends on working iommu.  */
-#define BIO_VMERGE_BOUNDARY	(alpha_mv.mv_pci_tbi ? PAGE_SIZE : 0)
-
 /* Maximum PIO space address supported?  */
 #define IO_SPACE_LIMIT 0xffff

@@ -39,7 +39,24 @@ static inline cpumask_t node_to_cpumask(int node)
 	return node_cpu_mask;
 }

+extern struct cpumask node_to_cpumask_map[];
+/* FIXME: This is dumb, recalculating every time.  But simple. */
+static const struct cpumask *cpumask_of_node(int node)
+{
+	int cpu;
+
+	cpumask_clear(&node_to_cpumask_map[node]);
+
+	for_each_online_cpu(cpu) {
+		if (cpu_to_node(cpu) == node)
+			cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
+	}
+
+	return &node_to_cpumask_map[node];
+}
+
 #define pcibus_to_cpumask(bus)	(cpu_online_map)
+#define cpumask_of_pcibus(bus)	(cpu_online_mask)

 #endif /* !CONFIG_NUMA */
 # include <asm-generic/topology.h>
@@ -19,15 +19,18 @@ void foo(void)
 	BLANK();

        DEFINE(TASK_BLOCKED, offsetof(struct task_struct, blocked));
-        DEFINE(TASK_UID, offsetof(struct task_struct, uid));
-        DEFINE(TASK_EUID, offsetof(struct task_struct, euid));
-        DEFINE(TASK_GID, offsetof(struct task_struct, gid));
-        DEFINE(TASK_EGID, offsetof(struct task_struct, egid));
+        DEFINE(TASK_CRED, offsetof(struct task_struct, cred));
        DEFINE(TASK_REAL_PARENT, offsetof(struct task_struct, real_parent));
        DEFINE(TASK_GROUP_LEADER, offsetof(struct task_struct, group_leader));
        DEFINE(TASK_TGID, offsetof(struct task_struct, tgid));
        BLANK();

+        DEFINE(CRED_UID,  offsetof(struct cred, uid));
+        DEFINE(CRED_EUID, offsetof(struct cred, euid));
+        DEFINE(CRED_GID,  offsetof(struct cred, gid));
+        DEFINE(CRED_EGID, offsetof(struct cred, egid));
+        BLANK();
+
 	DEFINE(SIZEOF_PT_REGS, sizeof(struct pt_regs));
 	DEFINE(PT_PTRACED, PT_PTRACED);
 	DEFINE(CLONE_VM, CLONE_VM);
@@ -850,8 +850,9 @@ osf_getpriority:
 sys_getxuid:
 	.prologue 0
 	ldq	$2, TI_TASK($8)
-	ldl	$0, TASK_UID($2)
-	ldl	$1, TASK_EUID($2)
+	ldq	$3, TASK_CRED($2)
+	ldl	$0, CRED_UID($3)
+	ldl	$1, CRED_EUID($3)
 	stq	$1, 80($sp)
 	ret
 .end sys_getxuid
@@ -862,8 +863,9 @@ sys_getxuid:
 sys_getxgid:
 	.prologue 0
 	ldq	$2, TI_TASK($8)
-	ldl	$0, TASK_GID($2)
-	ldl	$1, TASK_EGID($2)
+	ldq	$3, TASK_CRED($2)
+	ldl	$0, CRED_GID($3)
+	ldl	$1, CRED_EGID($3)
 	stq	$1, 80($sp)
 	ret
 .end sys_getxgid
@@ -50,7 +50,8 @@ int irq_select_affinity(unsigned int irq)
 	if (!irq_desc[irq].chip->set_affinity || irq_user_affinity[irq])
 		return 1;

-	while (!cpu_possible(cpu) || !cpu_isset(cpu, irq_default_affinity))
+	while (!cpu_possible(cpu) ||
+	       !cpumask_test_cpu(cpu, irq_default_affinity))
 		cpu = (cpu < (NR_CPUS-1) ? cpu + 1 : 0);
 	last_cpu = cpu;

@@ -79,6 +79,11 @@ int alpha_l3_cacheshape;
 unsigned long alpha_verbose_mcheck = CONFIG_VERBOSE_MCHECK_ON;
 #endif

+#ifdef CONFIG_NUMA
+struct cpumask node_to_cpumask_map[MAX_NUMNODES] __read_mostly;
+EXPORT_SYMBOL(node_to_cpumask_map);
+#endif
+
 /* Which processor we booted from.  */
 int boot_cpuid;

@@ -156,7 +156,6 @@ config ARCH_MTD_XIP
 	bool

 config GENERIC_HARDIRQS_NO__DO_IRQ
-	bool
 	def_bool y

 if OPROFILE
@@ -201,6 +200,7 @@ choice

 config ARCH_AAEC2000
 	bool "Agilent AAEC-2000 based"
+	select CPU_ARM920T
 	select ARM_AMBA
 	select HAVE_CLK
 	help
@@ -210,6 +210,7 @@ config ARCH_INTEGRATOR
 	bool "ARM Ltd. Integrator family"
 	select ARM_AMBA
 	select HAVE_CLK
+	select COMMON_CLKDEV
 	select ICST525
 	help
 	  Support for ARM's Integrator platform.
@@ -218,6 +219,7 @@ config ARCH_REALVIEW
 	bool "ARM Ltd. RealView family"
 	select ARM_AMBA
 	select HAVE_CLK
+	select COMMON_CLKDEV
 	select ICST307
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -229,6 +231,7 @@ config ARCH_VERSATILE
 	select ARM_AMBA
 	select ARM_VIC
 	select HAVE_CLK
+	select COMMON_CLKDEV
 	select ICST307
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -243,22 +246,15 @@ config ARCH_AT91
 	  This enables support for systems based on the Atmel AT91RM9200,
 	  AT91SAM9 and AT91CAP9 processors.

-config ARCH_CLPS7500
-	bool "Cirrus CL-PS7500FE"
-	select TIMER_ACORN
-	select ISA
-	select NO_IOPORT
-	select ARCH_SPARSEMEM_ENABLE
-	help
-	  Support for the Cirrus Logic PS7500FE system-on-a-chip.
-
 config ARCH_CLPS711X
 	bool "Cirrus Logic CLPS711x/EP721x-based"
+	select CPU_ARM720T
 	help
 	  Support for Cirrus Logic 711x/721x based boards.

 config ARCH_EBSA110
 	bool "EBSA-110"
+	select CPU_SA110
 	select ISA
 	select NO_IOPORT
 	help
@@ -269,16 +265,19 @@ config ARCH_EBSA110

 config ARCH_EP93XX
 	bool "EP93xx-based"
+	select CPU_ARM920T
 	select ARM_AMBA
 	select ARM_VIC
 	select GENERIC_GPIO
 	select HAVE_CLK
+	select COMMON_CLKDEV
 	select ARCH_REQUIRE_GPIOLIB
 	help
 	  This enables support for the Cirrus EP93xx series of CPUs.

 config ARCH_FOOTBRIDGE
 	bool "FootBridge"
+	select CPU_SA110
 	select FOOTBRIDGE
 	help
 	  Support for systems based on the DC21285 companion chip
@@ -286,18 +285,23 @@ config ARCH_FOOTBRIDGE

 config ARCH_NETX
 	bool "Hilscher NetX based"
+	select CPU_ARM926T
 	select ARM_VIC
+	select GENERIC_CLOCKEVENTS
+	select GENERIC_TIME
 	help
 	  This enables support for systems based on the Hilscher NetX Soc

 config ARCH_H720X
 	bool "Hynix HMS720x-based"
+	select CPU_ARM720T
 	select ISA_DMA_API
 	help
 	  This enables support for systems based on the Hynix HMS720x

 config ARCH_IMX
 	bool "IMX"
+	select CPU_ARM920T
 	select GENERIC_GPIO
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -307,6 +311,7 @@ config ARCH_IMX
 config ARCH_IOP13XX
 	bool "IOP13xx-based"
 	depends on MMU
+	select CPU_XSC3
 	select PLAT_IOP
 	select PCI
 	select ARCH_SUPPORTS_MSI
@@ -317,6 +322,7 @@ config ARCH_IOP13XX
 config ARCH_IOP32X
 	bool "IOP32x-based"
 	depends on MMU
+	select CPU_XSCALE
 	select PLAT_IOP
 	select PCI
 	select GENERIC_GPIO
@@ -328,6 +334,7 @@ config ARCH_IOP32X
 config ARCH_IOP33X
 	bool "IOP33x-based"
 	depends on MMU
+	select CPU_XSCALE
 	select PLAT_IOP
 	select PCI
 	select GENERIC_GPIO
@@ -338,6 +345,7 @@ config ARCH_IOP33X
 config ARCH_IXP23XX
 	bool "IXP23XX-based"
 	depends on MMU
+	select CPU_XSC3
 	select PCI
 	help
 	  Support for Intel's IXP23xx (XScale) family of processors.
@@ -345,6 +353,7 @@ config ARCH_IXP23XX
 config ARCH_IXP2000
 	bool "IXP2400/2800-based"
 	depends on MMU
+	select CPU_XSCALE
 	select PCI
 	help
 	  Support for Intel's IXP2400/2800 (XScale) family of processors.
@@ -352,6 +361,7 @@ config ARCH_IXP2000
 config ARCH_IXP4XX
 	bool "IXP4xx-based"
 	depends on MMU
+	select CPU_XSCALE
 	select GENERIC_GPIO
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -361,6 +371,7 @@ config ARCH_IXP4XX

 config ARCH_L7200
 	bool "LinkUp-L7200"
+	select CPU_ARM720T
 	select FIQ
 	help
 	  Say Y here if you intend to run this kernel on a LinkUp Systems
@@ -374,7 +385,9 @@ config ARCH_L7200

 config ARCH_KIRKWOOD
 	bool "Marvell Kirkwood"
+	select CPU_FEROCEON
 	select PCI
+	select GENERIC_GPIO
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
 	select PLAT_ORION
@@ -384,13 +397,16 @@ config ARCH_KIRKWOOD

 config ARCH_KS8695
 	bool "Micrel/Kendin KS8695"
+	select CPU_ARM922T
 	select GENERIC_GPIO
+        select ARCH_REQUIRE_GPIOLIB
 	help
 	  Support for Micrel/Kendin KS8695 "Centaur" (ARM922T) based
 	  System-on-Chip devices.

 config ARCH_NS9XXX
 	bool "NetSilicon NS9xxx"
+	select CPU_ARM926T
 	select GENERIC_GPIO
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -403,6 +419,7 @@ config ARCH_NS9XXX

 config ARCH_LOKI
 	bool "Marvell Loki (88RC8480)"
+	select CPU_FEROCEON
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
 	select PLAT_ORION
@@ -411,7 +428,9 @@ config ARCH_LOKI

 config ARCH_MV78XX0
 	bool "Marvell MV78xx0"
+	select CPU_FEROCEON
 	select PCI
+	select GENERIC_GPIO
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
 	select PLAT_ORION
@@ -432,6 +451,7 @@ config ARCH_MXC
 config ARCH_ORION5X
 	bool "Marvell Orion"
 	depends on MMU
+	select CPU_FEROCEON
 	select PCI
 	select GENERIC_GPIO
 	select GENERIC_TIME
@@ -444,6 +464,7 @@ config ARCH_ORION5X

 config ARCH_PNX4008
 	bool "Philips Nexperia PNX4008 Mobile"
+	select CPU_ARM926T
 	select HAVE_CLK
 	help
 	  This enables support for Philips PNX4008 mobile platform.
@@ -454,6 +475,7 @@ config ARCH_PXA
 	select ARCH_MTD_XIP
 	select GENERIC_GPIO
 	select HAVE_CLK
+	select COMMON_CLKDEV
 	select ARCH_REQUIRE_GPIOLIB
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
@@ -477,6 +499,7 @@ config ARCH_RPC

 config ARCH_SA1100
 	bool "SA1100-based"
+	select CPU_SA1100
 	select ISA
 	select ARCH_SPARSEMEM_ENABLE
 	select ARCH_MTD_XIP
@@ -498,8 +521,16 @@ config ARCH_S3C2410
 	  BAST (<http://www.simtec.co.uk/products/EB110ITX/>), the IPAQ 1940 or
 	  the Samsung SMDK2410 development board (and derivatives).

+config ARCH_S3C64XX
+	bool "Samsung S3C64XX"
+	select GENERIC_GPIO
+	select HAVE_CLK
+	help
+	  Samsung S3C64XX series based systems
+
 config ARCH_SHARK
 	bool "Shark"
+	select CPU_SA110
 	select ISA
 	select ISA_DMA
 	select ZONE_DMA
@@ -510,6 +541,7 @@ config ARCH_SHARK

 config ARCH_LH7A40X
 	bool "Sharp LH7A40X"
+	select CPU_ARM922T
 	select ARCH_DISCONTIGMEM_ENABLE if !LH7A40X_CONTIGMEM
 	select ARCH_SPARSEMEM_ENABLE if !LH7A40X_CONTIGMEM
 	help
@@ -520,6 +552,7 @@ config ARCH_LH7A40X

 config ARCH_DAVINCI
 	bool "TI DaVinci"
+	select CPU_ARM926T
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
 	select GENERIC_GPIO
@@ -541,6 +574,7 @@ config ARCH_OMAP

 config ARCH_MSM
 	bool "Qualcomm MSM"
+	select CPU_V6
 	select GENERIC_TIME
 	select GENERIC_CLOCKEVENTS
 	help
@@ -549,6 +583,13 @@ config ARCH_MSM
 	  interface to the ARM9 modem processor which runs the baseband stack
 	  and controls some vital subsystems (clock and power control, etc).

+config ARCH_W90X900
+	bool "Nuvoton W90X900 CPU"
+	select CPU_ARM926T
+	help
+		Support for Nuvoton (Winbond logic dept.) ARM9 processor,You
+		can login www.mcuos.com or www.nuvoton.com to know more.
+
 endchoice

 source "arch/arm/mach-clps711x/Kconfig"
@@ -590,6 +631,7 @@ source "arch/arm/mach-orion5x/Kconfig"
 source "arch/arm/mach-kirkwood/Kconfig"

 source "arch/arm/plat-s3c24xx/Kconfig"
+source "arch/arm/plat-s3c64xx/Kconfig"
 source "arch/arm/plat-s3c/Kconfig"

 if ARCH_S3C2410
@@ -601,6 +643,11 @@ source "arch/arm/mach-s3c2442/Kconfig"
 source "arch/arm/mach-s3c2443/Kconfig"
 endif

+if ARCH_S3C64XX
+source "arch/arm/mach-s3c6400/Kconfig"
+source "arch/arm/mach-s3c6410/Kconfig"
+endif
+
 source "arch/arm/mach-lh7a40x/Kconfig"

 source "arch/arm/mach-imx/Kconfig"
@@ -627,6 +674,8 @@ source "arch/arm/mach-ks8695/Kconfig"

 source "arch/arm/mach-msm/Kconfig"

+source "arch/arm/mach-w90x900/Kconfig"
+
 # Definitions to make life easier
 config ARCH_ACORN
 	bool
@@ -781,7 +830,7 @@ config HOTPLUG_CPU

 config LOCAL_TIMERS
 	bool "Use local timer interrupts"
-	depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP)
+	depends on SMP && (REALVIEW_EB_ARM11MP || MACH_REALVIEW_PB11MP || REALVIEW_EB_A9MP)
 	default y
 	help
 	  Enable support for local timers on SMP platforms, rather then the
@@ -76,6 +76,7 @@ tune-$(CONFIG_CPU_SA110)	:=-mtune=strongarm110
 tune-$(CONFIG_CPU_SA1100)	:=-mtune=strongarm1100
 tune-$(CONFIG_CPU_XSCALE)	:=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
 tune-$(CONFIG_CPU_XSC3)		:=$(call cc-option,-mtune=xscale,-mtune=strongarm110) -Wa,-mcpu=xscale
+tune-$(CONFIG_CPU_FEROCEON)	:=$(call cc-option,-mtune=marvell-f,-mtune=xscale)
 tune-$(CONFIG_CPU_V6)		:=$(call cc-option,-mtune=arm1136j-s,-mtune=strongarm)

 ifeq ($(CONFIG_AEABI),y)
@@ -96,7 +97,6 @@ textofs-y	:= 0x00008000

 machine-$(CONFIG_ARCH_RPC)	   := rpc
 machine-$(CONFIG_ARCH_EBSA110)	   := ebsa110
- machine-$(CONFIG_ARCH_CLPS7500)   := clps7500
 machine-$(CONFIG_FOOTBRIDGE)	   := footbridge
 machine-$(CONFIG_ARCH_SHARK)	   := shark
 machine-$(CONFIG_ARCH_SA1100)	   := sa1100
@@ -121,7 +121,10 @@ endif
 machine-$(CONFIG_ARCH_OMAP3)	   := omap2
    plat-$(CONFIG_ARCH_OMAP)	   := omap
 machine-$(CONFIG_ARCH_S3C2410)	   := s3c2410 s3c2400 s3c2412 s3c2440 s3c2442 s3c2443
+ machine-$(CONFIG_ARCH_S3C24A0)	   := s3c24a0
    plat-$(CONFIG_PLAT_S3C24XX)	   := s3c24xx s3c
+ machine-$(CONFIG_ARCH_S3C64XX)	   := s3c6400 s3c6410
+    plat-$(CONFIG_PLAT_S3C64XX)	   := s3c64xx s3c
 machine-$(CONFIG_ARCH_LH7A40X)	   := lh7a40x
 machine-$(CONFIG_ARCH_VERSATILE)  := versatile
 machine-$(CONFIG_ARCH_IMX)	   := imx
@@ -139,11 +142,13 @@ endif
    plat-$(CONFIG_ARCH_MXC)	   := mxc
 machine-$(CONFIG_ARCH_MX2)	   := mx2
 machine-$(CONFIG_ARCH_MX3)	   := mx3
+ machine-$(CONFIG_ARCH_MX1)	   := mx1
 machine-$(CONFIG_ARCH_ORION5X)	   := orion5x
    plat-$(CONFIG_PLAT_ORION)	   := orion
 machine-$(CONFIG_ARCH_MSM)	   := msm
 machine-$(CONFIG_ARCH_LOKI)       := loki
 machine-$(CONFIG_ARCH_MV78XX0)    := mv78xx0
+ machine-$(CONFIG_ARCH_W90X900)    := w90x900

 ifeq ($(CONFIG_ARCH_EBSA110),y)
 # This is what happens if you forget the IOCS16 line.
@@ -23,10 +23,6 @@ ifeq ($(CONFIG_ARCH_L7200),y)
 OBJS		+= head-l7200.o
 endif

-ifeq ($(CONFIG_ARCH_CLPS7500),y)
-HEAD		= head-clps7500.o
-endif
-
 ifeq ($(CONFIG_ARCH_P720T),y)
 # Borrow this code from SA1100
 OBJS		+= head-sa1100.o
@@ -1,86 +0,0 @@
-/*
- * linux/arch/arm/boot/compressed/head-clps7500.S
- *
- * Copyright (C) 1999, 2000, 2001 Nexus Electronics Ltd
- */
-
-
-		/* There are three different ways the kernel can be
-		   booted on a 7500 system: from Angel (loaded in RAM), from
-		   16-bit ROM or from 32-bit Flash.  Luckily, a single kernel
-		   image does for them all. */
-		/* This branch is taken if the CPU memory width matches the
-		   actual device in use.  The default at power on is 16 bits
-		   so we must be prepared for a mismatch. */
-		.section ".start", "ax"
-2:
-		b	1f
-		.word	0xffff
-		.word	0xb632		@ mov r11, #0x03200000
-		.word	0xe3a0
-		.word	0x0000		@ mov r0, #0
-		.word	0xe3a0
-		.word	0x0080		@ strb r0, [r11, #0x80]
-		.word	0xe5cb
-		.word	0xf000		@ mov pc, #0
-		.word	0xe3a0
-1:
-		adr	r1, 2b
-		teq	r1, #0
-		bne	.Langel
-		/* This is a direct-from-ROM boot.  Copy the kernel into 
-		   RAM and run it there. */
-		mov	r0, #0x30
-		mcr	p15, 0, r0, c1, c0, 0
-		mov	r0, #0x13
-		msr	cpsr_cxsf, r0
-		mov	r12, #0x03000000	@ point to LEDs
-		orr	r12, r12, #0x00020000
-		orr	r12, r12, #0xba00
-		mov	r0, #0x5500
-		str	r0, [r12]
-		mov	r0, #0x10000000
-		orr	r0, r0, #0x8000
-		mov	r4, r0
-		ldr	r2, =_end
-2:
-		ldr	r3, [r1], #4
-		str	r3, [r0], #4
-		teq	r0, r2
-		bne	2b
-		mov	r0, #0xff00
-		str	r0, [r12]
-1:	
-		mov	r12, #0x03000000	@ point to LEDs
-		orr	r12, r12, #0x00020000
-		orr	r12, r12, #0xba00
-		mov	r0, #0xfe00
-		str	r0, [r12]
-
-		adr	lr, 1f
-		mov	r0, #0
-		mov	r1, #14		/* MACH_TYPE_CLPS7500 */
-		mov	pc, lr
-.Langel:
-#ifdef CONFIG_ANGELBOOT
-		/* Call Angel to switch into SVC mode. */
-		mov	r0, #0x17
-		swi	0x123456
-#endif
-		/* Ensure all interrupts are off and MMU disabled */
-		mrs	r0, cpsr
-		orr	r0, r0, #0xc0
-		msr	cpsr_cxsf, r0
-
-		adr	lr, 1b
-		orr	lr, lr, #0x10000000
-		mov	r0, #0x30		@ MMU off
-		mcr	p15, 0, r0, c1, c0, 0
-		mov	r0, r0
-	 	mov	pc, lr
-
-		.ltorg
-
-1:
-/* And the rest */
-#include "head.S"
@@ -624,6 +624,12 @@ proc_types:
 		b	__armv4_mmu_cache_off
 		b	__armv4_mmu_cache_flush

+		.word	0x56056930
+		.word	0xff0ffff0		@ PXA935
+		b	__armv4_mmu_cache_on
+		b	__armv4_mmu_cache_off
+		b	__armv4_mmu_cache_flush
+
 		.word	0x56050000		@ Feroceon
 		.word	0xff0f0000
 		b	__armv4_mmu_cache_on
@@ -717,6 +723,9 @@ __armv7_mmu_cache_off:
 		bl	__armv7_mmu_cache_flush
 		mov	r0, #0
 		mcr	p15, 0, r0, c8, c7, 0	@ invalidate whole TLB
+		mcr	p15, 0, r0, c7, c5, 6	@ invalidate BTC
+		mcr	p15, 0, r0, c7, c10, 4	@ DSB
+		mcr	p15, 0, r0, c7, c5, 4	@ ISB
 		mov	pc, r12

 __arm6_mmu_cache_off:
@@ -778,12 +787,13 @@ __armv6_mmu_cache_flush:
 __armv7_mmu_cache_flush:
 		mrc	p15, 0, r10, c0, c1, 5	@ read ID_MMFR1
 		tst	r10, #0xf << 16		@ hierarchical cache (ARMv7)
-		beq	hierarchical
 		mov	r10, #0
+		beq	hierarchical
 		mcr	p15, 0, r10, c7, c14, 0	@ clean+invalidate D
 		b	iflush
 hierarchical:
-		stmfd	sp!, {r0-r5, r7, r9-r11}
+		mcr	p15, 0, r10, c7, c10, 5	@ DMB
+		stmfd	sp!, {r0-r5, r7, r9, r11}
 		mrc	p15, 1, r0, c0, c0, 1	@ read clidr
 		ands	r3, r0, #0x7000000	@ extract loc from clidr
 		mov	r3, r3, lsr #23		@ left align loc bit field
@@ -820,12 +830,14 @@ skip:
 		cmp	r3, r10
 		bgt	loop1
 finished:
+		ldmfd	sp!, {r0-r5, r7, r9, r11}
 		mov	r10, #0			@ swith back to cache level 0
 		mcr	p15, 2, r10, c0, c0, 0	@ select current cache level in cssr
-		ldmfd	sp!, {r0-r5, r7, r9-r11}
 iflush:
+		mcr	p15, 0, r10, c7, c10, 4	@ DSB
 		mcr	p15, 0, r10, c7, c5, 0	@ invalidate I+BTB
-		mcr	p15, 0, r10, c7, c10, 4	@ drain WB
+		mcr	p15, 0, r10, c7, c10, 4	@ DSB
+		mcr	p15, 0, r10, c7, c5, 4	@ ISB
 		mov	pc, lr

 __armv5tej_mmu_cache_flush:
@@ -86,6 +86,8 @@ static void putstr(const char *ptr)

 #define __ptr_t void *

+#define memzero(s,n) __memzero(s,n)
+
 /*
 * Optimised C version of memzero for the ARM.
 */
@@ -33,3 +33,6 @@ config SHARPSL_PM

 config SHARP_SCOOP
 	bool
+
+config COMMON_CLKDEV
+	bool
@@ -17,3 +17,4 @@ obj-$(CONFIG_SHARP_SCOOP)	+= scoop.o
 obj-$(CONFIG_ARCH_IXP2000)	+= uengine.o
 obj-$(CONFIG_ARCH_IXP23XX)	+= uengine.o
 obj-$(CONFIG_PCI_HOST_ITE8152)  += it8152.o
+obj-$(CONFIG_COMMON_CLKDEV)	+= clkdev.o
@@ -0,0 +1,128 @@
+/*
+ *  arch/arm/common/clkdev.c
+ *
+ *  Copyright (C) 2008 Russell King.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * Helper for the clk API to assist looking up a struct clk.
+ */
+#include <linux/module.h>
+#include <linux/kernel.h>
+#include <linux/device.h>
+#include <linux/list.h>
+#include <linux/errno.h>
+#include <linux/err.h>
+#include <linux/string.h>
+#include <linux/mutex.h>
+
+#include <asm/clkdev.h>
+#include <mach/clkdev.h>
+
+static LIST_HEAD(clocks);
+static DEFINE_MUTEX(clocks_mutex);
+
+static struct clk *clk_find(const char *dev_id, const char *con_id)
+{
+	struct clk_lookup *p;
+	struct clk *clk = NULL;
+	int match, best = 0;
+
+	list_for_each_entry(p, &clocks, node) {
+		if ((p->dev_id && !dev_id) || (p->con_id && !con_id))
+			continue;
+		match = 0;
+		if (p->dev_id)
+			match += 2 * (strcmp(p->dev_id, dev_id) == 0);
+		if (p->con_id)
+			match += 1 * (strcmp(p->con_id, con_id) == 0);
+		if (match == 0)
+			continue;
+
+		if (match > best) {
+			clk = p->clk;
+			best = match;
+		}
+	}
+	return clk;
+}
+
+struct clk *clk_get(struct device *dev, const char *con_id)
+{
+	const char *dev_id = dev ? dev_name(dev) : NULL;
+	struct clk *clk;
+
+	mutex_lock(&clocks_mutex);
+	clk = clk_find(dev_id, con_id);
+	if (clk && !__clk_get(clk))
+		clk = NULL;
+	mutex_unlock(&clocks_mutex);
+
+	return clk ? clk : ERR_PTR(-ENOENT);
+}
+EXPORT_SYMBOL(clk_get);
+
+void clk_put(struct clk *clk)
+{
+	__clk_put(clk);
+}
+EXPORT_SYMBOL(clk_put);
+
+void clkdev_add(struct clk_lookup *cl)
+{
+	mutex_lock(&clocks_mutex);
+	list_add_tail(&cl->node, &clocks);
+	mutex_unlock(&clocks_mutex);
+}
+EXPORT_SYMBOL(clkdev_add);
+
+#define MAX_DEV_ID	20
+#define MAX_CON_ID	16
+
+struct clk_lookup_alloc {
+	struct clk_lookup cl;
+	char	dev_id[MAX_DEV_ID];
+	char	con_id[MAX_CON_ID];
+};
+
+struct clk_lookup *clkdev_alloc(struct clk *clk, const char *con_id,
+	const char *dev_fmt, ...)
+{
+	struct clk_lookup_alloc *cla;
+
+	cla = kzalloc(sizeof(*cla), GFP_KERNEL);
+	if (!cla)
+		return NULL;
+
+	cla->cl.clk = clk;
+	if (con_id) {
+		strlcpy(cla->con_id, con_id, sizeof(cla->con_id));
+		cla->cl.con_id = cla->con_id;
+	}
+
+	if (dev_fmt) {
+		va_list ap;
+
+		va_start(ap, dev_fmt);
+		vscnprintf(cla->dev_id, sizeof(cla->dev_id), dev_fmt, ap);
+		cla->cl.dev_id = cla->dev_id;
+		va_end(ap);
+	}
+
+	return &cla->cl;
+}
+EXPORT_SYMBOL(clkdev_alloc);
+
+/*
+ * clkdev_drop - remove a clock dynamically allocated
+ */
+void clkdev_drop(struct clk_lookup *cl)
+{
+	mutex_lock(&clocks_mutex);
+	list_del(&cl->node);
+	mutex_unlock(&clocks_mutex);
+	kfree(cl);
+}
+EXPORT_SYMBOL(clkdev_drop);
@@ -1108,6 +1108,7 @@ void locomo_frontlight_set(struct locomo_dev *dev, int duty, int vr, int bpwf)
 	locomo_writel(bpwf | LOCOMO_ALC_EN, lchip->base + LOCOMO_FRONTLIGHT + LOCOMO_ALS);
 	spin_unlock_irqrestore(&lchip->lock, flags);
 }
+EXPORT_SYMBOL(locomo_frontlight_set);

 /*
 *	LoCoMo "Register Access Bus."
@@ -69,12 +69,12 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
 	/*
 	 * Make sure we clear all existing interrupts
 	 */
-	writel(0, base + VIC_VECT_ADDR);
+	writel(0, base + VIC_PL190_VECT_ADDR);
 	for (i = 0; i < 19; i++) {
 		unsigned int value;

-		value = readl(base + VIC_VECT_ADDR);
-		writel(value, base + VIC_VECT_ADDR);
+		value = readl(base + VIC_PL190_VECT_ADDR);
+		writel(value, base + VIC_PL190_VECT_ADDR);
 	}

 	for (i = 0; i < 16; i++) {
@@ -82,7 +82,7 @@ void __init vic_init(void __iomem *base, unsigned int irq_start,
 		writel(VIC_VECT_CNTL_ENABLE | i, reg);
 	}

-	writel(32, base + VIC_DEF_VECT_ADDR);
+	writel(32, base + VIC_PL190_DEF_VECT_ADDR);

 	for (i = 0; i < 32; i++) {
 		unsigned int irq = irq_start + i;
--- a/Show More
+++ b/Show More