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sh-pfc: Move driver from drivers/sh/ to drivers/pinctrl/
Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Acked-by: Paul Mundt <lethal@linux-sh.org> Acked-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
This commit is contained in:
Laurent Pinchart
committed by
Simon Horman
Simon Horman
parent
56dc04af3b
commit
6e54d8d252
@@ -1,6 +1,5 @@
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menu "SuperH / SH-Mobile Driver Options"
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source "drivers/sh/intc/Kconfig"
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source "drivers/sh/pfc/Kconfig"
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endmenu
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@@ -5,7 +5,6 @@ obj-y := intc/
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obj-$(CONFIG_HAVE_CLK) += clk/
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obj-$(CONFIG_MAPLE) += maple/
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obj-$(CONFIG_SH_PFC) += pfc/
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obj-$(CONFIG_SUPERHYWAY) += superhyway/
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obj-y += pm_runtime.o
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@@ -1,18 +0,0 @@
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comment "Pin function controller options"
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config SH_PFC
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# XXX move off the gpio dependency
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depends on GENERIC_GPIO
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select GPIO_SH_PFC if ARCH_REQUIRE_GPIOLIB
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select PINCTRL_SH_PFC
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select PINCTRL
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select PINMUX
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select PINCONF
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def_bool y
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config GPIO_SH_PFC
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bool "SuperH PFC GPIO support"
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depends on SH_PFC && GPIOLIB
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help
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This enables support for GPIOs within the SoC's pin function
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controller.
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@@ -1,5 +0,0 @@
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sh-pfc-objs = core.o pinctrl.o
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ifeq ($(CONFIG_GPIO_SH_PFC),y)
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sh-pfc-objs += gpio.o
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endif
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obj-y += sh-pfc.o
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File diff suppressed because it is too large
Load Diff
@@ -1,54 +0,0 @@
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/*
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* SuperH Pin Function Controller support.
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*
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* Copyright (C) 2012 Renesas Solutions Corp.
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#ifndef __SH_PFC_CORE_H__
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#define __SH_PFC_CORE_H__
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#include <linux/compiler.h>
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#include <linux/sh_pfc.h>
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#include <linux/types.h>
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struct sh_pfc_window {
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phys_addr_t phys;
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void __iomem *virt;
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unsigned long size;
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};
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struct sh_pfc_chip;
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struct sh_pfc_pinctrl;
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struct sh_pfc {
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struct device *dev;
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struct sh_pfc_platform_data *pdata;
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spinlock_t lock;
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unsigned int num_windows;
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struct sh_pfc_window *window;
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struct sh_pfc_chip *gpio;
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struct sh_pfc_pinctrl *pinctrl;
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};
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc);
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int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc);
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int sh_pfc_register_pinctrl(struct sh_pfc *pfc);
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int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc);
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int sh_pfc_read_bit(struct pinmux_data_reg *dr, unsigned long in_pos);
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void sh_pfc_write_bit(struct pinmux_data_reg *dr, unsigned long in_pos,
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unsigned long value);
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int sh_pfc_get_data_reg(struct sh_pfc *pfc, unsigned gpio,
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struct pinmux_data_reg **drp, int *bitp);
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int sh_pfc_gpio_to_enum(struct sh_pfc *pfc, unsigned gpio, int pos,
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pinmux_enum_t *enum_idp);
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int sh_pfc_config_gpio(struct sh_pfc *pfc, unsigned gpio, int pinmux_type,
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int cfg_mode);
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#endif /* __SH_PFC_CORE_H__ */
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@@ -1,179 +0,0 @@
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/*
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* SuperH Pin Function Controller GPIO driver.
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*
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* Copyright (C) 2008 Magnus Damm
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* Copyright (C) 2009 - 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define pr_fmt(fmt) KBUILD_MODNAME " gpio: " fmt
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#include <linux/device.h>
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#include <linux/gpio.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/sh_pfc.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include "core.h"
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struct sh_pfc_chip {
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struct sh_pfc *pfc;
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struct gpio_chip gpio_chip;
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};
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static struct sh_pfc_chip *gpio_to_pfc_chip(struct gpio_chip *gc)
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{
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return container_of(gc, struct sh_pfc_chip, gpio_chip);
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}
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static struct sh_pfc *gpio_to_pfc(struct gpio_chip *gc)
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{
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return gpio_to_pfc_chip(gc)->pfc;
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}
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static int sh_gpio_request(struct gpio_chip *gc, unsigned offset)
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{
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return pinctrl_request_gpio(offset);
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}
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static void sh_gpio_free(struct gpio_chip *gc, unsigned offset)
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{
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pinctrl_free_gpio(offset);
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}
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static void sh_gpio_set_value(struct sh_pfc *pfc, unsigned gpio, int value)
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{
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struct pinmux_data_reg *dr = NULL;
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int bit = 0;
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if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
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BUG();
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else
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sh_pfc_write_bit(dr, bit, value);
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}
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static int sh_gpio_get_value(struct sh_pfc *pfc, unsigned gpio)
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{
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struct pinmux_data_reg *dr = NULL;
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int bit = 0;
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if (sh_pfc_get_data_reg(pfc, gpio, &dr, &bit) != 0)
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return -EINVAL;
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return sh_pfc_read_bit(dr, bit);
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}
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static int sh_gpio_direction_input(struct gpio_chip *gc, unsigned offset)
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{
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return pinctrl_gpio_direction_input(offset);
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}
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static int sh_gpio_direction_output(struct gpio_chip *gc, unsigned offset,
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int value)
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{
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sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
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return pinctrl_gpio_direction_output(offset);
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}
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static int sh_gpio_get(struct gpio_chip *gc, unsigned offset)
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{
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return sh_gpio_get_value(gpio_to_pfc(gc), offset);
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}
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static void sh_gpio_set(struct gpio_chip *gc, unsigned offset, int value)
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{
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sh_gpio_set_value(gpio_to_pfc(gc), offset, value);
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}
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static int sh_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
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{
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struct sh_pfc *pfc = gpio_to_pfc(gc);
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pinmux_enum_t enum_id;
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pinmux_enum_t *enum_ids;
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int i, k, pos;
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pos = 0;
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enum_id = 0;
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while (1) {
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pos = sh_pfc_gpio_to_enum(pfc, offset, pos, &enum_id);
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if (pos <= 0 || !enum_id)
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break;
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for (i = 0; i < pfc->pdata->gpio_irq_size; i++) {
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enum_ids = pfc->pdata->gpio_irq[i].enum_ids;
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for (k = 0; enum_ids[k]; k++) {
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if (enum_ids[k] == enum_id)
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return pfc->pdata->gpio_irq[i].irq;
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}
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}
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}
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return -ENOSYS;
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}
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static void sh_pfc_gpio_setup(struct sh_pfc_chip *chip)
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{
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struct sh_pfc *pfc = chip->pfc;
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struct gpio_chip *gc = &chip->gpio_chip;
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gc->request = sh_gpio_request;
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gc->free = sh_gpio_free;
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gc->direction_input = sh_gpio_direction_input;
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gc->get = sh_gpio_get;
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gc->direction_output = sh_gpio_direction_output;
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gc->set = sh_gpio_set;
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gc->to_irq = sh_gpio_to_irq;
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WARN_ON(pfc->pdata->first_gpio != 0); /* needs testing */
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gc->label = pfc->pdata->name;
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gc->owner = THIS_MODULE;
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gc->base = pfc->pdata->first_gpio;
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gc->ngpio = (pfc->pdata->last_gpio - pfc->pdata->first_gpio) + 1;
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}
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int sh_pfc_register_gpiochip(struct sh_pfc *pfc)
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{
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struct sh_pfc_chip *chip;
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int ret;
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chip = devm_kzalloc(pfc->dev, sizeof(*chip), GFP_KERNEL);
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if (unlikely(!chip))
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return -ENOMEM;
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chip->pfc = pfc;
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sh_pfc_gpio_setup(chip);
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ret = gpiochip_add(&chip->gpio_chip);
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if (unlikely(ret < 0))
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return ret;
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pfc->gpio = chip;
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pr_info("%s handling gpio %d -> %d\n",
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pfc->pdata->name, pfc->pdata->first_gpio,
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pfc->pdata->last_gpio);
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return 0;
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}
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int sh_pfc_unregister_gpiochip(struct sh_pfc *pfc)
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{
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struct sh_pfc_chip *chip = pfc->gpio;
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int ret;
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ret = gpiochip_remove(&chip->gpio_chip);
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if (unlikely(ret < 0))
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return ret;
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pfc->gpio = NULL;
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return 0;
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}
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@@ -1,464 +0,0 @@
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/*
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* SuperH Pin Function Controller pinmux support.
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*
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* Copyright (C) 2012 Paul Mundt
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#define DRV_NAME "sh-pfc"
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#define pr_fmt(fmt) KBUILD_MODNAME " pinctrl: " fmt
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#include <linux/device.h>
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#include <linux/err.h>
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#include <linux/init.h>
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#include <linux/module.h>
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#include <linux/pinctrl/consumer.h>
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#include <linux/pinctrl/pinconf.h>
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#include <linux/pinctrl/pinconf-generic.h>
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#include <linux/pinctrl/pinctrl.h>
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#include <linux/pinctrl/pinmux.h>
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#include <linux/sh_pfc.h>
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#include <linux/slab.h>
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#include <linux/spinlock.h>
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#include "core.h"
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struct sh_pfc_pinctrl {
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struct pinctrl_dev *pctl;
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struct sh_pfc *pfc;
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struct pinmux_gpio **functions;
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unsigned int nr_functions;
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struct pinctrl_pin_desc *pads;
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unsigned int nr_pads;
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spinlock_t lock;
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};
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static int sh_pfc_get_groups_count(struct pinctrl_dev *pctldev)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->nr_pads;
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}
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static const char *sh_pfc_get_group_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->pads[selector].name;
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}
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static int sh_pfc_get_group_pins(struct pinctrl_dev *pctldev, unsigned group,
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const unsigned **pins, unsigned *num_pins)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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*pins = &pmx->pads[group].number;
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*num_pins = 1;
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return 0;
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}
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static void sh_pfc_pin_dbg_show(struct pinctrl_dev *pctldev, struct seq_file *s,
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unsigned offset)
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{
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seq_printf(s, "%s", DRV_NAME);
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}
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static struct pinctrl_ops sh_pfc_pinctrl_ops = {
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.get_groups_count = sh_pfc_get_groups_count,
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.get_group_name = sh_pfc_get_group_name,
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.get_group_pins = sh_pfc_get_group_pins,
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.pin_dbg_show = sh_pfc_pin_dbg_show,
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};
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static int sh_pfc_get_functions_count(struct pinctrl_dev *pctldev)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->nr_functions;
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}
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static const char *sh_pfc_get_function_name(struct pinctrl_dev *pctldev,
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unsigned selector)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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return pmx->functions[selector]->name;
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}
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static int sh_pfc_get_function_groups(struct pinctrl_dev *pctldev, unsigned func,
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const char * const **groups,
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unsigned * const num_groups)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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*groups = &pmx->functions[func]->name;
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*num_groups = 1;
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return 0;
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}
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static int sh_pfc_noop_enable(struct pinctrl_dev *pctldev, unsigned func,
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unsigned group)
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{
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return 0;
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}
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static void sh_pfc_noop_disable(struct pinctrl_dev *pctldev, unsigned func,
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unsigned group)
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{
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}
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static int sh_pfc_config_function(struct sh_pfc *pfc, unsigned offset)
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{
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if (sh_pfc_config_gpio(pfc, offset,
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PINMUX_TYPE_FUNCTION,
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GPIO_CFG_DRYRUN) != 0)
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return -EINVAL;
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if (sh_pfc_config_gpio(pfc, offset,
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PINMUX_TYPE_FUNCTION,
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GPIO_CFG_REQ) != 0)
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return -EINVAL;
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return 0;
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}
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static int sh_pfc_reconfig_pin(struct sh_pfc *pfc, unsigned offset,
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int new_type)
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{
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unsigned long flags;
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int pinmux_type;
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int ret = -EINVAL;
|
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spin_lock_irqsave(&pfc->lock, flags);
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pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
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/*
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* See if the present config needs to first be de-configured.
|
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*/
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switch (pinmux_type) {
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case PINMUX_TYPE_GPIO:
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break;
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case PINMUX_TYPE_OUTPUT:
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case PINMUX_TYPE_INPUT:
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case PINMUX_TYPE_INPUT_PULLUP:
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case PINMUX_TYPE_INPUT_PULLDOWN:
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sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
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break;
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default:
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goto err;
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}
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/*
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* Dry run
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*/
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if (sh_pfc_config_gpio(pfc, offset, new_type,
|
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GPIO_CFG_DRYRUN) != 0)
|
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goto err;
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|
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/*
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* Request
|
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*/
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if (sh_pfc_config_gpio(pfc, offset, new_type,
|
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GPIO_CFG_REQ) != 0)
|
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goto err;
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|
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pfc->pdata->gpios[offset].flags &= ~PINMUX_FLAG_TYPE;
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pfc->pdata->gpios[offset].flags |= new_type;
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ret = 0;
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err:
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spin_unlock_irqrestore(&pfc->lock, flags);
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return ret;
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}
|
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|
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|
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static int sh_pfc_gpio_request_enable(struct pinctrl_dev *pctldev,
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struct pinctrl_gpio_range *range,
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unsigned offset)
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{
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struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
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struct sh_pfc *pfc = pmx->pfc;
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unsigned long flags;
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int ret, pinmux_type;
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spin_lock_irqsave(&pfc->lock, flags);
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|
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pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
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switch (pinmux_type) {
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case PINMUX_TYPE_FUNCTION:
|
||||
pr_notice_once("Use of GPIO API for function requests is "
|
||||
"deprecated, convert to pinctrl\n");
|
||||
/* handle for now */
|
||||
ret = sh_pfc_config_function(pfc, offset);
|
||||
if (unlikely(ret < 0))
|
||||
goto err;
|
||||
|
||||
break;
|
||||
case PINMUX_TYPE_GPIO:
|
||||
case PINMUX_TYPE_INPUT:
|
||||
case PINMUX_TYPE_OUTPUT:
|
||||
break;
|
||||
default:
|
||||
pr_err("Unsupported mux type (%d), bailing...\n", pinmux_type);
|
||||
ret = -ENOTSUPP;
|
||||
goto err;
|
||||
}
|
||||
|
||||
ret = 0;
|
||||
|
||||
err:
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
|
||||
return ret;
|
||||
}
|
||||
|
||||
static void sh_pfc_gpio_disable_free(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range,
|
||||
unsigned offset)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct sh_pfc *pfc = pmx->pfc;
|
||||
unsigned long flags;
|
||||
int pinmux_type;
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
pinmux_type = pfc->pdata->gpios[offset].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
sh_pfc_config_gpio(pfc, offset, pinmux_type, GPIO_CFG_FREE);
|
||||
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
}
|
||||
|
||||
static int sh_pfc_gpio_set_direction(struct pinctrl_dev *pctldev,
|
||||
struct pinctrl_gpio_range *range,
|
||||
unsigned offset, bool input)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
int type = input ? PINMUX_TYPE_INPUT : PINMUX_TYPE_OUTPUT;
|
||||
|
||||
return sh_pfc_reconfig_pin(pmx->pfc, offset, type);
|
||||
}
|
||||
|
||||
static struct pinmux_ops sh_pfc_pinmux_ops = {
|
||||
.get_functions_count = sh_pfc_get_functions_count,
|
||||
.get_function_name = sh_pfc_get_function_name,
|
||||
.get_function_groups = sh_pfc_get_function_groups,
|
||||
.enable = sh_pfc_noop_enable,
|
||||
.disable = sh_pfc_noop_disable,
|
||||
.gpio_request_enable = sh_pfc_gpio_request_enable,
|
||||
.gpio_disable_free = sh_pfc_gpio_disable_free,
|
||||
.gpio_set_direction = sh_pfc_gpio_set_direction,
|
||||
};
|
||||
|
||||
static int sh_pfc_pinconf_get(struct pinctrl_dev *pctldev, unsigned pin,
|
||||
unsigned long *config)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
struct sh_pfc *pfc = pmx->pfc;
|
||||
|
||||
*config = pfc->pdata->gpios[pin].flags & PINMUX_FLAG_TYPE;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_pinconf_set(struct pinctrl_dev *pctldev, unsigned pin,
|
||||
unsigned long config)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pinctrl_dev_get_drvdata(pctldev);
|
||||
|
||||
/* Validate the new type */
|
||||
if (config >= PINMUX_FLAG_TYPE)
|
||||
return -EINVAL;
|
||||
|
||||
return sh_pfc_reconfig_pin(pmx->pfc, pin, config);
|
||||
}
|
||||
|
||||
static void sh_pfc_pinconf_dbg_show(struct pinctrl_dev *pctldev,
|
||||
struct seq_file *s, unsigned pin)
|
||||
{
|
||||
const char *pinmux_type_str[] = {
|
||||
[PINMUX_TYPE_NONE] = "none",
|
||||
[PINMUX_TYPE_FUNCTION] = "function",
|
||||
[PINMUX_TYPE_GPIO] = "gpio",
|
||||
[PINMUX_TYPE_OUTPUT] = "output",
|
||||
[PINMUX_TYPE_INPUT] = "input",
|
||||
[PINMUX_TYPE_INPUT_PULLUP] = "input bias pull up",
|
||||
[PINMUX_TYPE_INPUT_PULLDOWN] = "input bias pull down",
|
||||
};
|
||||
unsigned long config;
|
||||
int rc;
|
||||
|
||||
rc = sh_pfc_pinconf_get(pctldev, pin, &config);
|
||||
if (unlikely(rc != 0))
|
||||
return;
|
||||
|
||||
seq_printf(s, " %s", pinmux_type_str[config]);
|
||||
}
|
||||
|
||||
static struct pinconf_ops sh_pfc_pinconf_ops = {
|
||||
.pin_config_get = sh_pfc_pinconf_get,
|
||||
.pin_config_set = sh_pfc_pinconf_set,
|
||||
.pin_config_dbg_show = sh_pfc_pinconf_dbg_show,
|
||||
};
|
||||
|
||||
static struct pinctrl_gpio_range sh_pfc_gpio_range = {
|
||||
.name = DRV_NAME,
|
||||
.id = 0,
|
||||
};
|
||||
|
||||
static struct pinctrl_desc sh_pfc_pinctrl_desc = {
|
||||
.name = DRV_NAME,
|
||||
.owner = THIS_MODULE,
|
||||
.pctlops = &sh_pfc_pinctrl_ops,
|
||||
.pmxops = &sh_pfc_pinmux_ops,
|
||||
.confops = &sh_pfc_pinconf_ops,
|
||||
};
|
||||
|
||||
static void sh_pfc_map_one_gpio(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx,
|
||||
struct pinmux_gpio *gpio, unsigned offset)
|
||||
{
|
||||
struct pinmux_data_reg *dummy;
|
||||
unsigned long flags;
|
||||
int bit;
|
||||
|
||||
gpio->flags &= ~PINMUX_FLAG_TYPE;
|
||||
|
||||
if (sh_pfc_get_data_reg(pfc, offset, &dummy, &bit) == 0)
|
||||
gpio->flags |= PINMUX_TYPE_GPIO;
|
||||
else {
|
||||
gpio->flags |= PINMUX_TYPE_FUNCTION;
|
||||
|
||||
spin_lock_irqsave(&pmx->lock, flags);
|
||||
pmx->nr_functions++;
|
||||
spin_unlock_irqrestore(&pmx->lock, flags);
|
||||
}
|
||||
}
|
||||
|
||||
/* pinmux ranges -> pinctrl pin descs */
|
||||
static int sh_pfc_map_gpios(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
|
||||
{
|
||||
unsigned long flags;
|
||||
int i;
|
||||
|
||||
pmx->nr_pads = pfc->pdata->last_gpio - pfc->pdata->first_gpio + 1;
|
||||
|
||||
pmx->pads = devm_kzalloc(pfc->dev, sizeof(*pmx->pads) * pmx->nr_pads,
|
||||
GFP_KERNEL);
|
||||
if (unlikely(!pmx->pads)) {
|
||||
pmx->nr_pads = 0;
|
||||
return -ENOMEM;
|
||||
}
|
||||
|
||||
spin_lock_irqsave(&pfc->lock, flags);
|
||||
|
||||
/*
|
||||
* We don't necessarily have a 1:1 mapping between pin and linux
|
||||
* GPIO number, as the latter maps to the associated enum_id.
|
||||
* Care needs to be taken to translate back to pin space when
|
||||
* dealing with any pin configurations.
|
||||
*/
|
||||
for (i = 0; i < pmx->nr_pads; i++) {
|
||||
struct pinctrl_pin_desc *pin = pmx->pads + i;
|
||||
struct pinmux_gpio *gpio = pfc->pdata->gpios + i;
|
||||
|
||||
pin->number = pfc->pdata->first_gpio + i;
|
||||
pin->name = gpio->name;
|
||||
|
||||
/* XXX */
|
||||
if (unlikely(!gpio->enum_id))
|
||||
continue;
|
||||
|
||||
sh_pfc_map_one_gpio(pfc, pmx, gpio, i);
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&pfc->lock, flags);
|
||||
|
||||
sh_pfc_pinctrl_desc.pins = pmx->pads;
|
||||
sh_pfc_pinctrl_desc.npins = pmx->nr_pads;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int sh_pfc_map_functions(struct sh_pfc *pfc, struct sh_pfc_pinctrl *pmx)
|
||||
{
|
||||
unsigned long flags;
|
||||
int i, fn;
|
||||
|
||||
pmx->functions = devm_kzalloc(pfc->dev, pmx->nr_functions *
|
||||
sizeof(*pmx->functions), GFP_KERNEL);
|
||||
if (unlikely(!pmx->functions))
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock_irqsave(&pmx->lock, flags);
|
||||
|
||||
for (i = fn = 0; i < pmx->nr_pads; i++) {
|
||||
struct pinmux_gpio *gpio = pfc->pdata->gpios + i;
|
||||
|
||||
if ((gpio->flags & PINMUX_FLAG_TYPE) == PINMUX_TYPE_FUNCTION)
|
||||
pmx->functions[fn++] = gpio;
|
||||
}
|
||||
|
||||
spin_unlock_irqrestore(&pmx->lock, flags);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int sh_pfc_register_pinctrl(struct sh_pfc *pfc)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx;
|
||||
int ret;
|
||||
|
||||
pmx = devm_kzalloc(pfc->dev, sizeof(*pmx), GFP_KERNEL);
|
||||
if (unlikely(!pmx))
|
||||
return -ENOMEM;
|
||||
|
||||
spin_lock_init(&pmx->lock);
|
||||
|
||||
pmx->pfc = pfc;
|
||||
pfc->pinctrl = pmx;
|
||||
|
||||
ret = sh_pfc_map_gpios(pfc, pmx);
|
||||
if (unlikely(ret != 0))
|
||||
return ret;
|
||||
|
||||
ret = sh_pfc_map_functions(pfc, pmx);
|
||||
if (unlikely(ret != 0))
|
||||
return ret;
|
||||
|
||||
pmx->pctl = pinctrl_register(&sh_pfc_pinctrl_desc, pfc->dev, pmx);
|
||||
if (IS_ERR(pmx->pctl))
|
||||
return PTR_ERR(pmx->pctl);
|
||||
|
||||
sh_pfc_gpio_range.npins = pfc->pdata->last_gpio
|
||||
- pfc->pdata->first_gpio + 1;
|
||||
sh_pfc_gpio_range.base = pfc->pdata->first_gpio;
|
||||
sh_pfc_gpio_range.pin_base = pfc->pdata->first_gpio;
|
||||
|
||||
pinctrl_add_gpio_range(pmx->pctl, &sh_pfc_gpio_range);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int sh_pfc_unregister_pinctrl(struct sh_pfc *pfc)
|
||||
{
|
||||
struct sh_pfc_pinctrl *pmx = pfc->pinctrl;
|
||||
|
||||
pinctrl_unregister(pmx->pctl);
|
||||
|
||||
pfc->pinctrl = NULL;
|
||||
return 0;
|
||||
}
|
||||
Reference in New Issue
Block a user