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[ARM] pxafb: add support for FBIOPAN_DISPLAY by dma braching
dma branching is enabled by extending the current setup_frame_dma() function to allow a 2nd set of frame/palette dma descriptors to be used. As a result, pxafb_dma_buff.dma_desc[], pxafb_dma_buff.pal_desc[] and pxafb_info.fdadr[] are doubled. This allows maximum re-use of the current dma setup code, although the pxafb_info.fdadr[xx] for FBRx register values looks a bit odd. Signed-off-by: Eric Miao <eric.miao@marvell.com> Signed-off-by: Eric Miao <ycmiao@ycmiao-hp520.(none)>
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+45
-16
@@ -71,6 +71,7 @@
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static int pxafb_activate_var(struct fb_var_screeninfo *var,
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struct pxafb_info *);
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static void set_ctrlr_state(struct pxafb_info *fbi, u_int state);
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static void setup_base_frame(struct pxafb_info *fbi, int branch);
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static unsigned long video_mem_size = 0;
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@@ -467,6 +468,24 @@ static int pxafb_set_par(struct fb_info *info)
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return 0;
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}
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static int pxafb_pan_display(struct fb_var_screeninfo *var,
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struct fb_info *info)
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{
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struct pxafb_info *fbi = (struct pxafb_info *)info;
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int dma = DMA_MAX + DMA_BASE;
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if (fbi->state != C_ENABLE)
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return 0;
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setup_base_frame(fbi, 1);
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if (fbi->lccr0 & LCCR0_SDS)
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lcd_writel(fbi, FBR1, fbi->fdadr[dma + 1] | 0x1);
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lcd_writel(fbi, FBR0, fbi->fdadr[dma] | 0x1);
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return 0;
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}
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/*
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* pxafb_blank():
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* Blank the display by setting all palette values to zero. Note, the
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@@ -506,6 +525,7 @@ static struct fb_ops pxafb_ops = {
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.owner = THIS_MODULE,
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.fb_check_var = pxafb_check_var,
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.fb_set_par = pxafb_set_par,
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.fb_pan_display = pxafb_pan_display,
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.fb_setcolreg = pxafb_setcolreg,
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.fb_fillrect = cfb_fillrect,
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.fb_copyarea = cfb_copyarea,
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@@ -597,7 +617,7 @@ static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal,
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struct pxafb_dma_descriptor *dma_desc, *pal_desc;
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unsigned int dma_desc_off, pal_desc_off;
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if (dma < 0 || dma >= DMA_MAX)
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if (dma < 0 || dma >= DMA_MAX * 2)
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return -EINVAL;
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dma_desc = &fbi->dma_buff->dma_desc[dma];
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@@ -607,7 +627,7 @@ static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal,
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dma_desc->fidr = 0;
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dma_desc->ldcmd = size;
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if (pal < 0 || pal >= PAL_MAX) {
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if (pal < 0 || pal >= PAL_MAX * 2) {
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dma_desc->fdadr = fbi->dma_buff_phys + dma_desc_off;
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fbi->fdadr[dma] = fbi->dma_buff_phys + dma_desc_off;
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} else {
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@@ -633,6 +653,27 @@ static int setup_frame_dma(struct pxafb_info *fbi, int dma, int pal,
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return 0;
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}
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static void setup_base_frame(struct pxafb_info *fbi, int branch)
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{
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struct fb_var_screeninfo *var = &fbi->fb.var;
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struct fb_fix_screeninfo *fix = &fbi->fb.fix;
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unsigned int nbytes, offset;
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int dma, pal, bpp = var->bits_per_pixel;
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dma = DMA_BASE + (branch ? DMA_MAX : 0);
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pal = (bpp >= 16) ? PAL_NONE : PAL_BASE + (branch ? PAL_MAX : 0);
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nbytes = fix->line_length * var->yres;
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offset = fix->line_length * var->yoffset;
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if (fbi->lccr0 & LCCR0_SDS) {
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nbytes = nbytes / 2;
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setup_frame_dma(fbi, dma + 1, PAL_NONE, offset + nbytes, nbytes);
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}
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setup_frame_dma(fbi, dma, pal, offset, nbytes);
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}
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#ifdef CONFIG_FB_PXA_SMARTPANEL
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static int setup_smart_dma(struct pxafb_info *fbi)
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{
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@@ -880,7 +921,6 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var,
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struct pxafb_info *fbi)
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{
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u_long flags;
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size_t nbytes, offset;
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#if DEBUG_VAR
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if (!(fbi->lccr0 & LCCR0_LCDT)) {
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@@ -935,25 +975,14 @@ static int pxafb_activate_var(struct fb_var_screeninfo *var,
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#endif
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setup_parallel_timing(fbi, var);
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setup_base_frame(fbi, 0);
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fbi->reg_lccr0 = fbi->lccr0 |
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(LCCR0_LDM | LCCR0_SFM | LCCR0_IUM | LCCR0_EFM |
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LCCR0_QDM | LCCR0_BM | LCCR0_OUM);
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fbi->reg_lccr3 |= pxafb_bpp_to_lccr3(var);
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nbytes = fbi->fb.fix.line_length * var->yres;
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offset = fbi->fb.fix.line_length * var->yoffset;
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if ((fbi->lccr0 & LCCR0_SDS) == LCCR0_Dual) {
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nbytes = nbytes / 2;
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setup_frame_dma(fbi, DMA_LOWER, PAL_NONE, offset + nbytes, nbytes);
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}
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if ((var->bits_per_pixel >= 16) || (fbi->lccr0 & LCCR0_LCDT))
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setup_frame_dma(fbi, DMA_BASE, PAL_NONE, offset, nbytes);
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else
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setup_frame_dma(fbi, DMA_BASE, PAL_BASE, offset, nbytes);
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fbi->reg_lccr4 = lcd_readl(fbi, LCCR4) & ~LCCR4_PAL_FOR_MASK;
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fbi->reg_lccr4 |= (fbi->lccr4 & LCCR4_PAL_FOR_MASK);
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local_irq_restore(flags);
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