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mmc: dw_mmc: avoid write to CDTHRCTL on older versions

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Commit f1d2736c81 (mmc: dw_mmc: control card read threshold) added
dw_mci_ctrl_rd_thld() with an unconditional write to the CDTHRCTL
register at offset 0x100. However before version 240a, the FIFO region
started at 0x100, so the write messes with the FIFO and completely
breaks the driver.

If the version id < 240A, return early from dw_mci_ctl_rd_thld() so as
not to hit this problem.

Fixes: f1d2736c81 (mmc: dw_mmc: control card read threshold)
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: <stable@vger.kernel.org> # v3.13+
Acked-by: Jaehoon Chung <jh80.chung@samsung.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
This commit is contained in:
James Hogan
2014-11-17 17:49:05 +00:00
committed by Ulf Hansson
parent 9e2a0c96ef
commit 66dfd10173
1 changed files with 7 additions and 0 deletions
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drivers/mmc/host/dw_mmc.c
+7
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@@ -726,6 +726,13 @@ static void dw_mci_ctrl_rd_thld(struct dw_mci *host, struct mmc_data *data)
WARN_ON(!(data->flags & MMC_DATA_READ)); WARN_ON(!(data->flags & MMC_DATA_READ));
/*
* CDTHRCTL doesn't exist prior to 240A (in fact that register offset is
* in the FIFO region, so we really shouldn't access it).
*/
if (host->verid < DW_MMC_240A)
return;
if (host->timing != MMC_TIMING_MMC_HS200 && if (host->timing != MMC_TIMING_MMC_HS200 &&
host->timing != MMC_TIMING_UHS_SDR104) host->timing != MMC_TIMING_UHS_SDR104)
goto disable; goto disable;