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Merge branch 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc
Pull powerpc updates from Ben Herrenschmidt:
"This is the powerpc changes for the 3.11 merge window. In addition to
the usual bug fixes and small updates, the main highlights are:
- Support for transparent huge pages by Aneesh Kumar for 64-bit
server processors. This allows the use of 16M pages as transparent
huge pages on kernels compiled with a 64K base page size.
- Base VFIO support for KVM on power by Alexey Kardashevskiy
- Wiring up of our nvram to the pstore infrastructure, including
putting compressed oopses in there by Aruna Balakrishnaiah
- Move, rework and improve our "EEH" (basically PCI error handling
and recovery) infrastructure. It is no longer specific to pseries
but is now usable by the new "powernv" platform as well (no
hypervisor) by Gavin Shan.
- I fixed some bugs in our math-emu instruction decoding and made it
usable to emulate some optional FP instructions on processors with
hard FP that lack them (such as fsqrt on Freescale embedded
processors).
- Support for Power8 "Event Based Branch" facility by Michael
Ellerman. This facility allows what is basically "userspace
interrupts" for performance monitor events.
- A bunch of Transactional Memory vs. Signals bug fixes and HW
breakpoint/watchpoint fixes by Michael Neuling.
And more ... I appologize in advance if I've failed to highlight
something that somebody deemed worth it."
* 'next' of git://git.kernel.org/pub/scm/linux/kernel/git/benh/powerpc: (156 commits)
pstore: Add hsize argument in write_buf call of pstore_ftrace_call
powerpc/fsl: add MPIC timer wakeup support
powerpc/mpic: create mpic subsystem object
powerpc/mpic: add global timer support
powerpc/mpic: add irq_set_wake support
powerpc/85xx: enable coreint for all the 64bit boards
powerpc/8xx: Erroneous double irq_eoi() on CPM IRQ in MPC8xx
powerpc/fsl: Enable CONFIG_E1000E in mpc85xx_smp_defconfig
powerpc/mpic: Add get_version API both for internal and external use
powerpc: Handle both new style and old style reserve maps
powerpc/hw_brk: Fix off by one error when validating DAWR region end
powerpc/pseries: Support compression of oops text via pstore
powerpc/pseries: Re-organise the oops compression code
pstore: Pass header size in the pstore write callback
powerpc/powernv: Fix iommu initialization again
powerpc/pseries: Inform the hypervisor we are using EBB regs
powerpc/perf: Add power8 EBB support
powerpc/perf: Core EBB support for 64-bit book3s
powerpc/perf: Drop MMCRA from thread_struct
powerpc/perf: Don't enable if we have zero events
...
This commit is contained in:
Linus Torvalds
@@ -0,0 +1,309 @@
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===============================================================================
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Freescale Interlaken Look-Aside Controller Device Bindings
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Copyright 2012 Freescale Semiconductor Inc.
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CONTENTS
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- Interlaken Look-Aside Controller (LAC) Node
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- Example LAC Node
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- Interlaken Look-Aside Controller (LAC) Software Portal Node
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- Interlaken Look-Aside Controller (LAC) Software Portal Child Nodes
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- Example LAC SWP Node with Child Nodes
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==============================================================================
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Interlaken Look-Aside Controller (LAC) Node
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DESCRIPTION
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The Interlaken is a narrow, high speed channelized chip-to-chip interface. To
|
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facilitate interoperability between a data path device and a look-aside
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co-processor, the Interlaken Look-Aside protocol is defined for short
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transaction-related transfers. Although based on the Interlaken protocol,
|
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Interlaken Look-Aside is not directly compatible with Interlaken and can be
|
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considered a different operation mode.
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The Interlaken LA controller connects internal platform to Interlaken serial
|
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interface. It accepts LA command through software portals, which are system
|
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memory mapped 4KB spaces. The LA commands are then translated into the
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Interlaken control words and data words, which are sent on TX side to TCAM
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through SerDes lanes.
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There are two 4KiB spaces defined within the LAC global register memory map.
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There is a full register set at 0x0000-0x0FFF (also known as the "hypervisor"
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version), and a subset at 0x1000-0x1FFF. The former is a superset of the
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latter, and includes certain registers that should not be accessible to
|
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partitioned software. Separate nodes are used for each region, with a phandle
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linking the hypervisor node to the normal operating node.
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PROPERTIES
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- compatible
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Usage: required
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Value type: <string>
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Definition: Must include "fsl,interlaken-lac". This represents only
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those LAC CCSR registers not protected in partitioned
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software. The version of the device is determined by the LAC
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IP Block Revision Register (IPBRR0) at offset 0x0BF8.
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Table of correspondences between IPBRR0 values and example
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chips:
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Value Device
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----------- -------
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0x02000100 T4240
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The Hypervisor node has a different compatible. It must include
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"fsl,interlaken-lac-hv". This node represents the protected
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LAC register space and is required except inside a partition
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where access to the hypervisor node is to be denied.
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- fsl,non-hv-node
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Usage: required in "fsl,interlaken-lac-hv"
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Value type: <phandle>
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Definition: Points to the non-protected LAC CCSR mapped register space
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node.
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- reg
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Usage: required
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Value type: <prop-encoded-array>
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Definition: A standard property. The first resource represents the
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Interlaken LAC configuration registers.
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- interrupts:
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Usage: required in non-hv node only
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Value type: <prop-encoded-array>
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Definition: Interrupt mapping for Interlaken LAC error IRQ.
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EXAMPLE
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lac: lac@229000 {
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compatible = "fsl,interlaken-lac"
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reg = <0x229000 0x1000>;
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interrupts = <16 2 1 18>;
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};
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lac-hv@228000 {
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compatible = "fsl,interlaken-lac-hv"
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reg = <0x228000 0x1000>;
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fsl,non-hv-node = <&lac>;
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};
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===============================================================================
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Interlaken Look-Aside Controller (LAC) Software Portal Container Node
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DESCRIPTION
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The Interlaken Look-Aside Controller (LAC) utilizes Software Portals to accept
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Interlaken Look-Aside (ILA) commands. The Interlaken LAC software portal
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memory map occupies 128KB of memory space. The software portal memory space is
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intended to be cache-enabled. WIMG for each software space is required to be
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0010 if stashing is enabled; otherwise, WIMG can be 0000 or 0010.
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||||
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||||
PROPERTIES
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||||
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- #address-cells
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Usage: required
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Value type: <u32>
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Definition: A standard property. Must have a value of 1.
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- #size-cells
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Usage: required
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Value type: <u32>
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Definition: A standard property. Must have a value of 1.
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- compatible
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Usage: required
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Value type: <string>
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Definition: Must include "fsl,interlaken-lac-portals"
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- ranges
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Usage: required
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Value type: <prop-encoded-array>
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Definition: A standard property. Specifies the address and length
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of the LAC portal memory space.
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||||
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||||
===============================================================================
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||||
Interlaken Look-Aside Controller (LAC) Software Portals Child Nodes
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||||
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||||
DESCRIPTION
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||||
There are up to 24 available software portals with each software portal
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requiring 4KB of consecutive memory within the software portal memory mapped
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space.
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PROPERTIES
|
||||
|
||||
- compatible
|
||||
Usage: required
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||||
Value type: <string>
|
||||
Definition: Must include "fsl,interlaken-lac-portal-vX.Y" where X is
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the Major version (IP_MJ) found in the LAC IP Block Revision
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Register (IPBRR0), at offset 0x0BF8, and Y is the Minor version
|
||||
(IP_MN).
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||||
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||||
Table of correspondences between version values and example chips:
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Value Device
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------ -------
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1.0 T4240
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- reg
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Usage: required
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Value type: <prop-encoded-array>
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Definition: A standard property. The first resource represents the
|
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Interlaken LAC software portal registers.
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||||
|
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- fsl,liodn
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Value type: <u32>
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Definition: The logical I/O device number (LIODN) for this device. The
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LIODN is a number expressed by this device and used to perform
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look-ups in the IOMMU (PAMU) address table when performing
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DMAs. This property is automatically added by u-boot.
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===============================================================================
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EXAMPLE
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lac-portals {
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#address-cells = <0x1>;
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#size-cells = <0x1>;
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compatible = "fsl,interlaken-lac-portals";
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ranges = <0x0 0xf 0xf4400000 0x20000>;
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lportal0: lac-portal@0 {
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compatible = "fsl,interlaken-lac-portal-v1.0";
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fsl,liodn = <0x204>;
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reg = <0x0 0x1000>;
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};
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lportal1: lac-portal@1000 {
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compatible = "fsl,interlaken-lac-portal-v1.0";
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fsl,liodn = <0x205>;
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reg = <0x1000 0x1000>;
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};
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lportal2: lac-portal@2000 {
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compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x206>;
|
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reg = <0x2000 0x1000>;
|
||||
};
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|
||||
lportal3: lac-portal@3000 {
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||||
compatible = "fsl,interlaken-lac-portal-v1.0";
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||||
fsl,liodn = <0x207>;
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||||
reg = <0x3000 0x1000>;
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||||
};
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||||
lportal4: lac-portal@4000 {
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compatible = "fsl,interlaken-lac-portal-v1.0";
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||||
fsl,liodn = <0x208>;
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||||
reg = <0x4000 0x1000>;
|
||||
};
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||||
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||||
lportal5: lac-portal@5000 {
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||||
compatible = "fsl,interlaken-lac-portal-v1.0";
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||||
fsl,liodn = <0x209>;
|
||||
reg = <0x5000 0x1000>;
|
||||
};
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||||
lportal6: lac-portal@6000 {
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compatible = "fsl,interlaken-lac-portal-v1.0";
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||||
fsl,liodn = <0x20A>;
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||||
reg = <0x6000 0x1000>;
|
||||
};
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||||
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||||
lportal7: lac-portal@7000 {
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||||
compatible = "fsl,interlaken-lac-portal-v1.0";
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||||
fsl,liodn = <0x20B>;
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reg = <0x7000 0x1000>;
|
||||
};
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||||
|
||||
lportal8: lac-portal@8000 {
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compatible = "fsl,interlaken-lac-portal-v1.0";
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fsl,liodn = <0x20C>;
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reg = <0x8000 0x1000>;
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||||
};
|
||||
|
||||
lportal9: lac-portal@9000 {
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||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
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fsl,liodn = <0x20D>;
|
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reg = <0x9000 0x1000>;
|
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};
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|
||||
lportal10: lac-portal@A000 {
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compatible = "fsl,interlaken-lac-portal-v1.0";
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fsl,liodn = <0x20E>;
|
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reg = <0xA000 0x1000>;
|
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};
|
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|
||||
lportal11: lac-portal@B000 {
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compatible = "fsl,interlaken-lac-portal-v1.0";
|
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fsl,liodn = <0x20F>;
|
||||
reg = <0xB000 0x1000>;
|
||||
};
|
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|
||||
lportal12: lac-portal@C000 {
|
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compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x210>;
|
||||
reg = <0xC000 0x1000>;
|
||||
};
|
||||
|
||||
lportal13: lac-portal@D000 {
|
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compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x211>;
|
||||
reg = <0xD000 0x1000>;
|
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};
|
||||
|
||||
lportal14: lac-portal@E000 {
|
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compatible = "fsl,interlaken-lac-portal-v1.0";
|
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fsl,liodn = <0x212>;
|
||||
reg = <0xE000 0x1000>;
|
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};
|
||||
|
||||
lportal15: lac-portal@F000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
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fsl,liodn = <0x213>;
|
||||
reg = <0xF000 0x1000>;
|
||||
};
|
||||
|
||||
lportal16: lac-portal@10000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
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fsl,liodn = <0x214>;
|
||||
reg = <0x10000 0x1000>;
|
||||
};
|
||||
|
||||
lportal17: lac-portal@11000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x215>;
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
|
||||
lportal8: lac-portal@1200 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x216>;
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
|
||||
lportal19: lac-portal@13000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x217>;
|
||||
reg = <0x13000 0x1000>;
|
||||
};
|
||||
|
||||
lportal20: lac-portal@14000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x218>;
|
||||
reg = <0x14000 0x1000>;
|
||||
};
|
||||
|
||||
lportal21: lac-portal@15000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x219>;
|
||||
reg = <0x15000 0x1000>;
|
||||
};
|
||||
|
||||
lportal22: lac-portal@16000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x21A>;
|
||||
reg = <0x16000 0x1000>;
|
||||
};
|
||||
|
||||
lportal23: lac-portal@17000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
fsl,liodn = <0x21B>;
|
||||
reg = <0x17000 0x1000>;
|
||||
};
|
||||
};
|
||||
@@ -14,6 +14,8 @@ hvcs.txt
|
||||
- IBM "Hypervisor Virtual Console Server" Installation Guide
|
||||
mpc52xx.txt
|
||||
- Linux 2.6.x on MPC52xx family
|
||||
pmu-ebb.txt
|
||||
- Description of the API for using the PMU with Event Based Branches.
|
||||
qe_firmware.txt
|
||||
- describes the layout of firmware binaries for the Freescale QUICC
|
||||
Engine and the code that parses and uploads the microcode therein.
|
||||
|
||||
@@ -0,0 +1,137 @@
|
||||
PMU Event Based Branches
|
||||
========================
|
||||
|
||||
Event Based Branches (EBBs) are a feature which allows the hardware to
|
||||
branch directly to a specified user space address when certain events occur.
|
||||
|
||||
The full specification is available in Power ISA v2.07:
|
||||
|
||||
https://www.power.org/documentation/power-isa-version-2-07/
|
||||
|
||||
One type of event for which EBBs can be configured is PMU exceptions. This
|
||||
document describes the API for configuring the Power PMU to generate EBBs,
|
||||
using the Linux perf_events API.
|
||||
|
||||
|
||||
Terminology
|
||||
-----------
|
||||
|
||||
Throughout this document we will refer to an "EBB event" or "EBB events". This
|
||||
just refers to a struct perf_event which has set the "EBB" flag in its
|
||||
attr.config. All events which can be configured on the hardware PMU are
|
||||
possible "EBB events".
|
||||
|
||||
|
||||
Background
|
||||
----------
|
||||
|
||||
When a PMU EBB occurs it is delivered to the currently running process. As such
|
||||
EBBs can only sensibly be used by programs for self-monitoring.
|
||||
|
||||
It is a feature of the perf_events API that events can be created on other
|
||||
processes, subject to standard permission checks. This is also true of EBB
|
||||
events, however unless the target process enables EBBs (via mtspr(BESCR)) no
|
||||
EBBs will ever be delivered.
|
||||
|
||||
This makes it possible for a process to enable EBBs for itself, but not
|
||||
actually configure any events. At a later time another process can come along
|
||||
and attach an EBB event to the process, which will then cause EBBs to be
|
||||
delivered to the first process. It's not clear if this is actually useful.
|
||||
|
||||
|
||||
When the PMU is configured for EBBs, all PMU interrupts are delivered to the
|
||||
user process. This means once an EBB event is scheduled on the PMU, no non-EBB
|
||||
events can be configured. This means that EBB events can not be run
|
||||
concurrently with regular 'perf' commands, or any other perf events.
|
||||
|
||||
It is however safe to run 'perf' commands on a process which is using EBBs. The
|
||||
kernel will in general schedule the EBB event, and perf will be notified that
|
||||
its events could not run.
|
||||
|
||||
The exclusion between EBB events and regular events is implemented using the
|
||||
existing "pinned" and "exclusive" attributes of perf_events. This means EBB
|
||||
events will be given priority over other events, unless they are also pinned.
|
||||
If an EBB event and a regular event are both pinned, then whichever is enabled
|
||||
first will be scheduled and the other will be put in error state. See the
|
||||
section below titled "Enabling an EBB event" for more information.
|
||||
|
||||
|
||||
Creating an EBB event
|
||||
---------------------
|
||||
|
||||
To request that an event is counted using EBB, the event code should have bit
|
||||
63 set.
|
||||
|
||||
EBB events must be created with a particular, and restrictive, set of
|
||||
attributes - this is so that they interoperate correctly with the rest of the
|
||||
perf_events subsystem.
|
||||
|
||||
An EBB event must be created with the "pinned" and "exclusive" attributes set.
|
||||
Note that if you are creating a group of EBB events, only the leader can have
|
||||
these attributes set.
|
||||
|
||||
An EBB event must NOT set any of the "inherit", "sample_period", "freq" or
|
||||
"enable_on_exec" attributes.
|
||||
|
||||
An EBB event must be attached to a task. This is specified to perf_event_open()
|
||||
by passing a pid value, typically 0 indicating the current task.
|
||||
|
||||
All events in a group must agree on whether they want EBB. That is all events
|
||||
must request EBB, or none may request EBB.
|
||||
|
||||
EBB events must specify the PMC they are to be counted on. This ensures
|
||||
userspace is able to reliably determine which PMC the event is scheduled on.
|
||||
|
||||
|
||||
Enabling an EBB event
|
||||
---------------------
|
||||
|
||||
Once an EBB event has been successfully opened, it must be enabled with the
|
||||
perf_events API. This can be achieved either via the ioctl() interface, or the
|
||||
prctl() interface.
|
||||
|
||||
However, due to the design of the perf_events API, enabling an event does not
|
||||
guarantee that it has been scheduled on the PMU. To ensure that the EBB event
|
||||
has been scheduled on the PMU, you must perform a read() on the event. If the
|
||||
read() returns EOF, then the event has not been scheduled and EBBs are not
|
||||
enabled.
|
||||
|
||||
This behaviour occurs because the EBB event is pinned and exclusive. When the
|
||||
EBB event is enabled it will force all other non-pinned events off the PMU. In
|
||||
this case the enable will be successful. However if there is already an event
|
||||
pinned on the PMU then the enable will not be successful.
|
||||
|
||||
|
||||
Reading an EBB event
|
||||
--------------------
|
||||
|
||||
It is possible to read() from an EBB event. However the results are
|
||||
meaningless. Because interrupts are being delivered to the user process the
|
||||
kernel is not able to count the event, and so will return a junk value.
|
||||
|
||||
|
||||
Closing an EBB event
|
||||
--------------------
|
||||
|
||||
When an EBB event is finished with, you can close it using close() as for any
|
||||
regular event. If this is the last EBB event the PMU will be deconfigured and
|
||||
no further PMU EBBs will be delivered.
|
||||
|
||||
|
||||
EBB Handler
|
||||
-----------
|
||||
|
||||
The EBB handler is just regular userspace code, however it must be written in
|
||||
the style of an interrupt handler. When the handler is entered all registers
|
||||
are live (possibly) and so must be saved somehow before the handler can invoke
|
||||
other code.
|
||||
|
||||
It's up to the program how to handle this. For C programs a relatively simple
|
||||
option is to create an interrupt frame on the stack and save registers there.
|
||||
|
||||
Fork
|
||||
----
|
||||
|
||||
EBB events are not inherited across fork. If the child process wishes to use
|
||||
EBBs it should open a new event for itself. Similarly the EBB state in
|
||||
BESCR/EBBHR/EBBRR is cleared across fork().
|
||||
@@ -283,6 +283,69 @@ a direct pass through for VFIO_DEVICE_* ioctls. The read/write/mmap
|
||||
interfaces implement the device region access defined by the device's
|
||||
own VFIO_DEVICE_GET_REGION_INFO ioctl.
|
||||
|
||||
|
||||
PPC64 sPAPR implementation note
|
||||
-------------------------------------------------------------------------------
|
||||
|
||||
This implementation has some specifics:
|
||||
|
||||
1) Only one IOMMU group per container is supported as an IOMMU group
|
||||
represents the minimal entity which isolation can be guaranteed for and
|
||||
groups are allocated statically, one per a Partitionable Endpoint (PE)
|
||||
(PE is often a PCI domain but not always).
|
||||
|
||||
2) The hardware supports so called DMA windows - the PCI address range
|
||||
within which DMA transfer is allowed, any attempt to access address space
|
||||
out of the window leads to the whole PE isolation.
|
||||
|
||||
3) PPC64 guests are paravirtualized but not fully emulated. There is an API
|
||||
to map/unmap pages for DMA, and it normally maps 1..32 pages per call and
|
||||
currently there is no way to reduce the number of calls. In order to make things
|
||||
faster, the map/unmap handling has been implemented in real mode which provides
|
||||
an excellent performance which has limitations such as inability to do
|
||||
locked pages accounting in real time.
|
||||
|
||||
So 3 additional ioctls have been added:
|
||||
|
||||
VFIO_IOMMU_SPAPR_TCE_GET_INFO - returns the size and the start
|
||||
of the DMA window on the PCI bus.
|
||||
|
||||
VFIO_IOMMU_ENABLE - enables the container. The locked pages accounting
|
||||
is done at this point. This lets user first to know what
|
||||
the DMA window is and adjust rlimit before doing any real job.
|
||||
|
||||
VFIO_IOMMU_DISABLE - disables the container.
|
||||
|
||||
|
||||
The code flow from the example above should be slightly changed:
|
||||
|
||||
.....
|
||||
/* Add the group to the container */
|
||||
ioctl(group, VFIO_GROUP_SET_CONTAINER, &container);
|
||||
|
||||
/* Enable the IOMMU model we want */
|
||||
ioctl(container, VFIO_SET_IOMMU, VFIO_SPAPR_TCE_IOMMU)
|
||||
|
||||
/* Get addition sPAPR IOMMU info */
|
||||
vfio_iommu_spapr_tce_info spapr_iommu_info;
|
||||
ioctl(container, VFIO_IOMMU_SPAPR_TCE_GET_INFO, &spapr_iommu_info);
|
||||
|
||||
if (ioctl(container, VFIO_IOMMU_ENABLE))
|
||||
/* Cannot enable container, may be low rlimit */
|
||||
|
||||
/* Allocate some space and setup a DMA mapping */
|
||||
dma_map.vaddr = mmap(0, 1024 * 1024, PROT_READ | PROT_WRITE,
|
||||
MAP_PRIVATE | MAP_ANONYMOUS, 0, 0);
|
||||
|
||||
dma_map.size = 1024 * 1024;
|
||||
dma_map.iova = 0; /* 1MB starting at 0x0 from device view */
|
||||
dma_map.flags = VFIO_DMA_MAP_FLAG_READ | VFIO_DMA_MAP_FLAG_WRITE;
|
||||
|
||||
/* Check here is .iova/.size are within DMA window from spapr_iommu_info */
|
||||
|
||||
ioctl(container, VFIO_IOMMU_MAP_DMA, &dma_map);
|
||||
.....
|
||||
|
||||
-------------------------------------------------------------------------------
|
||||
|
||||
[1] VFIO was originally an acronym for "Virtual Function I/O" in its
|
||||
|
||||
+7
-1
@@ -3123,6 +3123,13 @@ M: Maxim Levitsky <maximlevitsky@gmail.com>
|
||||
S: Maintained
|
||||
F: drivers/media/rc/ene_ir.*
|
||||
|
||||
ENHANCED ERROR HANDLING (EEH)
|
||||
M: Gavin Shan <shangw@linux.vnet.ibm.com>
|
||||
L: linuxppc-dev@lists.ozlabs.org
|
||||
S: Supported
|
||||
F: Documentation/powerpc/eeh-pci-error-recovery.txt
|
||||
F: arch/powerpc/kernel/eeh*.c
|
||||
|
||||
EPSON S1D13XXX FRAMEBUFFER DRIVER
|
||||
M: Kristoffer Ericson <kristoffer.ericson@gmail.com>
|
||||
S: Maintained
|
||||
@@ -6192,7 +6199,6 @@ M: Linas Vepstas <linasvepstas@gmail.com>
|
||||
L: linux-pci@vger.kernel.org
|
||||
S: Supported
|
||||
F: Documentation/PCI/pci-error-recovery.txt
|
||||
F: Documentation/powerpc/eeh-pci-error-recovery.txt
|
||||
|
||||
PCI SUBSYSTEM
|
||||
M: Bjorn Helgaas <bhelgaas@google.com>
|
||||
|
||||
+5
-12
@@ -298,7 +298,7 @@ config HUGETLB_PAGE_SIZE_VARIABLE
|
||||
|
||||
config MATH_EMULATION
|
||||
bool "Math emulation"
|
||||
depends on 4xx || 8xx || E200 || PPC_MPC832x || E500
|
||||
depends on 4xx || 8xx || PPC_MPC832x || BOOKE
|
||||
---help---
|
||||
Some PowerPC chips designed for embedded applications do not have
|
||||
a floating-point unit and therefore do not implement the
|
||||
@@ -307,6 +307,10 @@ config MATH_EMULATION
|
||||
unit, which will allow programs that use floating-point
|
||||
instructions to run.
|
||||
|
||||
This is also useful to emulate missing (optional) instructions
|
||||
such as fsqrt on cores that do have an FPU but do not implement
|
||||
them (such as Freescale BookE).
|
||||
|
||||
config PPC_TRANSACTIONAL_MEM
|
||||
bool "Transactional Memory support for POWERPC"
|
||||
depends on PPC_BOOK3S_64
|
||||
@@ -315,17 +319,6 @@ config PPC_TRANSACTIONAL_MEM
|
||||
---help---
|
||||
Support user-mode Transactional Memory on POWERPC.
|
||||
|
||||
config 8XX_MINIMAL_FPEMU
|
||||
bool "Minimal math emulation for 8xx"
|
||||
depends on 8xx && !MATH_EMULATION
|
||||
help
|
||||
Older arch/ppc kernels still emulated a few floating point
|
||||
instructions such as load and store, even when full math
|
||||
emulation is disabled. Say "Y" here if you want to preserve
|
||||
this behavior.
|
||||
|
||||
It is recommended that you build a soft-float userspace instead.
|
||||
|
||||
config IOMMU_HELPER
|
||||
def_bool PPC64
|
||||
|
||||
|
||||
@@ -147,6 +147,13 @@ choice
|
||||
enable debugging for the wrong type of machine your kernel
|
||||
_will not boot_.
|
||||
|
||||
config PPC_EARLY_DEBUG_BOOTX
|
||||
bool "BootX or OpenFirmware"
|
||||
depends on BOOTX_TEXT
|
||||
help
|
||||
Select this to enable early debugging for a machine using BootX
|
||||
or OpenFirmware.
|
||||
|
||||
config PPC_EARLY_DEBUG_LPAR
|
||||
bool "LPAR HV Console"
|
||||
depends on PPC_PSERIES
|
||||
|
||||
@@ -103,6 +103,11 @@
|
||||
interrupts = <34 2>;
|
||||
};
|
||||
|
||||
FPGA0: fpga@50000000 {
|
||||
compatible = "ibm,currituck-fpga";
|
||||
reg = <0x50000000 0x4>;
|
||||
};
|
||||
|
||||
IIC0: i2c@00000000 {
|
||||
compatible = "ibm,iic-currituck", "ibm,iic";
|
||||
reg = <0x0 0x00000014>;
|
||||
|
||||
@@ -0,0 +1,156 @@
|
||||
/* T4240 Interlaken LAC Portal device tree stub with 24 portals.
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
#address-cells = <0x1>;
|
||||
#size-cells = <0x1>;
|
||||
compatible = "fsl,interlaken-lac-portals";
|
||||
|
||||
lportal0: lac-portal@0 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x0 0x1000>;
|
||||
};
|
||||
|
||||
lportal1: lac-portal@1000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x1000 0x1000>;
|
||||
};
|
||||
|
||||
lportal2: lac-portal@2000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x2000 0x1000>;
|
||||
};
|
||||
|
||||
lportal3: lac-portal@3000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x3000 0x1000>;
|
||||
};
|
||||
|
||||
lportal4: lac-portal@4000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x4000 0x1000>;
|
||||
};
|
||||
|
||||
lportal5: lac-portal@5000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x5000 0x1000>;
|
||||
};
|
||||
|
||||
lportal6: lac-portal@6000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x6000 0x1000>;
|
||||
};
|
||||
|
||||
lportal7: lac-portal@7000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x7000 0x1000>;
|
||||
};
|
||||
|
||||
lportal8: lac-portal@8000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x8000 0x1000>;
|
||||
};
|
||||
|
||||
lportal9: lac-portal@9000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x9000 0x1000>;
|
||||
};
|
||||
|
||||
lportal10: lac-portal@A000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xA000 0x1000>;
|
||||
};
|
||||
|
||||
lportal11: lac-portal@B000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xB000 0x1000>;
|
||||
};
|
||||
|
||||
lportal12: lac-portal@C000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xC000 0x1000>;
|
||||
};
|
||||
|
||||
lportal13: lac-portal@D000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xD000 0x1000>;
|
||||
};
|
||||
|
||||
lportal14: lac-portal@E000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xE000 0x1000>;
|
||||
};
|
||||
|
||||
lportal15: lac-portal@F000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0xF000 0x1000>;
|
||||
};
|
||||
|
||||
lportal16: lac-portal@10000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x10000 0x1000>;
|
||||
};
|
||||
|
||||
lportal17: lac-portal@11000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x11000 0x1000>;
|
||||
};
|
||||
|
||||
lportal18: lac-portal@1200 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x12000 0x1000>;
|
||||
};
|
||||
|
||||
lportal19: lac-portal@13000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x13000 0x1000>;
|
||||
};
|
||||
|
||||
lportal20: lac-portal@14000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x14000 0x1000>;
|
||||
};
|
||||
|
||||
lportal21: lac-portal@15000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x15000 0x1000>;
|
||||
};
|
||||
|
||||
lportal22: lac-portal@16000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x16000 0x1000>;
|
||||
};
|
||||
|
||||
lportal23: lac-portal@17000 {
|
||||
compatible = "fsl,interlaken-lac-portal-v1.0";
|
||||
reg = <0x17000 0x1000>;
|
||||
};
|
||||
@@ -0,0 +1,45 @@
|
||||
/*
|
||||
* T4 Interlaken Look-aside Controller (LAC) device tree stub
|
||||
*
|
||||
* Copyright 2012 Freescale Semiconductor Inc.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are permitted provided that the following conditions are met:
|
||||
* * Redistributions of source code must retain the above copyright
|
||||
* notice, this list of conditions and the following disclaimer.
|
||||
* * Redistributions in binary form must reproduce the above copyright
|
||||
* notice, this list of conditions and the following disclaimer in the
|
||||
* documentation and/or other materials provided with the distribution.
|
||||
* * Neither the name of Freescale Semiconductor nor the
|
||||
* names of its contributors may be used to endorse or promote products
|
||||
* derived from this software without specific prior written permission.
|
||||
*
|
||||
*
|
||||
* ALTERNATIVELY, this software may be distributed under the terms of the
|
||||
* GNU General Public License ("GPL") as published by the Free Software
|
||||
* Foundation, either version 2 of that License or (at your option) any
|
||||
* later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor "AS IS" AND ANY
|
||||
* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
|
||||
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
|
||||
* DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
|
||||
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
|
||||
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
|
||||
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
|
||||
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
|
||||
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*/
|
||||
|
||||
lac: lac@229000 {
|
||||
compatible = "fsl,interlaken-lac";
|
||||
reg = <0x229000 0x1000>;
|
||||
interrupts = <16 2 1 18>;
|
||||
};
|
||||
|
||||
lac-hv@228000 {
|
||||
compatible = "fsl,interlaken-lac-hv";
|
||||
reg = <0x228000 0x1000>;
|
||||
fsl,non-hv-node = <&lac>;
|
||||
};
|
||||
@@ -423,6 +423,8 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_DEBUG_STACKOVERFLOW=y
|
||||
CONFIG_DEBUG_STACK_USAGE=y
|
||||
CONFIG_BOOTX_TEXT=y
|
||||
CONFIG_PPC_EARLY_DEBUG=y
|
||||
CONFIG_PPC_EARLY_DEBUG_BOOTX=y
|
||||
CONFIG_KEYS=y
|
||||
CONFIG_KEYS_DEBUG_PROC_KEYS=y
|
||||
CONFIG_SECURITY=y
|
||||
|
||||
@@ -284,6 +284,8 @@ CONFIG_DEBUG_MUTEXES=y
|
||||
CONFIG_LATENCYTOP=y
|
||||
CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_BOOTX_TEXT=y
|
||||
CONFIG_PPC_EARLY_DEBUG=y
|
||||
CONFIG_PPC_EARLY_DEBUG_BOOTX=y
|
||||
CONFIG_CRYPTO_NULL=m
|
||||
CONFIG_CRYPTO_TEST=m
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
|
||||
@@ -138,6 +138,8 @@ CONFIG_DEBUG_STACK_USAGE=y
|
||||
CONFIG_XMON=y
|
||||
CONFIG_XMON_DEFAULT=y
|
||||
CONFIG_BOOTX_TEXT=y
|
||||
CONFIG_PPC_EARLY_DEBUG=y
|
||||
CONFIG_PPC_EARLY_DEBUG_BOOTX=y
|
||||
CONFIG_CRYPTO_ECB=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
# CONFIG_CRYPTO_ANSI_CPRNG is not set
|
||||
|
||||
@@ -1,7 +1,6 @@
|
||||
CONFIG_EXPERIMENTAL=y
|
||||
# CONFIG_SWAP is not set
|
||||
CONFIG_SYSVIPC=y
|
||||
CONFIG_SPARSE_IRQ=y
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_LOG_BUF_SHIFT=16
|
||||
CONFIG_BLK_DEV_INITRD=y
|
||||
# CONFIG_COMPAT_BRK is not set
|
||||
@@ -9,6 +8,7 @@ CONFIG_SLAB=y
|
||||
CONFIG_MODULES=y
|
||||
CONFIG_MODULE_UNLOAD=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
# CONFIG_PPC_CHRP is not set
|
||||
CONFIG_PPC_MPC512x=y
|
||||
@@ -16,9 +16,7 @@ CONFIG_MPC5121_ADS=y
|
||||
CONFIG_MPC512x_GENERIC=y
|
||||
CONFIG_PDM360NG=y
|
||||
# CONFIG_PPC_PMAC is not set
|
||||
CONFIG_NO_HZ=y
|
||||
CONFIG_HZ_1000=y
|
||||
# CONFIG_MIGRATION is not set
|
||||
# CONFIG_SECCOMP is not set
|
||||
# CONFIG_PCI is not set
|
||||
CONFIG_NET=y
|
||||
@@ -33,8 +31,6 @@ CONFIG_IP_PNP=y
|
||||
# CONFIG_INET_DIAG is not set
|
||||
# CONFIG_IPV6 is not set
|
||||
CONFIG_CAN=y
|
||||
CONFIG_CAN_RAW=y
|
||||
CONFIG_CAN_BCM=y
|
||||
CONFIG_CAN_VCAN=y
|
||||
CONFIG_CAN_MSCAN=y
|
||||
CONFIG_CAN_DEBUG_DEVICES=y
|
||||
@@ -46,7 +42,6 @@ CONFIG_DEVTMPFS_MOUNT=y
|
||||
# CONFIG_FIRMWARE_IN_KERNEL is not set
|
||||
CONFIG_MTD=y
|
||||
CONFIG_MTD_CMDLINE_PARTS=y
|
||||
CONFIG_MTD_CHAR=y
|
||||
CONFIG_MTD_BLOCK=y
|
||||
CONFIG_MTD_CFI=y
|
||||
CONFIG_MTD_CFI_AMDSTD=y
|
||||
@@ -60,7 +55,6 @@ CONFIG_BLK_DEV_RAM=y
|
||||
CONFIG_BLK_DEV_RAM_COUNT=1
|
||||
CONFIG_BLK_DEV_RAM_SIZE=8192
|
||||
CONFIG_BLK_DEV_XIP=y
|
||||
CONFIG_MISC_DEVICES=y
|
||||
CONFIG_EEPROM_AT24=y
|
||||
CONFIG_EEPROM_AT25=y
|
||||
CONFIG_SCSI=y
|
||||
@@ -68,6 +62,7 @@ CONFIG_SCSI=y
|
||||
CONFIG_BLK_DEV_SD=y
|
||||
CONFIG_CHR_DEV_SG=y
|
||||
CONFIG_NETDEVICES=y
|
||||
CONFIG_FS_ENET=y
|
||||
CONFIG_MARVELL_PHY=y
|
||||
CONFIG_DAVICOM_PHY=y
|
||||
CONFIG_QSEMI_PHY=y
|
||||
@@ -83,10 +78,6 @@ CONFIG_STE10XP=y
|
||||
CONFIG_LSI_ET1011C_PHY=y
|
||||
CONFIG_FIXED_PHY=y
|
||||
CONFIG_MDIO_BITBANG=y
|
||||
CONFIG_NET_ETHERNET=y
|
||||
CONFIG_FS_ENET=y
|
||||
# CONFIG_NETDEV_1000 is not set
|
||||
# CONFIG_NETDEV_10000 is not set
|
||||
# CONFIG_WLAN is not set
|
||||
# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
|
||||
CONFIG_INPUT_EVDEV=y
|
||||
@@ -106,14 +97,18 @@ CONFIG_GPIO_SYSFS=y
|
||||
CONFIG_GPIO_MPC8XXX=y
|
||||
# CONFIG_HWMON is not set
|
||||
CONFIG_MEDIA_SUPPORT=y
|
||||
CONFIG_VIDEO_DEV=y
|
||||
CONFIG_VIDEO_ADV_DEBUG=y
|
||||
# CONFIG_VIDEO_HELPER_CHIPS_AUTO is not set
|
||||
CONFIG_VIDEO_SAA711X=y
|
||||
CONFIG_FB=y
|
||||
CONFIG_FB_FSL_DIU=y
|
||||
# CONFIG_VGA_CONSOLE is not set
|
||||
CONFIG_FRAMEBUFFER_CONSOLE=y
|
||||
CONFIG_USB=y
|
||||
CONFIG_USB_EHCI_HCD=y
|
||||
CONFIG_USB_EHCI_FSL=y
|
||||
# CONFIG_USB_EHCI_HCD_PPC_OF is not set
|
||||
CONFIG_USB_STORAGE=y
|
||||
CONFIG_USB_GADGET=y
|
||||
CONFIG_USB_FSL_USB2=y
|
||||
CONFIG_RTC_CLASS=y
|
||||
CONFIG_RTC_DRV_M41T80=y
|
||||
CONFIG_RTC_DRV_MPC5121=y
|
||||
@@ -129,9 +124,7 @@ CONFIG_TMPFS=y
|
||||
CONFIG_JFFS2_FS=y
|
||||
CONFIG_UBIFS_FS=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3=y
|
||||
CONFIG_ROOT_NFS=y
|
||||
CONFIG_PARTITION_ADVANCED=y
|
||||
CONFIG_NLS_CODEPAGE_437=y
|
||||
CONFIG_NLS_ISO8859_1=y
|
||||
# CONFIG_ENABLE_WARN_DEPRECATED is not set
|
||||
|
||||
@@ -131,6 +131,7 @@ CONFIG_DUMMY=y
|
||||
CONFIG_FS_ENET=y
|
||||
CONFIG_UCC_GETH=y
|
||||
CONFIG_GIANFAR=y
|
||||
CONFIG_E1000E=y
|
||||
CONFIG_MARVELL_PHY=y
|
||||
CONFIG_DAVICOM_PHY=y
|
||||
CONFIG_CICADA_PHY=y
|
||||
|
||||
@@ -350,6 +350,8 @@ CONFIG_SYSCTL_SYSCALL_CHECK=y
|
||||
CONFIG_XMON=y
|
||||
CONFIG_XMON_DEFAULT=y
|
||||
CONFIG_BOOTX_TEXT=y
|
||||
CONFIG_PPC_EARLY_DEBUG=y
|
||||
CONFIG_PPC_EARLY_DEBUG_BOOTX=y
|
||||
CONFIG_CRYPTO_NULL=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
CONFIG_CRYPTO_MD4=m
|
||||
|
||||
@@ -398,6 +398,8 @@ CONFIG_FTR_FIXUP_SELFTEST=y
|
||||
CONFIG_MSI_BITMAP_SELFTEST=y
|
||||
CONFIG_XMON=y
|
||||
CONFIG_BOOTX_TEXT=y
|
||||
CONFIG_PPC_EARLY_DEBUG=y
|
||||
CONFIG_PPC_EARLY_DEBUG_BOOTX=y
|
||||
CONFIG_CRYPTO_NULL=m
|
||||
CONFIG_CRYPTO_TEST=m
|
||||
CONFIG_CRYPTO_PCBC=m
|
||||
|
||||
@@ -1264,6 +1264,8 @@ CONFIG_DEBUG_STACKOVERFLOW=y
|
||||
CONFIG_DEBUG_STACK_USAGE=y
|
||||
CONFIG_XMON=y
|
||||
CONFIG_BOOTX_TEXT=y
|
||||
CONFIG_PPC_EARLY_DEBUG=y
|
||||
CONFIG_PPC_EARLY_DEBUG_BOOTX=y
|
||||
CONFIG_KEYS=y
|
||||
CONFIG_KEYS_DEBUG_PROC_KEYS=y
|
||||
CONFIG_SECURITY=y
|
||||
|
||||
@@ -296,6 +296,7 @@ CONFIG_SQUASHFS=m
|
||||
CONFIG_SQUASHFS_XATTR=y
|
||||
CONFIG_SQUASHFS_LZO=y
|
||||
CONFIG_SQUASHFS_XZ=y
|
||||
CONFIG_PSTORE=y
|
||||
CONFIG_NFS_FS=y
|
||||
CONFIG_NFS_V3_ACL=y
|
||||
CONFIG_NFS_V4=y
|
||||
|
||||
@@ -24,6 +24,7 @@
|
||||
#include <linux/init.h>
|
||||
#include <linux/list.h>
|
||||
#include <linux/string.h>
|
||||
#include <linux/time.h>
|
||||
|
||||
struct pci_dev;
|
||||
struct pci_bus;
|
||||
@@ -52,6 +53,7 @@ struct device_node;
|
||||
|
||||
#define EEH_PE_ISOLATED (1 << 0) /* Isolated PE */
|
||||
#define EEH_PE_RECOVERING (1 << 1) /* Recovering PE */
|
||||
#define EEH_PE_PHB_DEAD (1 << 2) /* Dead PHB */
|
||||
|
||||
struct eeh_pe {
|
||||
int type; /* PE type: PHB/Bus/Device */
|
||||
@@ -59,8 +61,10 @@ struct eeh_pe {
|
||||
int config_addr; /* Traditional PCI address */
|
||||
int addr; /* PE configuration address */
|
||||
struct pci_controller *phb; /* Associated PHB */
|
||||
struct pci_bus *bus; /* Top PCI bus for bus PE */
|
||||
int check_count; /* Times of ignored error */
|
||||
int freeze_count; /* Times of froze up */
|
||||
struct timeval tstamp; /* Time on first-time freeze */
|
||||
int false_positives; /* Times of reported #ff's */
|
||||
struct eeh_pe *parent; /* Parent PE */
|
||||
struct list_head child_list; /* Link PE to the child list */
|
||||
@@ -95,12 +99,12 @@ struct eeh_dev {
|
||||
|
||||
static inline struct device_node *eeh_dev_to_of_node(struct eeh_dev *edev)
|
||||
{
|
||||
return edev->dn;
|
||||
return edev ? edev->dn : NULL;
|
||||
}
|
||||
|
||||
static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev)
|
||||
{
|
||||
return edev->pdev;
|
||||
return edev ? edev->pdev : NULL;
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -130,8 +134,9 @@ static inline struct pci_dev *eeh_dev_to_pci_dev(struct eeh_dev *edev)
|
||||
struct eeh_ops {
|
||||
char *name;
|
||||
int (*init)(void);
|
||||
int (*post_init)(void);
|
||||
void* (*of_probe)(struct device_node *dn, void *flag);
|
||||
void* (*dev_probe)(struct pci_dev *dev, void *flag);
|
||||
int (*dev_probe)(struct pci_dev *dev, void *flag);
|
||||
int (*set_option)(struct eeh_pe *pe, int option);
|
||||
int (*get_pe_addr)(struct eeh_pe *pe);
|
||||
int (*get_state)(struct eeh_pe *pe, int *state);
|
||||
@@ -141,11 +146,12 @@ struct eeh_ops {
|
||||
int (*configure_bridge)(struct eeh_pe *pe);
|
||||
int (*read_config)(struct device_node *dn, int where, int size, u32 *val);
|
||||
int (*write_config)(struct device_node *dn, int where, int size, u32 val);
|
||||
int (*next_error)(struct eeh_pe **pe);
|
||||
};
|
||||
|
||||
extern struct eeh_ops *eeh_ops;
|
||||
extern int eeh_subsystem_enabled;
|
||||
extern struct mutex eeh_mutex;
|
||||
extern raw_spinlock_t confirm_error_lock;
|
||||
extern int eeh_probe_mode;
|
||||
|
||||
#define EEH_PROBE_MODE_DEV (1<<0) /* From PCI device */
|
||||
@@ -166,14 +172,14 @@ static inline int eeh_probe_mode_dev(void)
|
||||
return (eeh_probe_mode == EEH_PROBE_MODE_DEV);
|
||||
}
|
||||
|
||||
static inline void eeh_lock(void)
|
||||
static inline void eeh_serialize_lock(unsigned long *flags)
|
||||
{
|
||||
mutex_lock(&eeh_mutex);
|
||||
raw_spin_lock_irqsave(&confirm_error_lock, *flags);
|
||||
}
|
||||
|
||||
static inline void eeh_unlock(void)
|
||||
static inline void eeh_serialize_unlock(unsigned long flags)
|
||||
{
|
||||
mutex_unlock(&eeh_mutex);
|
||||
raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
|
||||
}
|
||||
|
||||
/*
|
||||
@@ -184,8 +190,11 @@ static inline void eeh_unlock(void)
|
||||
|
||||
typedef void *(*eeh_traverse_func)(void *data, void *flag);
|
||||
int eeh_phb_pe_create(struct pci_controller *phb);
|
||||
struct eeh_pe *eeh_phb_pe_get(struct pci_controller *phb);
|
||||
struct eeh_pe *eeh_pe_get(struct eeh_dev *edev);
|
||||
int eeh_add_to_parent_pe(struct eeh_dev *edev);
|
||||
int eeh_rmv_from_parent_pe(struct eeh_dev *edev, int purge_pe);
|
||||
void eeh_pe_update_time_stamp(struct eeh_pe *pe);
|
||||
void *eeh_pe_dev_traverse(struct eeh_pe *root,
|
||||
eeh_traverse_func fn, void *flag);
|
||||
void eeh_pe_restore_bars(struct eeh_pe *pe);
|
||||
@@ -193,12 +202,13 @@ struct pci_bus *eeh_pe_bus_get(struct eeh_pe *pe);
|
||||
|
||||
void *eeh_dev_init(struct device_node *dn, void *data);
|
||||
void eeh_dev_phb_init_dynamic(struct pci_controller *phb);
|
||||
int eeh_init(void);
|
||||
int __init eeh_ops_register(struct eeh_ops *ops);
|
||||
int __exit eeh_ops_unregister(const char *name);
|
||||
unsigned long eeh_check_failure(const volatile void __iomem *token,
|
||||
unsigned long val);
|
||||
int eeh_dev_check_failure(struct eeh_dev *edev);
|
||||
void __init eeh_addr_cache_build(void);
|
||||
void eeh_addr_cache_build(void);
|
||||
void eeh_add_device_tree_early(struct device_node *);
|
||||
void eeh_add_device_tree_late(struct pci_bus *);
|
||||
void eeh_add_sysfs_files(struct pci_bus *);
|
||||
@@ -221,6 +231,11 @@ void eeh_remove_bus_device(struct pci_dev *, int);
|
||||
|
||||
#else /* !CONFIG_EEH */
|
||||
|
||||
static inline int eeh_init(void)
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
static inline void *eeh_dev_init(struct device_node *dn, void *data)
|
||||
{
|
||||
return NULL;
|
||||
@@ -245,9 +260,6 @@ static inline void eeh_add_sysfs_files(struct pci_bus *bus) { }
|
||||
|
||||
static inline void eeh_remove_bus_device(struct pci_dev *dev, int purge_pe) { }
|
||||
|
||||
static inline void eeh_lock(void) { }
|
||||
static inline void eeh_unlock(void) { }
|
||||
|
||||
#define EEH_POSSIBLE_ERROR(val, type) (0)
|
||||
#define EEH_IO_ERROR_VALUE(size) (-1UL)
|
||||
#endif /* CONFIG_EEH */
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user