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Merge branches 'sh/stable-updates' and 'sh/sparseirq'
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+214
-175
File diff suppressed because it is too large
Load Diff
+36
-6
@@ -91,6 +91,9 @@
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# define SCSPTR5 0xa4050128
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# define SCIF_ORER 0x0001 /* overrun error bit */
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# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
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#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
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# define SCIF_ORER 0x0001 /* overrun error bit */
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# define SCSCR_INIT(port) 0x0038 /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
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#elif defined(CONFIG_CPU_SUBTYPE_SH4_202)
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# define SCSPTR2 0xffe80020 /* 16 bit SCIF */
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# define SCIF_ORER 0x0001 /* overrun error bit */
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@@ -314,7 +317,18 @@
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} \
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}
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#define CPU_SCIF_FNS(name, scif_offset, scif_size) \
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#ifdef CONFIG_H8300
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/* h8300 don't have SCIF */
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#define CPU_SCIF_FNS(name) \
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static inline unsigned int sci_##name##_in(struct uart_port *port) \
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{ \
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return 0; \
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} \
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static inline void sci_##name##_out(struct uart_port *port, unsigned int value) \
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{ \
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}
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#else
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#define CPU_SCIF_FNS(name, scif_offset, scif_size) \
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static inline unsigned int sci_##name##_in(struct uart_port *port) \
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{ \
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SCI_IN(scif_size, scif_offset); \
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@@ -323,6 +337,7 @@
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{ \
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SCI_OUT(scif_size, scif_offset, value); \
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}
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#endif
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#define CPU_SCI_FNS(name, sci_offset, sci_size) \
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static inline unsigned int sci_##name##_in(struct uart_port* port) \
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@@ -360,8 +375,10 @@
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sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
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h8_sci_offset, h8_sci_size) \
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CPU_SCI_FNS(name, h8_sci_offset, h8_sci_size)
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#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
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#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
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CPU_SCIF_FNS(name)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
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defined(CONFIG_CPU_SUBTYPE_SH7724)
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#define SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scif_offset, sh4_scif_size) \
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CPU_SCIx_FNS(name, sh4_scifa_offset, sh4_scifa_size, sh4_scif_offset, sh4_scif_size)
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#define SCIF_FNS(name, sh4_scif_offset, sh4_scif_size) \
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@@ -390,7 +407,8 @@ SCIF_FNS(SCFDR, 0x1c, 16)
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SCIF_FNS(SCxTDR, 0x20, 8)
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SCIF_FNS(SCxRDR, 0x24, 8)
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SCIF_FNS(SCLSR, 0x24, 16)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
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defined(CONFIG_CPU_SUBTYPE_SH7724)
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SCIx_FNS(SCSMR, 0x00, 16, 0x00, 16)
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SCIx_FNS(SCBRR, 0x04, 8, 0x04, 8)
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SCIx_FNS(SCSCR, 0x08, 16, 0x08, 16)
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@@ -604,10 +622,21 @@ static inline int sci_rxd_in(struct uart_port *port)
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return ctrl_inb(SCSPTR5) & 0x0008 ? 1 : 0; /* SCIF5 */
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return 1;
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
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# define SCFSR 0x0010
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# define SCASSR 0x0014
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static inline int sci_rxd_in(struct uart_port *port)
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{
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if (port->type == PORT_SCIF)
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return ctrl_inw((port->mapbase + SCFSR)) & SCIF_BRK ? 1 : 0;
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if (port->type == PORT_SCIFA)
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return ctrl_inw((port->mapbase + SCASSR)) & SCIF_BRK ? 1 : 0;
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return 1;
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH5_101) || defined(CONFIG_CPU_SUBTYPE_SH5_103)
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static inline int sci_rxd_in(struct uart_port *port)
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{
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return sci_in(port, SCSPTR2)&0x0001 ? 1 : 0; /* SCIF */
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return sci_in(port, SCSPTR)&0x0001 ? 1 : 0; /* SCIF */
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}
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#elif defined(__H8300H__) || defined(__H8300S__)
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static inline int sci_rxd_in(struct uart_port *port)
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@@ -757,7 +786,8 @@ static inline int sci_rxd_in(struct uart_port *port)
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defined(CONFIG_CPU_SUBTYPE_SH7720) || \
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defined(CONFIG_CPU_SUBTYPE_SH7721)
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#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7723) ||\
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defined(CONFIG_CPU_SUBTYPE_SH7724)
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static inline int scbrr_calc(struct uart_port *port, int bps, int clk)
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{
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if (port->type == PORT_SCIF)
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