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Merge tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm soc-specific updates from Arnd Bergmann:
"This is stuff that does not fit well into another category and in
particular is not related to a particular board. The largest part in
here is extending the am33xx support in the omap platform."
Fix up trivial conflicts in arch/arm/mach-{imx/mach-mx35_3ds.c, tegra/Makefile}
* tag 'soc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (74 commits)
ARM: LPC32xx: Add PWM support
ARM: LPC32xx: Add PWM clock
ARM: LPC32xx: Set system serial based on cpu unique id
ARM: vexpress: Config option for early printk console
ARM: vexpress: Add Device Tree for V2P-CA15_CA7 core tile
ARM: vexpress: Convert V2P-CA15 Device Tree to 64 bit addresses
ARM: vexpress: Add fixed regulator for SMSC
ARM: vexpress: Add missing SP804 interrupt in motherboard's DTS files
ARM: vexpress: Initial common clock support
ARM: SAMSUNG: Introduce Kconfig variable for Samsung custom clk API
ARM: EXYNOS: Add missing static storage class specifier in pmu.c file
ARM: EXYNOS: Make combiner_init function static
ARM: EXYNOS: Update HSOTG PHY clock setting for EXYNOS4X12
ARM: versatile: Make plat-versatile clock optional
ARM: vexpress: Check master site in daughterboard's sysctl operations
ARM: vexpress: remove automatic errata workaround selection
ARM: LPC32xx: Adjust to pl08x DMA interface changes
ARM: EXYNOS: Clear SYS_WDTRESET bit to use watchdog reset
ARM: imx: fix mx51 ehci setup errors
ARM: imx: make ehci power/oc polarities configurable
...
This commit is contained in:
Linus Torvalds
@@ -4,6 +4,7 @@ config AINTC
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bool
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config CP_INTC
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select IRQ_DOMAIN
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bool
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config ARCH_DAVINCI_DMx
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@@ -39,3 +39,4 @@ obj-$(CONFIG_MACH_OMAPL138_HAWKBOARD) += board-omapl138-hawk.o
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obj-$(CONFIG_CPU_FREQ) += cpufreq.o
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obj-$(CONFIG_CPU_IDLE) += cpuidle.o
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obj-$(CONFIG_SUSPEND) += pm.o sleep.o
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obj-$(CONFIG_HAVE_CLK) += pm_domain.o
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@@ -9,8 +9,10 @@
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* kind, whether express or implied.
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*/
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#include <linux/export.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/irqdomain.h>
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#include <linux/io.h>
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#include <mach/common.h>
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@@ -28,7 +30,7 @@ static inline void cp_intc_write(unsigned long value, unsigned offset)
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static void cp_intc_ack_irq(struct irq_data *d)
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{
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cp_intc_write(d->irq, CP_INTC_SYS_STAT_IDX_CLR);
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cp_intc_write(d->hwirq, CP_INTC_SYS_STAT_IDX_CLR);
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}
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/* Disable interrupt */
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@@ -36,20 +38,20 @@ static void cp_intc_mask_irq(struct irq_data *d)
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{
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/* XXX don't know why we need to disable nIRQ here... */
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cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_CLR);
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cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_CLR);
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cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_CLR);
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cp_intc_write(1, CP_INTC_HOST_ENABLE_IDX_SET);
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}
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/* Enable interrupt */
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static void cp_intc_unmask_irq(struct irq_data *d)
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{
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cp_intc_write(d->irq, CP_INTC_SYS_ENABLE_IDX_SET);
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cp_intc_write(d->hwirq, CP_INTC_SYS_ENABLE_IDX_SET);
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}
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static int cp_intc_set_irq_type(struct irq_data *d, unsigned int flow_type)
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{
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unsigned reg = BIT_WORD(d->irq);
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unsigned mask = BIT_MASK(d->irq);
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unsigned reg = BIT_WORD(d->hwirq);
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unsigned mask = BIT_MASK(d->hwirq);
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unsigned polarity = cp_intc_read(CP_INTC_SYS_POLARITY(reg));
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unsigned type = cp_intc_read(CP_INTC_SYS_TYPE(reg));
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@@ -99,18 +101,36 @@ static struct irq_chip cp_intc_irq_chip = {
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.irq_set_wake = cp_intc_set_wake,
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};
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void __init cp_intc_init(void)
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static struct irq_domain *cp_intc_domain;
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static int cp_intc_host_map(struct irq_domain *h, unsigned int virq,
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irq_hw_number_t hw)
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{
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unsigned long num_irq = davinci_soc_info.intc_irq_num;
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pr_debug("cp_intc_host_map(%d, 0x%lx)\n", virq, hw);
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irq_set_chip(virq, &cp_intc_irq_chip);
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set_irq_flags(virq, IRQF_VALID | IRQF_PROBE);
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irq_set_handler(virq, handle_edge_irq);
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return 0;
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}
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static const struct irq_domain_ops cp_intc_host_ops = {
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.map = cp_intc_host_map,
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.xlate = irq_domain_xlate_onetwocell,
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};
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int __init __cp_intc_init(struct device_node *node)
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{
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u32 num_irq = davinci_soc_info.intc_irq_num;
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u8 *irq_prio = davinci_soc_info.intc_irq_prios;
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u32 *host_map = davinci_soc_info.intc_host_map;
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unsigned num_reg = BITS_TO_LONGS(num_irq);
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int i;
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int i, irq_base;
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davinci_intc_type = DAVINCI_INTC_TYPE_CP_INTC;
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davinci_intc_base = ioremap(davinci_soc_info.intc_base, SZ_8K);
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if (WARN_ON(!davinci_intc_base))
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return;
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return -EINVAL;
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cp_intc_write(0, CP_INTC_GLOBAL_ENABLE);
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@@ -165,13 +185,28 @@ void __init cp_intc_init(void)
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for (i = 0; host_map[i] != -1; i++)
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cp_intc_write(host_map[i], CP_INTC_HOST_MAP(i));
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/* Set up genirq dispatching for cp_intc */
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for (i = 0; i < num_irq; i++) {
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irq_set_chip(i, &cp_intc_irq_chip);
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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irq_set_handler(i, handle_edge_irq);
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irq_base = irq_alloc_descs(-1, 0, num_irq, 0);
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if (irq_base < 0) {
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pr_warn("Couldn't allocate IRQ numbers\n");
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irq_base = 0;
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}
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/* create a legacy host */
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cp_intc_domain = irq_domain_add_legacy(node, num_irq,
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irq_base, 0, &cp_intc_host_ops, NULL);
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if (!cp_intc_domain) {
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pr_err("cp_intc: failed to allocate irq host!\n");
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return -EINVAL;
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}
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/* Enable global interrupt */
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cp_intc_write(1, CP_INTC_GLOBAL_ENABLE);
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return 0;
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}
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void __init cp_intc_init(void)
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{
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__cp_intc_init(NULL);
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}
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@@ -0,0 +1,64 @@
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/*
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* Runtime PM support code for DaVinci
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*
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* Author: Kevin Hilman
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*
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* Copyright (C) 2012 Texas Instruments, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#include <linux/init.h>
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#include <linux/pm_runtime.h>
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#include <linux/pm_clock.h>
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#include <linux/platform_device.h>
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#ifdef CONFIG_PM_RUNTIME
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static int davinci_pm_runtime_suspend(struct device *dev)
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{
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int ret;
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dev_dbg(dev, "%s\n", __func__);
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ret = pm_generic_runtime_suspend(dev);
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if (ret)
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return ret;
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ret = pm_clk_suspend(dev);
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if (ret) {
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pm_generic_runtime_resume(dev);
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return ret;
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}
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return 0;
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}
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static int davinci_pm_runtime_resume(struct device *dev)
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{
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dev_dbg(dev, "%s\n", __func__);
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pm_clk_resume(dev);
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return pm_generic_runtime_resume(dev);
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}
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#endif
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static struct dev_pm_domain davinci_pm_domain = {
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.ops = {
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SET_RUNTIME_PM_OPS(davinci_pm_runtime_suspend,
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davinci_pm_runtime_resume, NULL)
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USE_PLATFORM_PM_SLEEP_OPS
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},
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};
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static struct pm_clk_notifier_block platform_bus_notifier = {
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.pm_domain = &davinci_pm_domain,
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};
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static int __init davinci_pm_runtime_init(void)
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{
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pm_clk_add_notifier(&platform_bus_type, &platform_bus_notifier);
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return 0;
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}
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core_initcall(davinci_pm_runtime_init);
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