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Merge branch 'ixp4xx' into devel
Conflicts: include/asm-arm/arch-ixp4xx/io.h
This commit is contained in:
Russell King
Russell King
@@ -0,0 +1,31 @@
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/*
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* include/asm-arm/arch-ixp4xx/cpu.h
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*
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* IXP4XX cpu type detection
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*
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* Copyright (C) 2007 MontaVista Software, Inc.
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*
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*/
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#ifndef __ASM_ARCH_CPU_H__
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#define __ASM_ARCH_CPU_H__
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extern unsigned int processor_id;
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/* Processor id value in CP15 Register 0 */
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#define IXP425_PROCESSOR_ID_VALUE 0x690541c0
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#define IXP435_PROCESSOR_ID_VALUE 0x69054040
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#define IXP465_PROCESSOR_ID_VALUE 0x69054200
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#define IXP4XX_PROCESSOR_ID_MASK 0xfffffff0
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#define cpu_is_ixp42x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
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IXP425_PROCESSOR_ID_VALUE)
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#define cpu_is_ixp43x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
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IXP435_PROCESSOR_ID_VALUE)
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#define cpu_is_ixp46x() ((processor_id & IXP4XX_PROCESSOR_ID_MASK) == \
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IXP465_PROCESSOR_ID_VALUE)
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#endif /* _ASM_ARCH_CPU_H */
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@@ -0,0 +1,57 @@
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/*
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* DSM-G600 platform specific definitions
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*
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* Copyright (C) 2006 Tower Technologies
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* Author: Alessandro Zummo <a.zummo@towertech.it>
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*
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* based on ixdp425.h:
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* Copyright 2004 (C) MontaVista, Software, Inc.
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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#ifndef __ASM_ARCH_HARDWARE_H__
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#error "Do not include this directly, instead #include <asm/hardware.h>"
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#endif
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#define DSMG600_SDA_PIN 5
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#define DSMG600_SCL_PIN 4
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/*
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* DSMG600 PCI IRQs
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*/
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#define DSMG600_PCI_MAX_DEV 4
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#define DSMG600_PCI_IRQ_LINES 3
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/* PCI controller GPIO to IRQ pin mappings */
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#define DSMG600_PCI_INTA_PIN 11
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#define DSMG600_PCI_INTB_PIN 10
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#define DSMG600_PCI_INTC_PIN 9
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#define DSMG600_PCI_INTD_PIN 8
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#define DSMG600_PCI_INTE_PIN 7
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#define DSMG600_PCI_INTF_PIN 6
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/* DSM-G600 Timer Setting */
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#define DSMG600_FREQ 66000000
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/* Buttons */
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#define DSMG600_PB_GPIO 15 /* power button */
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#define DSMG600_PB_BM (1L << DSMG600_PB_GPIO)
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#define DSMG600_RB_GPIO 3 /* reset button */
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#define DSMG600_RB_IRQ IRQ_IXP4XX_GPIO3
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#define DSMG600_PO_GPIO 2 /* power off */
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/* LEDs */
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#define DSMG600_LED_PWR_GPIO 0
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#define DSMG600_LED_PWR_BM (1L << DSMG600_LED_PWR_GPIO)
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#define DSMG600_LED_WLAN_GPIO 14
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#define DSMG600_LED_WLAN_BM (1L << DSMG600_LED_WLAN_GPIO)
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@@ -31,9 +31,9 @@
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1001:
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/*
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* IXP465 has an upper IRQ status register
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* IXP465/IXP435 has an upper IRQ status register
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*/
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#if defined(CONFIG_CPU_IXP46X)
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#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X)
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ldr \irqstat, =(IXP4XX_INTC_BASE_VIRT+IXP4XX_ICIP2_OFFSET)
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ldr \irqstat, [\irqstat] @ get upper interrupts
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mov \irqnr, #63
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@@ -0,0 +1,73 @@
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/*
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* linux/include/asm-arm/arch-ixp4xx/gpio.h
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*
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* IXP4XX GPIO wrappers for arch-neutral GPIO calls
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*
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* Written by Milan Svoboda <msvoboda@ra.rockwell.com>
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* Based on PXA implementation by Philipp Zabel <philipp.zabel@gmail.com>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*
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*/
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#ifndef __ASM_ARCH_IXP4XX_GPIO_H
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#define __ASM_ARCH_IXP4XX_GPIO_H
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#include <asm/hardware.h>
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static inline int gpio_request(unsigned gpio, const char *label)
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{
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return 0;
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}
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static inline void gpio_free(unsigned gpio)
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{
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return;
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}
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static inline int gpio_direction_input(unsigned gpio)
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{
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gpio_line_config(gpio, IXP4XX_GPIO_IN);
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return 0;
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}
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static inline int gpio_direction_output(unsigned gpio, int level)
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{
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gpio_line_set(gpio, level);
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gpio_line_config(gpio, IXP4XX_GPIO_OUT);
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return 0;
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}
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static inline int gpio_get_value(unsigned gpio)
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{
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int value;
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gpio_line_get(gpio, &value);
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return value;
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}
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static inline void gpio_set_value(unsigned gpio, int value)
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{
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gpio_line_set(gpio, value);
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}
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#include <asm-generic/gpio.h> /* cansleep wrappers */
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extern int gpio_to_irq(int gpio);
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extern int irq_to_gpio(int gpio);
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#endif
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@@ -17,8 +17,8 @@
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#ifndef __ASM_ARCH_HARDWARE_H__
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#define __ASM_ARCH_HARDWARE_H__
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#define PCIBIOS_MIN_IO 0x00001000
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#define PCIBIOS_MIN_MEM 0x48000000
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#define PCIBIOS_MIN_IO 0x00001000
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#define PCIBIOS_MIN_MEM (cpu_is_ixp43x() ? 0x40000000 : 0x48000000)
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/*
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* We override the standard dma-mask routines for bouncing.
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@@ -27,11 +27,8 @@
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#define pcibios_assign_all_busses() 1
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#if defined(CONFIG_CPU_IXP46X) && !defined(__ASSEMBLY__)
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extern unsigned int processor_id;
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#define cpu_is_ixp465() ((processor_id & 0xffffffc0) == 0x69054200)
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#else
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#define cpu_is_ixp465() (0)
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#ifndef __ASSEMBLER__
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#include <asm/arch/cpu.h>
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#endif
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/* Register locations and bits */
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@@ -47,5 +44,6 @@ extern unsigned int processor_id;
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#include "prpmc1100.h"
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#include "nslu2.h"
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#include "nas100d.h"
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#include "dsmg600.h"
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#endif /* _ASM_ARCH_HARDWARE_H */
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@@ -61,7 +61,7 @@ extern int ixp4xx_pci_write(u32 addr, u32 cmd, u32 data);
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static inline void __iomem *
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__ixp4xx_ioremap(unsigned long addr, size_t size, unsigned int mtype)
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{
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if((addr < 0x48000000) || (addr > 0x4fffffff))
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if((addr < PCIBIOS_MIN_MEM) || (addr > 0x4fffffff))
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return __arm_ioremap(addr, size, mtype);
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return (void *)addr;
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@@ -62,10 +62,10 @@
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/*
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* Only first 32 sources are valid if running on IXP42x systems
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*/
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#ifndef CONFIG_CPU_IXP46X
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#define NR_IRQS 32
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#else
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#if defined(CONFIG_CPU_IXP46X) || defined(CONFIG_CPU_IXP43X)
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#define NR_IRQS 64
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#else
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#define NR_IRQS 32
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#endif
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#define XSCALE_PMU_IRQ (IRQ_IXP4XX_XSCALE_PMU)
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@@ -118,4 +118,14 @@
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#define IRQ_NAS100D_PCI_INTD IRQ_IXP4XX_GPIO8
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#define IRQ_NAS100D_PCI_INTE IRQ_IXP4XX_GPIO7
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/*
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* D-Link DSM-G600 RevA board IRQs
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*/
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#define IRQ_DSMG600_PCI_INTA IRQ_IXP4XX_GPIO11
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#define IRQ_DSMG600_PCI_INTB IRQ_IXP4XX_GPIO10
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#define IRQ_DSMG600_PCI_INTC IRQ_IXP4XX_GPIO9
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#define IRQ_DSMG600_PCI_INTD IRQ_IXP4XX_GPIO8
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#define IRQ_DSMG600_PCI_INTE IRQ_IXP4XX_GPIO7
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#define IRQ_DSMG600_PCI_INTF IRQ_IXP4XX_GPIO6
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#endif
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@@ -607,19 +607,4 @@
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#define DCMD_LENGTH 0x01fff /* length mask (max = 8K - 1) */
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#ifndef __ASSEMBLY__
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static inline int cpu_is_ixp46x(void)
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{
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#ifdef CONFIG_CPU_IXP46X
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unsigned int processor_id;
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asm("mrc p15, 0, %0, cr0, cr0, 0;" : "=r"(processor_id) :);
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if ((processor_id & 0xffffff00) == 0x69054200)
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return 1;
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#endif
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return 0;
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}
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#endif
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#endif
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