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Merge master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6
* master.kernel.org:/pub/scm/linux/kernel/git/lethal/sh-2.6: (38 commits) sh: R7785RP board updates. sh: Update r7780rp defconfig. sh: Add die chain notifiers. sh: Fix APM emulation on hp6xx. sh: Wire up more IRQs for SH7709. sh: Solution Engine 7722 board support. sh: Fix r7780rp build. sh: kdump support. sh: Move clock reporting to its own proc entry. sh: Solution Engine SH7705 board and CPU updates. serial: sh-sci: Fix module clock refcount for serial console. serial: sh-sci: Fix module clock refcounting. sh: SH7722 clock framework support. sh: hp6xx pata_platform support. sh: Obey CONFIG_HZ for HZ definition. sh: Fix fstatat64() syscall. sh: se7780 PCI support. sh: SH7780 Solution Engine board support. sh: Add a dummy SH-4 PCIC fixup. sh: Tidy up L-BOX area5 addresses. ...
This commit is contained in:
Linus Torvalds
+80
-33
@@ -46,6 +46,7 @@
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#endif
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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#include <linux/ctype.h>
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#include <asm/clock.h>
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#include <asm/sh_bios.h>
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#include <asm/kgdb.h>
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@@ -61,7 +62,7 @@ struct sci_port {
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unsigned int type;
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/* Port IRQs: ERI, RXI, TXI, BRI (optional) */
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unsigned int irqs[SCIx_NR_IRQS];
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unsigned int irqs[SCIx_NR_IRQS];
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/* Port pin configuration */
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void (*init_pins)(struct uart_port *port,
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@@ -76,6 +77,11 @@ struct sci_port {
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/* Break timer */
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struct timer_list break_timer;
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int break_flag;
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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/* Port clock */
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struct clk *clk;
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#endif
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};
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#ifdef CONFIG_SH_KGDB
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@@ -163,7 +169,7 @@ static void put_string(struct sci_port *sci_port, const char *buffer, int count)
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usegdb |= sh_bios_in_gdb_mode();
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#endif
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#ifdef CONFIG_SH_KGDB
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usegdb |= (kgdb_in_gdb_mode && (port == kgdb_sci_port));
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usegdb |= (kgdb_in_gdb_mode && (sci_port == kgdb_sci_port));
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#endif
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if (usegdb) {
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@@ -204,7 +210,7 @@ static int kgdb_sci_getchar(void)
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int c;
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/* Keep trying to read a character, this could be neater */
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while ((c = get_char(kgdb_sci_port)) < 0)
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while ((c = get_char(&kgdb_sci_port->port)) < 0)
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cpu_relax();
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return c;
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@@ -212,7 +218,7 @@ static int kgdb_sci_getchar(void)
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static inline void kgdb_sci_putchar(int c)
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{
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put_char(kgdb_sci_port, c);
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put_char(&kgdb_sci_port->port, c);
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}
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#endif /* CONFIG_SH_KGDB */
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@@ -283,12 +289,23 @@ static void sci_init_pins_irda(struct uart_port *port, unsigned int cflag)
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#endif
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#if defined(SCIF_ONLY) || defined(SCI_AND_SCIF)
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#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7710)
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#if defined(CONFIG_CPU_SUBTYPE_SH7300)
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/* SH7300 doesn't use RTS/CTS */
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static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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{
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sci_out(port, SCFCR, 0);
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}
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#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
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static void sci_init_pins_scif(struct uart_port* port, unsigned int cflag)
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{
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unsigned int fcr_val = 0;
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set_sh771x_scif_pfc(port);
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if (cflag & CRTSCTS) {
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fcr_val |= SCFCR_MCE;
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}
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sci_out(port, SCFCR, fcr_val);
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}
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#elif defined(CONFIG_CPU_SH3)
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/* For SH7705, SH7706, SH7707, SH7709, SH7709A, SH7729 */
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static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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@@ -350,7 +367,7 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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} else {
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#ifdef CONFIG_CPU_SUBTYPE_SH7343
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/* Nothing */
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#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7780) || defined(CONFIG_CPU_SUBTYPE_SH7785)
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ctrl_outw(0x0080, SCSPTR0); /* Set RTS = 1 */
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#else
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ctrl_outw(0x0080, SCSPTR2); /* Set RTS = 1 */
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@@ -360,7 +377,9 @@ static void sci_init_pins_scif(struct uart_port *port, unsigned int cflag)
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}
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#endif
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#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
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#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
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defined(CONFIG_CPU_SUBTYPE_SH7780) || \
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defined(CONFIG_CPU_SUBTYPE_SH7785)
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static inline int scif_txroom(struct uart_port *port)
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{
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return SCIF_TXROOM_MAX - (sci_in(port, SCTFDR) & 0x7f);
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@@ -735,12 +754,6 @@ static irqreturn_t sci_br_interrupt(int irq, void *ptr)
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/* Handle BREAKs */
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sci_handle_breaks(port);
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#ifdef CONFIG_SH_KGDB
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/* Break into the debugger if a break is detected */
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BREAKPOINT();
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#endif
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sci_out(port, SCxSR, SCxSR_BREAK_CLEAR(port));
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return IRQ_HANDLED;
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@@ -947,6 +960,10 @@ static int sci_startup(struct uart_port *port)
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if (s->enable)
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s->enable(port);
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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s->clk = clk_get(NULL, "module_clk");
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#endif
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sci_request_irq(s);
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sci_start_tx(port);
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sci_start_rx(port, 1);
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@@ -964,6 +981,11 @@ static void sci_shutdown(struct uart_port *port)
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if (s->disable)
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s->disable(port);
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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clk_put(s->clk);
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s->clk = NULL;
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#endif
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}
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static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
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@@ -971,7 +993,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
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{
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struct sci_port *s = &sci_ports[port->line];
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unsigned int status, baud, smr_val;
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unsigned long flags;
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int t;
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baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk/16);
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@@ -983,18 +1004,14 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
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default:
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{
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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struct clk *clk = clk_get(NULL, "module_clk");
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t = SCBRR_VALUE(baud, clk_get_rate(clk));
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clk_put(clk);
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t = SCBRR_VALUE(baud, clk_get_rate(s->clk));
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#else
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t = SCBRR_VALUE(baud);
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#endif
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}
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break;
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}
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}
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spin_lock_irqsave(&port->lock, flags);
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do {
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status = sci_in(port, SCxSR);
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} while (!(status & SCxSR_TEND(port)));
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@@ -1038,8 +1055,6 @@ static void sci_set_termios(struct uart_port *port, struct ktermios *termios,
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if ((termios->c_cflag & CREAD) != 0)
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sci_start_rx(port,0);
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spin_unlock_irqrestore(&port->lock, flags);
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}
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static const char *sci_type(struct uart_port *port)
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@@ -1220,10 +1235,13 @@ static int __init serial_console_setup(struct console *co, char *options)
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if (!port->membase || !port->mapbase)
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return -ENODEV;
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spin_lock_init(&port->lock);
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port->type = serial_console_port->type;
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#if defined(CONFIG_SUPERH) && !defined(CONFIG_SUPERH64)
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if (!serial_console_port->clk)
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serial_console_port->clk = clk_get(NULL, "module_clk");
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#endif
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if (port->flags & UPF_IOREMAP)
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sci_config_port(port, 0);
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@@ -1247,7 +1265,7 @@ static struct console serial_console = {
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.device = uart_console_device,
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.write = serial_console_write,
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.setup = serial_console_setup,
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.flags = CON_PRINTBUFFER,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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.data = &sci_uart_driver,
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};
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@@ -1292,11 +1310,23 @@ int __init kgdb_console_setup(struct console *co, char *options)
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int parity = 'n';
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int flow = 'n';
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spin_lock_init(&port->lock);
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if (co->index != kgdb_portnum)
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co->index = kgdb_portnum;
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kgdb_sci_port = &sci_ports[co->index];
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port = &kgdb_sci_port->port;
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/*
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* Also need to check port->type, we don't actually have any
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* UPIO_PORT ports, but uart_report_port() handily misreports
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* it anyways if we don't have a port available by the time this is
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* called.
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*/
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if (!port->type)
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return -ENODEV;
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if (!port->membase || !port->mapbase)
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return -ENODEV;
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if (options)
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uart_parse_options(options, &baud, &parity, &bits, &flow);
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else
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@@ -1311,11 +1341,12 @@ int __init kgdb_console_setup(struct console *co, char *options)
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#ifdef CONFIG_SH_KGDB_CONSOLE
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static struct console kgdb_console = {
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.name = "ttySC",
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.write = kgdb_console_write,
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.setup = kgdb_console_setup,
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.flags = CON_PRINTBUFFER | CON_ENABLED,
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.index = -1,
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.name = "ttySC",
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.device = uart_console_device,
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.write = kgdb_console_write,
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.setup = kgdb_console_setup,
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.flags = CON_PRINTBUFFER,
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.index = -1,
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.data = &sci_uart_driver,
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};
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@@ -1361,9 +1392,19 @@ static int __devinit sci_probe(struct platform_device *dev)
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struct plat_sci_port *p = dev->dev.platform_data;
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int i;
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for (i = 0; p && p->flags != 0 && i < SCI_NPORTS; p++, i++) {
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for (i = 0; p && p->flags != 0; p++, i++) {
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struct sci_port *sciport = &sci_ports[i];
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/* Sanity check */
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if (unlikely(i == SCI_NPORTS)) {
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dev_notice(&dev->dev, "Attempting to register port "
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"%d when only %d are available.\n",
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i+1, SCI_NPORTS);
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dev_notice(&dev->dev, "Consider bumping "
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"CONFIG_SERIAL_SH_SCI_NR_UARTS!\n");
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break;
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}
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sciport->port.mapbase = p->mapbase;
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/*
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@@ -1386,6 +1427,12 @@ static int __devinit sci_probe(struct platform_device *dev)
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uart_add_one_port(&sci_uart_driver, &sciport->port);
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}
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#if defined(CONFIG_SH_KGDB) && !defined(CONFIG_SH_KGDB_CONSOLE)
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kgdb_sci_port = &sci_ports[kgdb_portnum];
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kgdb_getchar = kgdb_sci_getchar;
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kgdb_putchar = kgdb_sci_putchar;
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#endif
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#ifdef CONFIG_CPU_FREQ
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cpufreq_register_notifier(&sci_nb, CPUFREQ_TRANSITION_NOTIFIER);
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dev_info(&dev->dev, "sci: CPU frequency notifier registered\n");
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+69
-14
@@ -73,9 +73,13 @@
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# define SCPDR 0xA4050136 /* 16 bit SCIF */
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# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
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# define SCIF_ONLY
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#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
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#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
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# define SCSPTR0 0xA4400000 /* 16 bit SCIF */
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# define SCSCR_INIT(port) 0x0030 /* TIE=0,RIE=0,TE=1,RE=1 */
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# define SCI_NPORTS 2
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# define SCIF_ORER 0x0001 /* overrun error bit */
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# define PACR 0xa4050100
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# define PBCR 0xa4050102
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# define SCSCR_INIT(port) 0x3B
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# define SCIF_ONLY
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#elif defined(CONFIG_CPU_SUBTYPE_SH73180)
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# define SCPDR 0xA4050138 /* 16 bit SCIF */
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@@ -140,6 +144,16 @@
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# define SCIF_ORER 0x0001 /* Overrun error bit */
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# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
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# define SCIF_ONLY
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#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
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# define SCSPTR0 0xffea0024 /* 16 bit SCIF */
|
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# define SCSPTR1 0xffeb0024 /* 16 bit SCIF */
|
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# define SCSPTR2 0xffec0024 /* 16 bit SCIF */
|
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# define SCSPTR3 0xffed0024 /* 16 bit SCIF */
|
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# define SCSPTR4 0xffee0024 /* 16 bit SCIF */
|
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# define SCSPTR5 0xffef0024 /* 16 bit SCIF */
|
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# define SCIF_OPER 0x0001 /* Overrun error bit */
|
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# define SCSCR_INIT(port) 0x3a /* TIE=0,RIE=0,TE=1,RE=1,REIE=1 */
|
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# define SCIF_ONLY
|
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#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
|
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# define SCSPTR0 0xfffe8020 /* 16 bit SCIF */
|
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# define SCSPTR1 0xfffe8820 /* 16 bit SCIF */
|
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@@ -163,7 +177,10 @@
|
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#define SCI_CTRL_FLAGS_RIE 0x40 /* all */
|
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#define SCI_CTRL_FLAGS_TE 0x20 /* all */
|
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#define SCI_CTRL_FLAGS_RE 0x10 /* all */
|
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#if defined(CONFIG_CPU_SUBTYPE_SH7750) || defined(CONFIG_CPU_SUBTYPE_SH7751) || defined(CONFIG_CPU_SUBTYPE_SH7780)
|
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#if defined(CONFIG_CPU_SUBTYPE_SH7750) || \
|
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defined(CONFIG_CPU_SUBTYPE_SH7751) || \
|
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defined(CONFIG_CPU_SUBTYPE_SH7780) || \
|
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defined(CONFIG_CPU_SUBTYPE_SH7785)
|
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#define SCI_CTRL_FLAGS_REIE 0x08 /* 7750 SCIF */
|
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#else
|
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#define SCI_CTRL_FLAGS_REIE 0
|
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@@ -333,9 +350,15 @@
|
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}
|
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|
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#ifdef CONFIG_CPU_SH3
|
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#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
|
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defined(CONFIG_CPU_SUBTYPE_SH7705) || \
|
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defined(CONFIG_CPU_SUBTYPE_SH7710)
|
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#if defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
|
||||
#define SCIx_FNS(name, sh3_sci_offset, sh3_sci_size, sh4_sci_offset, sh4_sci_size, \
|
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sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size, \
|
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h8_sci_offset, h8_sci_size) \
|
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CPU_SCIx_FNS(name, sh4_sci_offset, sh4_sci_size, sh4_scif_offset, sh4_scif_size)
|
||||
#define SCIF_FNS(name, sh3_scif_offset, sh3_scif_size, sh4_scif_offset, sh4_scif_size) \
|
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CPU_SCIF_FNS(name, sh4_scif_offset, sh4_scif_size)
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7300) || \
|
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defined(CONFIG_CPU_SUBTYPE_SH7705)
|
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#define SCIF_FNS(name, scif_offset, scif_size) \
|
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CPU_SCIF_FNS(name, scif_offset, scif_size)
|
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#else
|
||||
@@ -362,8 +385,8 @@
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7705) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7710)
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7705)
|
||||
|
||||
SCIF_FNS(SCSMR, 0x00, 16)
|
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SCIF_FNS(SCBRR, 0x04, 8)
|
||||
SCIF_FNS(SCSCR, 0x08, 16)
|
||||
@@ -385,7 +408,9 @@ SCIx_FNS(SCxTDR, 0x06, 8, 0x0c, 8, 0x06, 8, 0x0C, 8, 0x03, 8)
|
||||
SCIx_FNS(SCxSR, 0x08, 8, 0x10, 8, 0x08, 16, 0x10, 16, 0x04, 8)
|
||||
SCIx_FNS(SCxRDR, 0x0a, 8, 0x14, 8, 0x0A, 8, 0x14, 8, 0x05, 8)
|
||||
SCIF_FNS(SCFCR, 0x0c, 8, 0x18, 16)
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7760) || defined(CONFIG_CPU_SUBTYPE_SH7780)
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7760) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7785)
|
||||
SCIF_FNS(SCFDR, 0x0e, 16, 0x1C, 16)
|
||||
SCIF_FNS(SCTFDR, 0x0e, 16, 0x1C, 16)
|
||||
SCIF_FNS(SCRFDR, 0x0e, 16, 0x20, 16)
|
||||
@@ -471,13 +496,24 @@ static inline int sci_rxd_in(struct uart_port *port)
|
||||
return ctrl_inb(SCPDR)&0x10 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7710)
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7710) || defined(CONFIG_CPU_SUBTYPE_SH7712)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == SCSPTR0)
|
||||
return ctrl_inw(SCSPTR0 + 0x10) & 0x01 ? 1 : 0;
|
||||
return 1;
|
||||
return sci_in(port,SCxSR)&0x0010 ? 1 : 0;
|
||||
}
|
||||
static inline void set_sh771x_scif_pfc(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xA4400000){
|
||||
ctrl_outw(ctrl_inw(PACR)&0xffc0,PACR);
|
||||
ctrl_outw(ctrl_inw(PBCR)&0x0fff,PBCR);
|
||||
return;
|
||||
}
|
||||
if (port->mapbase == 0xA4410000){
|
||||
ctrl_outw(ctrl_inw(PBCR)&0xf003,PBCR);
|
||||
return;
|
||||
}
|
||||
}
|
||||
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7750) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7751) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH4_202)
|
||||
@@ -576,6 +612,23 @@ static inline int sci_rxd_in(struct uart_port *port)
|
||||
return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7785)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
if (port->mapbase == 0xffea0000)
|
||||
return ctrl_inw(SCSPTR0) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffeb0000)
|
||||
return ctrl_inw(SCSPTR1) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffec0000)
|
||||
return ctrl_inw(SCSPTR2) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffed0000)
|
||||
return ctrl_inw(SCSPTR3) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffee0000)
|
||||
return ctrl_inw(SCSPTR4) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
if (port->mapbase == 0xffef0000)
|
||||
return ctrl_inw(SCSPTR5) & 0x0001 ? 1 : 0; /* SCIF */
|
||||
return 1;
|
||||
}
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7206)
|
||||
static inline int sci_rxd_in(struct uart_port *port)
|
||||
{
|
||||
@@ -634,7 +687,9 @@ static inline int sci_rxd_in(struct uart_port *port)
|
||||
* -- Mitch Davis - 15 Jul 2000
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || defined(CONFIG_CPU_SUBTYPE_SH7780)
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7300) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7780) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7785)
|
||||
#define SCBRR_VALUE(bps, clk) ((clk+16*bps)/(16*bps)-1)
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
|
||||
#define SCBRR_VALUE(bps, clk) (((clk*2)+16*bps)/(32*bps)-1)
|
||||
|
||||
Reference in New Issue
Block a user