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Merge branch 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6
* 'for-linus' of git://one.firstfloor.org/home/andi/git/linux-2.6: (156 commits) [PATCH] x86-64: Export smp_call_function_single [PATCH] i386: Clean up smp_tune_scheduling() [PATCH] unwinder: move .eh_frame to RODATA [PATCH] unwinder: fully support linker generated .eh_frame_hdr section [PATCH] x86-64: don't use set_irq_regs() [PATCH] x86-64: check vector in setup_ioapic_dest to verify if need setup_IO_APIC_irq [PATCH] x86-64: Make ix86 default to HIGHMEM4G instead of NOHIGHMEM [PATCH] i386: replace kmalloc+memset with kzalloc [PATCH] x86-64: remove remaining pc98 code [PATCH] x86-64: remove unused variable [PATCH] x86-64: Fix constraints in atomic_add_return() [PATCH] x86-64: fix asm constraints in i386 atomic_add_return [PATCH] x86-64: Correct documentation for bzImage protocol v2.05 [PATCH] x86-64: replace kmalloc+memset with kzalloc in MTRR code [PATCH] x86-64: Fix numaq build error [PATCH] x86-64: include/asm-x86_64/cpufeature.h isn't a userspace header [PATCH] unwinder: Add debugging output to the Dwarf2 unwinder [PATCH] x86-64: Clarify error message in GART code [PATCH] x86-64: Fix interrupt race in idle callback (3rd try) [PATCH] x86-64: Remove unwind stack pointer alignment forcing again ... Fixed conflict in include/linux/uaccess.h manually Signed-off-by: Linus Torvalds <torvalds@osdl.org>
This commit is contained in:
+37
-32
@@ -154,14 +154,20 @@ static struct IO_APIC_route_entry ioapic_read_entry(int apic, int pin)
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* the interrupt, and we need to make sure the entry is fully populated
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* before that happens.
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*/
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static void
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__ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
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{
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union entry_union eu;
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eu.entry = e;
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io_apic_write(apic, 0x11 + 2*pin, eu.w2);
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io_apic_write(apic, 0x10 + 2*pin, eu.w1);
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}
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static void ioapic_write_entry(int apic, int pin, struct IO_APIC_route_entry e)
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{
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unsigned long flags;
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union entry_union eu;
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eu.entry = e;
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spin_lock_irqsave(&ioapic_lock, flags);
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io_apic_write(apic, 0x11 + 2*pin, eu.w2);
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io_apic_write(apic, 0x10 + 2*pin, eu.w1);
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__ioapic_write_entry(apic, pin, e);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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@@ -837,8 +843,7 @@ static int __init find_isa_irq_pin(int irq, int type)
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if ((mp_bus_id_to_type[lbus] == MP_BUS_ISA ||
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mp_bus_id_to_type[lbus] == MP_BUS_EISA ||
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mp_bus_id_to_type[lbus] == MP_BUS_MCA ||
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mp_bus_id_to_type[lbus] == MP_BUS_NEC98
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mp_bus_id_to_type[lbus] == MP_BUS_MCA
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) &&
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(mp_irqs[i].mpc_irqtype == type) &&
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(mp_irqs[i].mpc_srcbusirq == irq))
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@@ -857,8 +862,7 @@ static int __init find_isa_irq_apic(int irq, int type)
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if ((mp_bus_id_to_type[lbus] == MP_BUS_ISA ||
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mp_bus_id_to_type[lbus] == MP_BUS_EISA ||
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mp_bus_id_to_type[lbus] == MP_BUS_MCA ||
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mp_bus_id_to_type[lbus] == MP_BUS_NEC98
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mp_bus_id_to_type[lbus] == MP_BUS_MCA
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) &&
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(mp_irqs[i].mpc_irqtype == type) &&
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(mp_irqs[i].mpc_srcbusirq == irq))
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@@ -988,12 +992,6 @@ static int EISA_ELCR(unsigned int irq)
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#define default_MCA_trigger(idx) (1)
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#define default_MCA_polarity(idx) (0)
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/* NEC98 interrupts are always polarity zero edge triggered,
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* when listed as conforming in the MP table. */
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#define default_NEC98_trigger(idx) (0)
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#define default_NEC98_polarity(idx) (0)
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static int __init MPBIOS_polarity(int idx)
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{
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int bus = mp_irqs[idx].mpc_srcbus;
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@@ -1028,11 +1026,6 @@ static int __init MPBIOS_polarity(int idx)
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polarity = default_MCA_polarity(idx);
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break;
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}
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case MP_BUS_NEC98: /* NEC 98 pin */
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{
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polarity = default_NEC98_polarity(idx);
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break;
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}
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default:
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{
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printk(KERN_WARNING "broken BIOS!!\n");
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@@ -1102,11 +1095,6 @@ static int MPBIOS_trigger(int idx)
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trigger = default_MCA_trigger(idx);
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break;
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}
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case MP_BUS_NEC98: /* NEC 98 pin */
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{
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trigger = default_NEC98_trigger(idx);
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break;
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}
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default:
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{
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printk(KERN_WARNING "broken BIOS!!\n");
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@@ -1168,7 +1156,6 @@ static int pin_2_irq(int idx, int apic, int pin)
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case MP_BUS_ISA: /* ISA pin */
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case MP_BUS_EISA:
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case MP_BUS_MCA:
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case MP_BUS_NEC98:
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{
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irq = mp_irqs[idx].mpc_srcbusirq;
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break;
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@@ -1236,7 +1223,7 @@ static inline int IO_APIC_irq_trigger(int irq)
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}
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/* irq_vectors is indexed by the sum of all RTEs in all I/O APICs. */
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u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 };
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static u8 irq_vector[NR_IRQ_VECTORS] __read_mostly = { FIRST_DEVICE_VECTOR , 0 };
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static int __assign_irq_vector(int irq)
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{
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@@ -1361,8 +1348,8 @@ static void __init setup_IO_APIC_irqs(void)
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if (!apic && (irq < 16))
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disable_8259A_irq(irq);
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}
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ioapic_write_entry(apic, pin, entry);
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spin_lock_irqsave(&ioapic_lock, flags);
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__ioapic_write_entry(apic, pin, entry);
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set_native_irq_info(irq, TARGET_CPUS);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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}
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@@ -1927,6 +1914,15 @@ static void __init setup_ioapic_ids_from_mpc(void)
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static void __init setup_ioapic_ids_from_mpc(void) { }
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#endif
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static int no_timer_check __initdata;
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static int __init notimercheck(char *s)
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{
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no_timer_check = 1;
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return 1;
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}
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__setup("no_timer_check", notimercheck);
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/*
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* There is a nasty bug in some older SMP boards, their mptable lies
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* about the timer IRQ. We do the following to work around the situation:
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@@ -1935,10 +1931,13 @@ static void __init setup_ioapic_ids_from_mpc(void) { }
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* - if this function detects that timer IRQs are defunct, then we fall
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* back to ISA timer IRQs
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*/
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static int __init timer_irq_works(void)
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int __init timer_irq_works(void)
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{
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unsigned long t1 = jiffies;
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if (no_timer_check)
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return 1;
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local_irq_enable();
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/* Let ten ticks pass... */
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mdelay((10 * 1000) / HZ);
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@@ -2162,9 +2161,15 @@ static inline void unlock_ExtINT_logic(void)
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unsigned char save_control, save_freq_select;
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pin = find_isa_irq_pin(8, mp_INT);
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apic = find_isa_irq_apic(8, mp_INT);
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if (pin == -1)
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if (pin == -1) {
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WARN_ON_ONCE(1);
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return;
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}
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apic = find_isa_irq_apic(8, mp_INT);
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if (apic == -1) {
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WARN_ON_ONCE(1);
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return;
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}
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entry0 = ioapic_read_entry(apic, pin);
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clear_IO_APIC_pin(apic, pin);
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@@ -2209,7 +2214,7 @@ int timer_uses_ioapic_pin_0;
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* is so screwy. Thanks to Brian Perkins for testing/hacking this beast
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* fanatically on his truly buggy board.
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*/
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static inline void check_timer(void)
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static inline void __init check_timer(void)
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{
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int apic1, pin1, apic2, pin2;
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int vector;
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@@ -2857,8 +2862,8 @@ int io_apic_set_pci_routing (int ioapic, int pin, int irq, int edge_level, int a
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if (!ioapic && (irq < 16))
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disable_8259A_irq(irq);
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ioapic_write_entry(ioapic, pin, entry);
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spin_lock_irqsave(&ioapic_lock, flags);
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__ioapic_write_entry(ioapic, pin, entry);
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set_native_irq_info(irq, TARGET_CPUS);
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spin_unlock_irqrestore(&ioapic_lock, flags);
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