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Merge branch 'aarch64/for-next/ras-apei' into aarch64/for-next/core
Merge in arm64 ACPI RAS support (APEI/GHES) from Tyler Baicar.
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@@ -29,6 +29,17 @@ static int arm_pmu_acpi_register_irq(int cpu)
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return -EINVAL;
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gsi = gicc->performance_interrupt;
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/*
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* Per the ACPI spec, the MADT cannot describe a PMU that doesn't
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* have an interrupt. QEMU advertises this by using a GSI of zero,
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* which is not known to be valid on any hardware despite being
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* valid per the spec. Take the pragmatic approach and reject a
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* GSI of zero for now.
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*/
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if (!gsi)
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return 0;
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if (gicc->flags & ACPI_MADT_PERFORMANCE_IRQ_MODE)
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trigger = ACPI_EDGE_SENSITIVE;
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else
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