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Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu
* 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu: m68k: Revive reporting of spurious interrupts m68knommu: Move forward declaration of do_IRQ() from machdep.h to irq.h m68k: fix some atomic operation asm address modes for ColdFire m68k: use CPU_HAS_NO_BITFIELDS for signal functions m68k: merge and clean up delay.h files m68knommu: correctly use trap_init m68knommu: merge ColdFire 5206 and 5206e platform code m68k: merge mmu and non-mmu bitops.h m68k: merge MMU and non MMU versions of system.h m68k: merge MMU and non-MMU versions of asm/hardirq.h m68k: merge the non-mmu and mmu versions of module.c m68knommu: Fix printk() format in free_initrd_mem() m68knommu: Make empty_zero_page "void *", like on m68k
This commit is contained in:
Linus Torvalds
@@ -41,6 +41,10 @@ config NO_DMA
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config ZONE_DMA
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bool
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default y
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config CPU_HAS_NO_BITFIELDS
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bool
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config HZ
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int
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default 1000 if CLEOPATRA
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@@ -16,6 +16,7 @@ config GENERIC_CLOCKEVENTS
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config M68000
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bool
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select CPU_HAS_NO_BITFIELDS
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help
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The Freescale (was Motorola) 68000 CPU is the first generation of
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the well known M68K family of processors. The CPU core as well as
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@@ -25,6 +26,7 @@ config M68000
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config MCPU32
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bool
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select CPU_HAS_NO_BITFIELDS
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help
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The Freescale (was then Motorola) CPU32 is a CPU core that is
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based on the 68020 processor. For the most part it is used in
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@@ -34,6 +36,7 @@ config COLDFIRE
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bool
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select GENERIC_GPIO
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select ARCH_REQUIRE_GPIOLIB
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select CPU_HAS_NO_BITFIELDS
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help
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The Freescale ColdFire family of processors is a modern derivitive
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of the 68000 processor family. They are mainly targeted at embedded
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@@ -13,7 +13,7 @@ platform-$(CONFIG_M68EZ328) := 68EZ328
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platform-$(CONFIG_M68VZ328) := 68VZ328
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platform-$(CONFIG_M68360) := 68360
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platform-$(CONFIG_M5206) := 5206
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platform-$(CONFIG_M5206e) := 5206e
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platform-$(CONFIG_M5206e) := 5206
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platform-$(CONFIG_M520x) := 520x
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platform-$(CONFIG_M523x) := 523x
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platform-$(CONFIG_M5249) := 5249
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@@ -169,18 +169,18 @@ static inline int atomic_add_negative(int i, atomic_t *v)
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char c;
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__asm__ __volatile__("addl %2,%1; smi %0"
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: "=d" (c), "+m" (*v)
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: "id" (i));
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: ASM_DI (i));
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return c != 0;
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}
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static inline void atomic_clear_mask(unsigned long mask, unsigned long *v)
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{
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__asm__ __volatile__("andl %1,%0" : "+m" (*v) : "id" (~(mask)));
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__asm__ __volatile__("andl %1,%0" : "+m" (*v) : ASM_DI (~(mask)));
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}
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static inline void atomic_set_mask(unsigned long mask, unsigned long *v)
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{
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__asm__ __volatile__("orl %1,%0" : "+m" (*v) : "id" (mask));
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__asm__ __volatile__("orl %1,%0" : "+m" (*v) : ASM_DI (mask));
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}
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static __inline__ int atomic_add_unless(atomic_t *v, int a, int u)
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File diff suppressed because it is too large
Load Diff
File diff suppressed because it is too large
Load Diff
@@ -1,333 +0,0 @@
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#ifndef _M68KNOMMU_BITOPS_H
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#define _M68KNOMMU_BITOPS_H
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/*
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* Copyright 1992, Linus Torvalds.
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*/
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#include <linux/compiler.h>
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#include <asm/byteorder.h> /* swab32 */
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#ifdef __KERNEL__
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#ifndef _LINUX_BITOPS_H
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#error only <linux/bitops.h> can be included directly
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#endif
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#if defined (__mcfisaaplus__) || defined (__mcfisac__)
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static inline int ffs(unsigned int val)
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{
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if (!val)
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return 0;
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asm volatile(
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"bitrev %0\n\t"
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"ff1 %0\n\t"
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: "=d" (val)
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: "0" (val)
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);
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val++;
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return val;
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}
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static inline int __ffs(unsigned int val)
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{
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asm volatile(
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"bitrev %0\n\t"
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"ff1 %0\n\t"
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: "=d" (val)
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: "0" (val)
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);
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return val;
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}
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#else
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#include <asm-generic/bitops/ffs.h>
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#include <asm-generic/bitops/__ffs.h>
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#endif
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#include <asm-generic/bitops/sched.h>
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#include <asm-generic/bitops/ffz.h>
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static __inline__ void set_bit(int nr, volatile unsigned long * addr)
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{
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %0,%%a0; bset %1,(%%a0)"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0", "cc");
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#else
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__asm__ __volatile__ ("bset %1,%0"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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: "cc");
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#endif
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}
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#define __set_bit(nr, addr) set_bit(nr, addr)
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/*
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* clear_bit() doesn't provide any barrier for the compiler.
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*/
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#define smp_mb__before_clear_bit() barrier()
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#define smp_mb__after_clear_bit() barrier()
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static __inline__ void clear_bit(int nr, volatile unsigned long * addr)
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{
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %0,%%a0; bclr %1,(%%a0)"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0", "cc");
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#else
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__asm__ __volatile__ ("bclr %1,%0"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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: "cc");
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#endif
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}
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#define __clear_bit(nr, addr) clear_bit(nr, addr)
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static __inline__ void change_bit(int nr, volatile unsigned long * addr)
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{
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %0,%%a0; bchg %1,(%%a0)"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0", "cc");
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#else
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__asm__ __volatile__ ("bchg %1,%0"
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: "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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: "cc");
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#endif
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}
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#define __change_bit(nr, addr) change_bit(nr, addr)
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static __inline__ int test_and_set_bit(int nr, volatile unsigned long * addr)
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{
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char retval;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0");
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#else
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__asm__ __volatile__ ("bset %2,%1; sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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/* No clobber */);
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#endif
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return retval;
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}
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#define __test_and_set_bit(nr, addr) test_and_set_bit(nr, addr)
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static __inline__ int test_and_clear_bit(int nr, volatile unsigned long * addr)
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{
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char retval;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0");
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#else
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__asm__ __volatile__ ("bclr %2,%1; sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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/* No clobber */);
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#endif
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return retval;
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}
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#define __test_and_clear_bit(nr, addr) test_and_clear_bit(nr, addr)
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static __inline__ int test_and_change_bit(int nr, volatile unsigned long * addr)
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{
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char retval;
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#ifdef CONFIG_COLDFIRE
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__asm__ __volatile__ ("lea %1,%%a0\n\tbchg %2,(%%a0)\n\tsne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "d" (nr)
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: "%a0");
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#else
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__asm__ __volatile__ ("bchg %2,%1; sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[(nr^31) >> 3])
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: "di" (nr)
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/* No clobber */);
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#endif
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return retval;
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}
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#define __test_and_change_bit(nr, addr) test_and_change_bit(nr, addr)
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/*
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* This routine doesn't need to be atomic.
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*/
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static __inline__ int __constant_test_bit(int nr, const volatile unsigned long * addr)
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{
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return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
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}
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static __inline__ int __test_bit(int nr, const volatile unsigned long * addr)
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{
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int * a = (int *) addr;
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int mask;
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a += nr >> 5;
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mask = 1 << (nr & 0x1f);
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return ((mask & *a) != 0);
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}
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#define test_bit(nr,addr) \
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(__builtin_constant_p(nr) ? \
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__constant_test_bit((nr),(addr)) : \
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__test_bit((nr),(addr)))
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#include <asm-generic/bitops/find.h>
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#include <asm-generic/bitops/hweight.h>
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#include <asm-generic/bitops/lock.h>
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#define BITOP_LE_SWIZZLE ((BITS_PER_LONG-1) & ~0x7)
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static inline void __set_bit_le(int nr, void *addr)
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{
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__set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
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}
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static inline void __clear_bit_le(int nr, void *addr)
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{
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__clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
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}
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|
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static inline int __test_and_set_bit_le(int nr, volatile void *addr)
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{
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char retval;
|
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|
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#ifdef CONFIG_COLDFIRE
|
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__asm__ __volatile__ ("lea %1,%%a0; bset %2,(%%a0); sne %0"
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: "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
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: "d" (nr)
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: "%a0");
|
||||
#else
|
||||
__asm__ __volatile__ ("bset %2,%1; sne %0"
|
||||
: "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
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||||
: "di" (nr)
|
||||
/* No clobber */);
|
||||
#endif
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
static inline int __test_and_clear_bit_le(int nr, volatile void *addr)
|
||||
{
|
||||
char retval;
|
||||
|
||||
#ifdef CONFIG_COLDFIRE
|
||||
__asm__ __volatile__ ("lea %1,%%a0; bclr %2,(%%a0); sne %0"
|
||||
: "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
|
||||
: "d" (nr)
|
||||
: "%a0");
|
||||
#else
|
||||
__asm__ __volatile__ ("bclr %2,%1; sne %0"
|
||||
: "=d" (retval), "+m" (((volatile char *)addr)[nr >> 3])
|
||||
: "di" (nr)
|
||||
/* No clobber */);
|
||||
#endif
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
#include <asm-generic/bitops/ext2-atomic.h>
|
||||
|
||||
static inline int test_bit_le(int nr, const volatile void *addr)
|
||||
{
|
||||
char retval;
|
||||
|
||||
#ifdef CONFIG_COLDFIRE
|
||||
__asm__ __volatile__ ("lea %1,%%a0; btst %2,(%%a0); sne %0"
|
||||
: "=d" (retval)
|
||||
: "m" (((const volatile char *)addr)[nr >> 3]), "d" (nr)
|
||||
: "%a0");
|
||||
#else
|
||||
__asm__ __volatile__ ("btst %2,%1; sne %0"
|
||||
: "=d" (retval)
|
||||
: "m" (((const volatile char *)addr)[nr >> 3]), "di" (nr)
|
||||
/* No clobber */);
|
||||
#endif
|
||||
|
||||
return retval;
|
||||
}
|
||||
|
||||
#define find_first_zero_bit_le(addr, size) \
|
||||
find_next_zero_bit_le((addr), (size), 0)
|
||||
|
||||
static inline unsigned long find_next_zero_bit_le(void *addr, unsigned long size, unsigned long offset)
|
||||
{
|
||||
unsigned long *p = ((unsigned long *) addr) + (offset >> 5);
|
||||
unsigned long result = offset & ~31UL;
|
||||
unsigned long tmp;
|
||||
|
||||
if (offset >= size)
|
||||
return size;
|
||||
size -= result;
|
||||
offset &= 31UL;
|
||||
if(offset) {
|
||||
/* We hold the little endian value in tmp, but then the
|
||||
* shift is illegal. So we could keep a big endian value
|
||||
* in tmp, like this:
|
||||
*
|
||||
* tmp = __swab32(*(p++));
|
||||
* tmp |= ~0UL >> (32-offset);
|
||||
*
|
||||
* but this would decrease performance, so we change the
|
||||
* shift:
|
||||
*/
|
||||
tmp = *(p++);
|
||||
tmp |= __swab32(~0UL >> (32-offset));
|
||||
if(size < 32)
|
||||
goto found_first;
|
||||
if(~tmp)
|
||||
goto found_middle;
|
||||
size -= 32;
|
||||
result += 32;
|
||||
}
|
||||
while(size & ~31UL) {
|
||||
if(~(tmp = *(p++)))
|
||||
goto found_middle;
|
||||
result += 32;
|
||||
size -= 32;
|
||||
}
|
||||
if(!size)
|
||||
return result;
|
||||
tmp = *p;
|
||||
|
||||
found_first:
|
||||
/* tmp is little endian, so we would have to swab the shift,
|
||||
* see above. But then we have to swab tmp below for ffz, so
|
||||
* we might as well do this here.
|
||||
*/
|
||||
return result + ffz(__swab32(tmp) | (~0UL << size));
|
||||
found_middle:
|
||||
return result + ffz(__swab32(tmp));
|
||||
}
|
||||
#define find_next_zero_bit_le find_next_zero_bit_le
|
||||
|
||||
extern unsigned long find_next_bit_le(const void *addr,
|
||||
unsigned long size, unsigned long offset);
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#include <asm-generic/bitops/fls.h>
|
||||
#include <asm-generic/bitops/__fls.h>
|
||||
#include <asm-generic/bitops/fls64.h>
|
||||
|
||||
#endif /* _M68KNOMMU_BITOPS_H */
|
||||
@@ -1,5 +1,96 @@
|
||||
#ifdef __uClinux__
|
||||
#include "delay_no.h"
|
||||
#ifndef _M68K_DELAY_H
|
||||
#define _M68K_DELAY_H
|
||||
|
||||
#include <asm/param.h>
|
||||
|
||||
/*
|
||||
* Copyright (C) 1994 Hamish Macdonald
|
||||
* Copyright (C) 2004 Greg Ungerer <gerg@uclinux.com>
|
||||
*
|
||||
* Delay routines, using a pre-computed "loops_per_jiffy" value.
|
||||
*/
|
||||
|
||||
#if defined(CONFIG_COLDFIRE)
|
||||
/*
|
||||
* The ColdFire runs the delay loop at significantly different speeds
|
||||
* depending upon long word alignment or not. We'll pad it to
|
||||
* long word alignment which is the faster version.
|
||||
* The 0x4a8e is of course a 'tstl %fp' instruction. This is better
|
||||
* than using a NOP (0x4e71) instruction because it executes in one
|
||||
* cycle not three and doesn't allow for an arbitrary delay waiting
|
||||
* for bus cycles to finish. Also fp/a6 isn't likely to cause a
|
||||
* stall waiting for the register to become valid if such is added
|
||||
* to the coldfire at some stage.
|
||||
*/
|
||||
#define DELAY_ALIGN ".balignw 4, 0x4a8e\n\t"
|
||||
#else
|
||||
#include "delay_mm.h"
|
||||
/*
|
||||
* No instruction alignment required for other m68k types.
|
||||
*/
|
||||
#define DELAY_ALIGN
|
||||
#endif
|
||||
|
||||
static inline void __delay(unsigned long loops)
|
||||
{
|
||||
__asm__ __volatile__ (
|
||||
DELAY_ALIGN
|
||||
"1: subql #1,%0\n\t"
|
||||
"jcc 1b"
|
||||
: "=d" (loops)
|
||||
: "0" (loops));
|
||||
}
|
||||
|
||||
extern void __bad_udelay(void);
|
||||
|
||||
|
||||
#if defined(CONFIG_M68000) || defined(CONFIG_COLDFIRE)
|
||||
/*
|
||||
* The simpler m68k and ColdFire processors do not have a 32*32->64
|
||||
* multiply instruction. So we need to handle them a little differently.
|
||||
* We use a bit of shifting and a single 32*32->32 multiply to get close.
|
||||
* This is a macro so that the const version can factor out the first
|
||||
* multiply and shift.
|
||||
*/
|
||||
#define HZSCALE (268435456 / (1000000 / HZ))
|
||||
|
||||
#define __const_udelay(u) \
|
||||
__delay(((((u) * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6)
|
||||
|
||||
#else
|
||||
|
||||
static inline void __xdelay(unsigned long xloops)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
__asm__ ("mulul %2,%0:%1"
|
||||
: "=d" (xloops), "=d" (tmp)
|
||||
: "d" (xloops), "1" (loops_per_jiffy));
|
||||
__delay(xloops * HZ);
|
||||
}
|
||||
|
||||
/*
|
||||
* The definition of __const_udelay is specifically made a macro so that
|
||||
* the const factor (4295 = 2**32 / 1000000) can be optimized out when
|
||||
* the delay is a const.
|
||||
*/
|
||||
#define __const_udelay(n) (__xdelay((n) * 4295))
|
||||
|
||||
#endif
|
||||
|
||||
static inline void __udelay(unsigned long usecs)
|
||||
{
|
||||
__const_udelay(usecs);
|
||||
}
|
||||
|
||||
/*
|
||||
* Use only for very small delays ( < 1 msec). Should probably use a
|
||||
* lookup table, really, as the multiplications take much too long with
|
||||
* short delays. This is a "reasonable" implementation, though (and the
|
||||
* first constant multiplications gets optimized away if the delay is
|
||||
* a constant)
|
||||
*/
|
||||
#define udelay(n) (__builtin_constant_p(n) ? \
|
||||
((n) > 20000 ? __bad_udelay() : __const_udelay(n)) : __udelay(n))
|
||||
|
||||
|
||||
#endif /* defined(_M68K_DELAY_H) */
|
||||
|
||||
@@ -1,57 +0,0 @@
|
||||
#ifndef _M68K_DELAY_H
|
||||
#define _M68K_DELAY_H
|
||||
|
||||
#include <asm/param.h>
|
||||
|
||||
/*
|
||||
* Copyright (C) 1994 Hamish Macdonald
|
||||
*
|
||||
* Delay routines, using a pre-computed "loops_per_jiffy" value.
|
||||
*/
|
||||
|
||||
static inline void __delay(unsigned long loops)
|
||||
{
|
||||
__asm__ __volatile__ ("1: subql #1,%0; jcc 1b"
|
||||
: "=d" (loops) : "0" (loops));
|
||||
}
|
||||
|
||||
extern void __bad_udelay(void);
|
||||
|
||||
/*
|
||||
* Use only for very small delays ( < 1 msec). Should probably use a
|
||||
* lookup table, really, as the multiplications take much too long with
|
||||
* short delays. This is a "reasonable" implementation, though (and the
|
||||
* first constant multiplications gets optimized away if the delay is
|
||||
* a constant)
|
||||
*/
|
||||
static inline void __const_udelay(unsigned long xloops)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
__asm__ ("mulul %2,%0:%1"
|
||||
: "=d" (xloops), "=d" (tmp)
|
||||
: "d" (xloops), "1" (loops_per_jiffy));
|
||||
__delay(xloops * HZ);
|
||||
}
|
||||
|
||||
static inline void __udelay(unsigned long usecs)
|
||||
{
|
||||
__const_udelay(usecs * 4295); /* 2**32 / 1000000 */
|
||||
}
|
||||
|
||||
#define udelay(n) (__builtin_constant_p(n) ? \
|
||||
((n) > 20000 ? __bad_udelay() : __const_udelay((n) * 4295)) : \
|
||||
__udelay(n))
|
||||
|
||||
static inline unsigned long muldiv(unsigned long a, unsigned long b,
|
||||
unsigned long c)
|
||||
{
|
||||
unsigned long tmp;
|
||||
|
||||
__asm__ ("mulul %2,%0:%1; divul %3,%0:%1"
|
||||
: "=d" (tmp), "=d" (a)
|
||||
: "d" (b), "d" (c), "1" (a));
|
||||
return a;
|
||||
}
|
||||
|
||||
#endif /* defined(_M68K_DELAY_H) */
|
||||
@@ -1,76 +0,0 @@
|
||||
#ifndef _M68KNOMMU_DELAY_H
|
||||
#define _M68KNOMMU_DELAY_H
|
||||
|
||||
/*
|
||||
* Copyright (C) 1994 Hamish Macdonald
|
||||
* Copyright (C) 2004 Greg Ungerer <gerg@snapgear.com>
|
||||
*/
|
||||
|
||||
#include <asm/param.h>
|
||||
|
||||
static inline void __delay(unsigned long loops)
|
||||
{
|
||||
#if defined(CONFIG_COLDFIRE)
|
||||
/* The coldfire runs this loop at significantly different speeds
|
||||
* depending upon long word alignment or not. We'll pad it to
|
||||
* long word alignment which is the faster version.
|
||||
* The 0x4a8e is of course a 'tstl %fp' instruction. This is better
|
||||
* than using a NOP (0x4e71) instruction because it executes in one
|
||||
* cycle not three and doesn't allow for an arbitrary delay waiting
|
||||
* for bus cycles to finish. Also fp/a6 isn't likely to cause a
|
||||
* stall waiting for the register to become valid if such is added
|
||||
* to the coldfire at some stage.
|
||||
*/
|
||||
__asm__ __volatile__ ( ".balignw 4, 0x4a8e\n\t"
|
||||
"1: subql #1, %0\n\t"
|
||||
"jcc 1b"
|
||||
: "=d" (loops) : "0" (loops));
|
||||
#else
|
||||
__asm__ __volatile__ ( "1: subql #1, %0\n\t"
|
||||
"jcc 1b"
|
||||
: "=d" (loops) : "0" (loops));
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Ideally we use a 32*32->64 multiply to calculate the number of
|
||||
* loop iterations, but the older standard 68k and ColdFire do not
|
||||
* have this instruction. So for them we have a clsoe approximation
|
||||
* loop using 32*32->32 multiplies only. This calculation based on
|
||||
* the ARM version of delay.
|
||||
*
|
||||
* We want to implement:
|
||||
*
|
||||
* loops = (usecs * 0x10c6 * HZ * loops_per_jiffy) / 2^32
|
||||
*/
|
||||
|
||||
#define HZSCALE (268435456 / (1000000/HZ))
|
||||
|
||||
extern unsigned long loops_per_jiffy;
|
||||
|
||||
static inline void _udelay(unsigned long usecs)
|
||||
{
|
||||
#if defined(CONFIG_M68328) || defined(CONFIG_M68EZ328) || \
|
||||
defined(CONFIG_M68VZ328) || defined(CONFIG_M68360) || \
|
||||
defined(CONFIG_COLDFIRE)
|
||||
__delay((((usecs * HZSCALE) >> 11) * (loops_per_jiffy >> 11)) >> 6);
|
||||
#else
|
||||
unsigned long tmp;
|
||||
|
||||
usecs *= 4295; /* 2**32 / 1000000 */
|
||||
__asm__ ("mulul %2,%0:%1"
|
||||
: "=d" (usecs), "=d" (tmp)
|
||||
: "d" (usecs), "1" (loops_per_jiffy*HZ));
|
||||
__delay(usecs);
|
||||
#endif
|
||||
}
|
||||
|
||||
/*
|
||||
* Moved the udelay() function into library code, no longer inlined.
|
||||
* I had to change the algorithm because we are overflowing now on
|
||||
* the faster ColdFire parts. The code is a little bigger, so it makes
|
||||
* sense to library it.
|
||||
*/
|
||||
extern void udelay(unsigned long usecs);
|
||||
|
||||
#endif /* defined(_M68KNOMMU_DELAY_H) */
|
||||
@@ -96,11 +96,11 @@
|
||||
.endm
|
||||
|
||||
.macro RDUSP
|
||||
movel sw_usp,%a2
|
||||
movel sw_usp,%a3
|
||||
.endm
|
||||
|
||||
.macro WRUSP
|
||||
movel %a0,sw_usp
|
||||
movel %a3,sw_usp
|
||||
.endm
|
||||
|
||||
#else /* !CONFIG_COLDFIRE_SW_A7 */
|
||||
@@ -127,13 +127,13 @@
|
||||
.endm
|
||||
|
||||
.macro RDUSP
|
||||
/*move %usp,%a2*/
|
||||
.word 0x4e6a
|
||||
/*move %usp,%a3*/
|
||||
.word 0x4e6b
|
||||
.endm
|
||||
|
||||
.macro WRUSP
|
||||
/*move %a0,%usp*/
|
||||
.word 0x4e60
|
||||
/*move %a3,%usp*/
|
||||
.word 0x4e63
|
||||
.endm
|
||||
|
||||
#endif /* !CONFIG_COLDFIRE_SW_A7 */
|
||||
|
||||
@@ -1,5 +1,34 @@
|
||||
#ifdef __uClinux__
|
||||
#include "hardirq_no.h"
|
||||
#ifndef __M68K_HARDIRQ_H
|
||||
#define __M68K_HARDIRQ_H
|
||||
|
||||
#include <linux/threads.h>
|
||||
#include <linux/cache.h>
|
||||
#include <asm/irq.h>
|
||||
|
||||
#define HARDIRQ_BITS 8
|
||||
|
||||
/*
|
||||
* The hardirq mask has to be large enough to have
|
||||
* space for potentially all IRQ sources in the system
|
||||
* nesting on a single CPU:
|
||||
*/
|
||||
#if (1 << HARDIRQ_BITS) < NR_IRQS
|
||||
# error HARDIRQ_BITS is too low!
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
|
||||
/* entry.S is sensitive to the offsets of these fields */
|
||||
typedef struct {
|
||||
unsigned int __softirq_pending;
|
||||
} ____cacheline_aligned irq_cpustat_t;
|
||||
|
||||
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
|
||||
|
||||
#else
|
||||
#include "hardirq_mm.h"
|
||||
|
||||
#include <asm-generic/hardirq.h>
|
||||
|
||||
#endif /* !CONFIG_MMU */
|
||||
|
||||
#endif
|
||||
|
||||
@@ -1,16 +0,0 @@
|
||||
#ifndef __M68K_HARDIRQ_H
|
||||
#define __M68K_HARDIRQ_H
|
||||
|
||||
#include <linux/threads.h>
|
||||
#include <linux/cache.h>
|
||||
|
||||
/* entry.S is sensitive to the offsets of these fields */
|
||||
typedef struct {
|
||||
unsigned int __softirq_pending;
|
||||
} ____cacheline_aligned irq_cpustat_t;
|
||||
|
||||
#include <linux/irq_cpustat.h> /* Standard mappings for irq_cpustat_t above */
|
||||
|
||||
#define HARDIRQ_BITS 8
|
||||
|
||||
#endif
|
||||
@@ -1,19 +0,0 @@
|
||||
#ifndef __M68K_HARDIRQ_H
|
||||
#define __M68K_HARDIRQ_H
|
||||
|
||||
#include <asm/irq.h>
|
||||
|
||||
#define HARDIRQ_BITS 8
|
||||
|
||||
/*
|
||||
* The hardirq mask has to be large enough to have
|
||||
* space for potentially all IRQ sources in the system
|
||||
* nesting on a single CPU:
|
||||
*/
|
||||
#if (1 << HARDIRQ_BITS) < NR_IRQS
|
||||
# error HARDIRQ_BITS is too low!
|
||||
#endif
|
||||
|
||||
#include <asm-generic/hardirq.h>
|
||||
|
||||
#endif /* __M68K_HARDIRQ_H */
|
||||
@@ -32,15 +32,6 @@
|
||||
#include <linux/irqreturn.h>
|
||||
#include <linux/spinlock_types.h>
|
||||
|
||||
/*
|
||||
* The hardirq mask has to be large enough to have
|
||||
* space for potentially all IRQ sources in the system
|
||||
* nesting on a single CPU:
|
||||
*/
|
||||
#if (1 << HARDIRQ_BITS) < NR_IRQS
|
||||
# error HARDIRQ_BITS is too low!
|
||||
#endif
|
||||
|
||||
/*
|
||||
* Interrupt source definitions
|
||||
* General interrupt sources are the level 1-7.
|
||||
@@ -131,4 +122,6 @@ asmlinkage void __m68k_handle_int(unsigned int, struct pt_regs *);
|
||||
#define irq_canonicalize(irq) (irq)
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
asmlinkage void do_IRQ(int irq, struct pt_regs *regs);
|
||||
|
||||
#endif /* _M68K_IRQ_H_ */
|
||||
|
||||
@@ -40,6 +40,5 @@ extern unsigned long hw_timer_offset(void);
|
||||
extern irqreturn_t arch_timer_interrupt(int irq, void *dummy);
|
||||
|
||||
extern void config_BSP(char *command, int len);
|
||||
extern void do_IRQ(int irq, struct pt_regs *fp);
|
||||
|
||||
#endif /* _M68K_MACHDEP_H */
|
||||
|
||||
@@ -1,18 +1,6 @@
|
||||
#ifndef _ASM_M68K_MODULE_H
|
||||
#define _ASM_M68K_MODULE_H
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
|
||||
struct mod_arch_specific {
|
||||
struct m68k_fixup_info *fixup_start, *fixup_end;
|
||||
};
|
||||
|
||||
#define MODULE_ARCH_INIT { \
|
||||
.fixup_start = __start_fixup, \
|
||||
.fixup_end = __stop_fixup, \
|
||||
}
|
||||
|
||||
|
||||
enum m68k_fixup_type {
|
||||
m68k_fixup_memoffset,
|
||||
m68k_fixup_vnode_shift,
|
||||
@@ -23,24 +11,31 @@ struct m68k_fixup_info {
|
||||
void *addr;
|
||||
};
|
||||
|
||||
struct mod_arch_specific {
|
||||
struct m68k_fixup_info *fixup_start, *fixup_end;
|
||||
};
|
||||
|
||||
#ifdef CONFIG_MMU
|
||||
|
||||
#define MODULE_ARCH_INIT { \
|
||||
.fixup_start = __start_fixup, \
|
||||
.fixup_end = __stop_fixup, \
|
||||
}
|
||||
|
||||
|
||||
#define m68k_fixup(type, addr) \
|
||||
" .section \".m68k_fixup\",\"aw\"\n" \
|
||||
" .long " #type "," #addr "\n" \
|
||||
" .previous\n"
|
||||
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
extern struct m68k_fixup_info __start_fixup[], __stop_fixup[];
|
||||
|
||||
struct module;
|
||||
extern void module_fixup(struct module *mod, struct m68k_fixup_info *start,
|
||||
struct m68k_fixup_info *end);
|
||||
|
||||
#else
|
||||
|
||||
struct mod_arch_specific {
|
||||
};
|
||||
|
||||
#endif /* CONFIG_MMU */
|
||||
|
||||
#define Elf_Shdr Elf32_Shdr
|
||||
#define Elf_Sym Elf32_Sym
|
||||
#define Elf_Ehdr Elf32_Ehdr
|
||||
|
||||
@@ -150,7 +150,7 @@ typedef struct sigaltstack {
|
||||
#ifdef __KERNEL__
|
||||
#include <asm/sigcontext.h>
|
||||
|
||||
#ifndef __uClinux__
|
||||
#ifndef CONFIG_CPU_HAS_NO_BITFIELDS
|
||||
#define __HAVE_ARCH_SIG_BITOPS
|
||||
|
||||
static inline void sigaddset(sigset_t *set, int _sig)
|
||||
@@ -199,15 +199,14 @@ static inline int sigfindinword(unsigned long word)
|
||||
return word ^ 31;
|
||||
}
|
||||
|
||||
#endif /* !CONFIG_CPU_HAS_NO_BITFIELDS */
|
||||
|
||||
#ifdef __uClinux__
|
||||
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
|
||||
#else
|
||||
struct pt_regs;
|
||||
extern void ptrace_signal_deliver(struct pt_regs *regs, void *cookie);
|
||||
|
||||
#else
|
||||
|
||||
#undef __HAVE_ARCH_SIG_BITOPS
|
||||
#define ptrace_signal_deliver(regs, cookie) do { } while (0)
|
||||
|
||||
#endif /* __uClinux__ */
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
#endif /* _M68K_SIGNAL_H */
|
||||
|
||||
@@ -1,5 +1,193 @@
|
||||
#ifdef __uClinux__
|
||||
#include "system_no.h"
|
||||
#ifndef _M68K_SYSTEM_H
|
||||
#define _M68K_SYSTEM_H
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/irqflags.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/entry.h>
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/*
|
||||
* switch_to(n) should switch tasks to task ptr, first checking that
|
||||
* ptr isn't the current task, in which case it does nothing. This
|
||||
* also clears the TS-flag if the task we switched to has used the
|
||||
* math co-processor latest.
|
||||
*/
|
||||
/*
|
||||
* switch_to() saves the extra registers, that are not saved
|
||||
* automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
|
||||
* a0-a1. Some of these are used by schedule() and its predecessors
|
||||
* and so we might get see unexpected behaviors when a task returns
|
||||
* with unexpected register values.
|
||||
*
|
||||
* syscall stores these registers itself and none of them are used
|
||||
* by syscall after the function in the syscall has been called.
|
||||
*
|
||||
* Beware that resume now expects *next to be in d1 and the offset of
|
||||
* tss to be in a1. This saves a few instructions as we no longer have
|
||||
* to push them onto the stack and read them back right after.
|
||||
*
|
||||
* 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
|
||||
*
|
||||
* Changed 96/09/19 by Andreas Schwab
|
||||
* pass prev in a0, next in a1
|
||||
*/
|
||||
asmlinkage void resume(void);
|
||||
#define switch_to(prev,next,last) do { \
|
||||
register void *_prev __asm__ ("a0") = (prev); \
|
||||
register void *_next __asm__ ("a1") = (next); \
|
||||
register void *_last __asm__ ("d1"); \
|
||||
__asm__ __volatile__("jbsr resume" \
|
||||
: "=a" (_prev), "=a" (_next), "=d" (_last) \
|
||||
: "0" (_prev), "1" (_next) \
|
||||
: "d0", "d2", "d3", "d4", "d5"); \
|
||||
(last) = _last; \
|
||||
} while (0)
|
||||
|
||||
|
||||
/*
|
||||
* Force strict CPU ordering.
|
||||
* Not really required on m68k...
|
||||
*/
|
||||
#define nop() do { asm volatile ("nop"); barrier(); } while (0)
|
||||
#define mb() barrier()
|
||||
#define rmb() barrier()
|
||||
#define wmb() barrier()
|
||||
#define read_barrier_depends() ((void)0)
|
||||
#define set_mb(var, value) ({ (var) = (value); wmb(); })
|
||||
|
||||
#define smp_mb() barrier()
|
||||
#define smp_rmb() barrier()
|
||||
#define smp_wmb() barrier()
|
||||
#define smp_read_barrier_depends() ((void)0)
|
||||
|
||||
#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
|
||||
|
||||
struct __xchg_dummy { unsigned long a[100]; };
|
||||
#define __xg(x) ((volatile struct __xchg_dummy *)(x))
|
||||
|
||||
#ifndef CONFIG_RMW_INSNS
|
||||
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
|
||||
{
|
||||
unsigned long flags, tmp;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
switch (size) {
|
||||
case 1:
|
||||
tmp = *(u8 *)ptr;
|
||||
*(u8 *)ptr = x;
|
||||
x = tmp;
|
||||
break;
|
||||
case 2:
|
||||
tmp = *(u16 *)ptr;
|
||||
*(u16 *)ptr = x;
|
||||
x = tmp;
|
||||
break;
|
||||
case 4:
|
||||
tmp = *(u32 *)ptr;
|
||||
*(u32 *)ptr = x;
|
||||
x = tmp;
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
|
||||
local_irq_restore(flags);
|
||||
return x;
|
||||
}
|
||||
#else
|
||||
#include "system_mm.h"
|
||||
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 1:
|
||||
__asm__ __volatile__
|
||||
("moveb %2,%0\n\t"
|
||||
"1:\n\t"
|
||||
"casb %0,%1,%2\n\t"
|
||||
"jne 1b"
|
||||
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
|
||||
break;
|
||||
case 2:
|
||||
__asm__ __volatile__
|
||||
("movew %2,%0\n\t"
|
||||
"1:\n\t"
|
||||
"casw %0,%1,%2\n\t"
|
||||
"jne 1b"
|
||||
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
|
||||
break;
|
||||
case 4:
|
||||
__asm__ __volatile__
|
||||
("movel %2,%0\n\t"
|
||||
"1:\n\t"
|
||||
"casl %0,%1,%2\n\t"
|
||||
"jne 1b"
|
||||
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
|
||||
break;
|
||||
}
|
||||
return x;
|
||||
}
|
||||
#endif
|
||||
|
||||
#include <asm-generic/cmpxchg-local.h>
|
||||
|
||||
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
|
||||
|
||||
/*
|
||||
* Atomic compare and exchange. Compare OLD with MEM, if identical,
|
||||
* store NEW in MEM. Return the initial value in MEM. Success is
|
||||
* indicated by comparing RETURN with OLD.
|
||||
*/
|
||||
#ifdef CONFIG_RMW_INSNS
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
|
||||
unsigned long new, int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 1:
|
||||
__asm__ __volatile__ ("casb %0,%2,%1"
|
||||
: "=d" (old), "=m" (*(char *)p)
|
||||
: "d" (new), "0" (old), "m" (*(char *)p));
|
||||
break;
|
||||
case 2:
|
||||
__asm__ __volatile__ ("casw %0,%2,%1"
|
||||
: "=d" (old), "=m" (*(short *)p)
|
||||
: "d" (new), "0" (old), "m" (*(short *)p));
|
||||
break;
|
||||
case 4:
|
||||
__asm__ __volatile__ ("casl %0,%2,%1"
|
||||
: "=d" (old), "=m" (*(int *)p)
|
||||
: "d" (new), "0" (old), "m" (*(int *)p));
|
||||
break;
|
||||
}
|
||||
return old;
|
||||
}
|
||||
|
||||
#define cmpxchg(ptr, o, n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
|
||||
(unsigned long)(n), sizeof(*(ptr))))
|
||||
#define cmpxchg_local(ptr, o, n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
|
||||
(unsigned long)(n), sizeof(*(ptr))))
|
||||
#else
|
||||
|
||||
/*
|
||||
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
|
||||
* them available.
|
||||
*/
|
||||
#define cmpxchg_local(ptr, o, n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
|
||||
(unsigned long)(n), sizeof(*(ptr))))
|
||||
|
||||
#include <asm-generic/cmpxchg.h>
|
||||
|
||||
#endif
|
||||
|
||||
#define arch_align_stack(x) (x)
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _M68K_SYSTEM_H */
|
||||
|
||||
@@ -1,193 +0,0 @@
|
||||
#ifndef _M68K_SYSTEM_H
|
||||
#define _M68K_SYSTEM_H
|
||||
|
||||
#include <linux/linkage.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/irqflags.h>
|
||||
#include <asm/segment.h>
|
||||
#include <asm/entry.h>
|
||||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
/*
|
||||
* switch_to(n) should switch tasks to task ptr, first checking that
|
||||
* ptr isn't the current task, in which case it does nothing. This
|
||||
* also clears the TS-flag if the task we switched to has used the
|
||||
* math co-processor latest.
|
||||
*/
|
||||
/*
|
||||
* switch_to() saves the extra registers, that are not saved
|
||||
* automatically by SAVE_SWITCH_STACK in resume(), ie. d0-d5 and
|
||||
* a0-a1. Some of these are used by schedule() and its predecessors
|
||||
* and so we might get see unexpected behaviors when a task returns
|
||||
* with unexpected register values.
|
||||
*
|
||||
* syscall stores these registers itself and none of them are used
|
||||
* by syscall after the function in the syscall has been called.
|
||||
*
|
||||
* Beware that resume now expects *next to be in d1 and the offset of
|
||||
* tss to be in a1. This saves a few instructions as we no longer have
|
||||
* to push them onto the stack and read them back right after.
|
||||
*
|
||||
* 02/17/96 - Jes Sorensen (jds@kom.auc.dk)
|
||||
*
|
||||
* Changed 96/09/19 by Andreas Schwab
|
||||
* pass prev in a0, next in a1
|
||||
*/
|
||||
asmlinkage void resume(void);
|
||||
#define switch_to(prev,next,last) do { \
|
||||
register void *_prev __asm__ ("a0") = (prev); \
|
||||
register void *_next __asm__ ("a1") = (next); \
|
||||
register void *_last __asm__ ("d1"); \
|
||||
__asm__ __volatile__("jbsr resume" \
|
||||
: "=a" (_prev), "=a" (_next), "=d" (_last) \
|
||||
: "0" (_prev), "1" (_next) \
|
||||
: "d0", "d2", "d3", "d4", "d5"); \
|
||||
(last) = _last; \
|
||||
} while (0)
|
||||
|
||||
|
||||
/*
|
||||
* Force strict CPU ordering.
|
||||
* Not really required on m68k...
|
||||
*/
|
||||
#define nop() do { asm volatile ("nop"); barrier(); } while (0)
|
||||
#define mb() barrier()
|
||||
#define rmb() barrier()
|
||||
#define wmb() barrier()
|
||||
#define read_barrier_depends() ((void)0)
|
||||
#define set_mb(var, value) ({ (var) = (value); wmb(); })
|
||||
|
||||
#define smp_mb() barrier()
|
||||
#define smp_rmb() barrier()
|
||||
#define smp_wmb() barrier()
|
||||
#define smp_read_barrier_depends() ((void)0)
|
||||
|
||||
#define xchg(ptr,x) ((__typeof__(*(ptr)))__xchg((unsigned long)(x),(ptr),sizeof(*(ptr))))
|
||||
|
||||
struct __xchg_dummy { unsigned long a[100]; };
|
||||
#define __xg(x) ((volatile struct __xchg_dummy *)(x))
|
||||
|
||||
#ifndef CONFIG_RMW_INSNS
|
||||
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
|
||||
{
|
||||
unsigned long flags, tmp;
|
||||
|
||||
local_irq_save(flags);
|
||||
|
||||
switch (size) {
|
||||
case 1:
|
||||
tmp = *(u8 *)ptr;
|
||||
*(u8 *)ptr = x;
|
||||
x = tmp;
|
||||
break;
|
||||
case 2:
|
||||
tmp = *(u16 *)ptr;
|
||||
*(u16 *)ptr = x;
|
||||
x = tmp;
|
||||
break;
|
||||
case 4:
|
||||
tmp = *(u32 *)ptr;
|
||||
*(u32 *)ptr = x;
|
||||
x = tmp;
|
||||
break;
|
||||
default:
|
||||
BUG();
|
||||
}
|
||||
|
||||
local_irq_restore(flags);
|
||||
return x;
|
||||
}
|
||||
#else
|
||||
static inline unsigned long __xchg(unsigned long x, volatile void * ptr, int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 1:
|
||||
__asm__ __volatile__
|
||||
("moveb %2,%0\n\t"
|
||||
"1:\n\t"
|
||||
"casb %0,%1,%2\n\t"
|
||||
"jne 1b"
|
||||
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
|
||||
break;
|
||||
case 2:
|
||||
__asm__ __volatile__
|
||||
("movew %2,%0\n\t"
|
||||
"1:\n\t"
|
||||
"casw %0,%1,%2\n\t"
|
||||
"jne 1b"
|
||||
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
|
||||
break;
|
||||
case 4:
|
||||
__asm__ __volatile__
|
||||
("movel %2,%0\n\t"
|
||||
"1:\n\t"
|
||||
"casl %0,%1,%2\n\t"
|
||||
"jne 1b"
|
||||
: "=&d" (x) : "d" (x), "m" (*__xg(ptr)) : "memory");
|
||||
break;
|
||||
}
|
||||
return x;
|
||||
}
|
||||
#endif
|
||||
|
||||
#include <asm-generic/cmpxchg-local.h>
|
||||
|
||||
#define cmpxchg64_local(ptr, o, n) __cmpxchg64_local_generic((ptr), (o), (n))
|
||||
|
||||
/*
|
||||
* Atomic compare and exchange. Compare OLD with MEM, if identical,
|
||||
* store NEW in MEM. Return the initial value in MEM. Success is
|
||||
* indicated by comparing RETURN with OLD.
|
||||
*/
|
||||
#ifdef CONFIG_RMW_INSNS
|
||||
#define __HAVE_ARCH_CMPXCHG 1
|
||||
|
||||
static inline unsigned long __cmpxchg(volatile void *p, unsigned long old,
|
||||
unsigned long new, int size)
|
||||
{
|
||||
switch (size) {
|
||||
case 1:
|
||||
__asm__ __volatile__ ("casb %0,%2,%1"
|
||||
: "=d" (old), "=m" (*(char *)p)
|
||||
: "d" (new), "0" (old), "m" (*(char *)p));
|
||||
break;
|
||||
case 2:
|
||||
__asm__ __volatile__ ("casw %0,%2,%1"
|
||||
: "=d" (old), "=m" (*(short *)p)
|
||||
: "d" (new), "0" (old), "m" (*(short *)p));
|
||||
break;
|
||||
case 4:
|
||||
__asm__ __volatile__ ("casl %0,%2,%1"
|
||||
: "=d" (old), "=m" (*(int *)p)
|
||||
: "d" (new), "0" (old), "m" (*(int *)p));
|
||||
break;
|
||||
}
|
||||
return old;
|
||||
}
|
||||
|
||||
#define cmpxchg(ptr, o, n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
|
||||
(unsigned long)(n), sizeof(*(ptr))))
|
||||
#define cmpxchg_local(ptr, o, n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg((ptr), (unsigned long)(o), \
|
||||
(unsigned long)(n), sizeof(*(ptr))))
|
||||
#else
|
||||
|
||||
/*
|
||||
* cmpxchg_local and cmpxchg64_local are atomic wrt current CPU. Always make
|
||||
* them available.
|
||||
*/
|
||||
#define cmpxchg_local(ptr, o, n) \
|
||||
((__typeof__(*(ptr)))__cmpxchg_local_generic((ptr), (unsigned long)(o),\
|
||||
(unsigned long)(n), sizeof(*(ptr))))
|
||||
|
||||
#include <asm-generic/cmpxchg.h>
|
||||
|
||||
#endif
|
||||
|
||||
#define arch_align_stack(x) (x)
|
||||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#endif /* _M68K_SYSTEM_H */
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user