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[MIPS] PMC MSP71xx core platform
Patch to add core platform support for the PMC-Sierra MSP71xx devices. Signed-off-by: Marc St-Jean <Marc_St-Jean@pmc-sierra.com> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Marc St-Jean
committed by
Ralf Baechle
Ralf Baechle
parent
a4b156d47d
commit
35832e26f9
@@ -0,0 +1,11 @@
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#
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# Makefile for the PMC-Sierra MSP SOCs
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#
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obj-y += msp_prom.o msp_setup.o msp_irq.o \
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msp_time.o msp_serial.o msp_elb.o
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obj-$(CONFIG_PMC_MSP7120_GW) += msp_hwbutton.o
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obj-$(CONFIG_IRQ_MSP_SLP) += msp_irq_slp.o
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obj-$(CONFIG_IRQ_MSP_CIC) += msp_irq_cic.o
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obj-$(CONFIG_PCI) += msp_pci.o
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obj-$(CONFIG_MSPETH) += msp_eth.o
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obj-$(CONFIG_USB_MSP71XX) += msp_usb.o
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@@ -0,0 +1,46 @@
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/*
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* Sets up the proper Chip Select configuration registers. It is assumed that
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* PMON sets up the ADDR and MASK registers properly.
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*
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* Copyright 2005-2006 PMC-Sierra, Inc.
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* Author: Marc St-Jean, Marc_St-Jean@pmc-sierra.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <msp_regs.h>
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static int __init msp_elb_setup(void)
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{
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#if defined(CONFIG_PMC_MSP7120_GW) \
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|| defined(CONFIG_PMC_MSP7120_EVAL)
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/*
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* Force all CNFG to be identical and equal to CS0,
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* according to OPS doc
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*/
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*CS1_CNFG_REG = *CS2_CNFG_REG = *CS3_CNFG_REG = *CS0_CNFG_REG;
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#endif
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return 0;
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}
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subsys_initcall(msp_elb_setup);
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@@ -0,0 +1,179 @@
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/*
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* Sets up interrupt handlers for various hardware switches which are
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* connected to interrupt lines.
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*
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* Copyright 2005-2207 PMC-Sierra, Inc.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*
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* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
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* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
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* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
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* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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* You should have received a copy of the GNU General Public License along
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* with this program; if not, write to the Free Software Foundation, Inc.,
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* 675 Mass Ave, Cambridge, MA 02139, USA.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <msp_int.h>
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#include <msp_regs.h>
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#include <msp_regops.h>
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#ifdef CONFIG_PMCTWILED
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#include <msp_led_macros.h>
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#endif
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/* For hwbutton_interrupt->initial_state */
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#define HWBUTTON_HI 0x1
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#define HWBUTTON_LO 0x2
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/*
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* This struct describes a hardware button
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*/
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struct hwbutton_interrupt {
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char *name; /* Name of button */
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int irq; /* Actual LINUX IRQ */
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int eirq; /* Extended IRQ number (0-7) */
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int initial_state; /* The "normal" state of the switch */
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void (*handle_hi)(void *); /* Handler: switch input has gone HI */
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void (*handle_lo)(void *); /* Handler: switch input has gone LO */
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void *data; /* Optional data to pass to handler */
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};
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#ifdef CONFIG_PMC_MSP7120_GW
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extern void msp_restart(char *);
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static void softreset_push(void *data)
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{
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printk(KERN_WARNING "SOFTRESET switch was pushed\n");
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/*
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* In the future you could move this to the release handler,
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* timing the difference between the 'push' and 'release', and only
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* doing this ungraceful restart if the button has been down for
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* a certain amount of time; otherwise doing a graceful restart.
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*/
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msp_restart(NULL);
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}
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static void softreset_release(void *data)
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{
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printk(KERN_WARNING "SOFTRESET switch was released\n");
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/* Do nothing */
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}
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static void standby_on(void *data)
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{
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printk(KERN_WARNING "STANDBY switch was set to ON (not implemented)\n");
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/* TODO: Put board in standby mode */
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#ifdef CONFIG_PMCTWILED
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msp_led_turn_off(MSP_LED_PWRSTANDBY_GREEN);
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msp_led_turn_on(MSP_LED_PWRSTANDBY_RED);
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#endif
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}
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static void standby_off(void *data)
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{
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printk(KERN_WARNING
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"STANDBY switch was set to OFF (not implemented)\n");
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/* TODO: Take out of standby mode */
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#ifdef CONFIG_PMCTWILED
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msp_led_turn_on(MSP_LED_PWRSTANDBY_GREEN);
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msp_led_turn_off(MSP_LED_PWRSTANDBY_RED);
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#endif
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}
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static struct hwbutton_interrupt softreset_sw = {
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.name = "Softreset button",
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.irq = MSP_INT_EXT0,
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.eirq = 0,
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.initial_state = HWBUTTON_HI,
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.handle_hi = softreset_release,
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.handle_lo = softreset_push,
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.data = NULL,
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};
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static struct hwbutton_interrupt standby_sw = {
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.name = "Standby switch",
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.irq = MSP_INT_EXT1,
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.eirq = 1,
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.initial_state = HWBUTTON_HI,
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.handle_hi = standby_off,
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.handle_lo = standby_on,
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.data = NULL,
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};
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#endif /* CONFIG_PMC_MSP7120_GW */
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static irqreturn_t hwbutton_handler(int irq, void *data)
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{
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struct hwbutton_interrupt *hirq = data;
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unsigned long cic_ext = *CIC_EXT_CFG_REG;
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if (irq != hirq->irq)
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return IRQ_NONE;
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if (CIC_EXT_IS_ACTIVE_HI(cic_ext, hirq->eirq)) {
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/* Interrupt: pin is now HI */
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CIC_EXT_SET_ACTIVE_LO(cic_ext, hirq->eirq);
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hirq->handle_hi(hirq->data);
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} else {
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/* Interrupt: pin is now LO */
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CIC_EXT_SET_ACTIVE_HI(cic_ext, hirq->eirq);
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hirq->handle_lo(hirq->data);
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}
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/*
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* Invert the POLARITY of this level interrupt to ack the interrupt
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* Thus next state change will invoke the opposite message
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*/
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*CIC_EXT_CFG_REG = cic_ext;
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return IRQ_HANDLED;
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}
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static int msp_hwbutton_register(struct hwbutton_interrupt *hirq)
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{
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unsigned long cic_ext;
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if (hirq->handle_hi == NULL || hirq->handle_lo == NULL)
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return -EINVAL;
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cic_ext = *CIC_EXT_CFG_REG;
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CIC_EXT_SET_TRIGGER_LEVEL(cic_ext, hirq->eirq);
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if (hirq->initial_state == HWBUTTON_HI)
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CIC_EXT_SET_ACTIVE_LO(cic_ext, hirq->eirq);
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else
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CIC_EXT_SET_ACTIVE_HI(cic_ext, hirq->eirq);
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*CIC_EXT_CFG_REG = cic_ext;
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return request_irq(hirq->irq, hwbutton_handler, SA_INTERRUPT,
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hirq->name, (void *)hirq);
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}
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static int __init msp_hwbutton_setup(void)
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{
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#ifdef CONFIG_PMC_MSP7120_GW
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msp_hwbutton_register(&softreset_sw);
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msp_hwbutton_register(&standby_sw);
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#endif
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return 0;
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}
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subsys_initcall(msp_hwbutton_setup);
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@@ -0,0 +1,124 @@
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/*
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* IRQ vector handles
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*
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* Copyright (C) 1995, 1996, 1997, 2003 by Ralf Baechle
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*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/irq.h>
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#include <linux/interrupt.h>
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#include <linux/ptrace.h>
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#include <linux/time.h>
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#include <asm/irq_cpu.h>
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#include <msp_int.h>
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extern void msp_int_handle(void);
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/* SLP bases systems */
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extern void msp_slp_irq_init(void);
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extern void msp_slp_irq_dispatch(void);
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/* CIC based systems */
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extern void msp_cic_irq_init(void);
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extern void msp_cic_irq_dispatch(void);
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/*
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* The PMC-Sierra MSP interrupts are arranged in a 3 level cascaded
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* hierarchical system. The first level are the direct MIPS interrupts
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* and are assigned the interrupt range 0-7. The second level is the SLM
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* interrupt controller and is assigned the range 8-39. The third level
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* comprises the Peripherial block, the PCI block, the PCI MSI block and
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* the SLP. The PCI interrupts and the SLP errors are handled by the
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* relevant subsystems so the core interrupt code needs only concern
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* itself with the Peripheral block. These are assigned interrupts in
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* the range 40-71.
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*/
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asmlinkage void plat_irq_dispatch(struct pt_regs *regs)
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{
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u32 pending;
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pending = read_c0_status() & read_c0_cause();
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/*
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* jump to the correct interrupt routine
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* These are arranged in priority order and the timer
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* comes first!
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*/
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#ifdef CONFIG_IRQ_MSP_CIC /* break out the CIC stuff for now */
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if (pending & C_IRQ4) /* do the peripherals first, that's the timer */
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msp_cic_irq_dispatch();
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else if (pending & C_IRQ0)
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do_IRQ(MSP_INT_MAC0);
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else if (pending & C_IRQ1)
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do_IRQ(MSP_INT_MAC1);
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else if (pending & C_IRQ2)
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do_IRQ(MSP_INT_USB);
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else if (pending & C_IRQ3)
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do_IRQ(MSP_INT_SAR);
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else if (pending & C_IRQ5)
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do_IRQ(MSP_INT_SEC);
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#else
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if (pending & C_IRQ5)
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do_IRQ(MSP_INT_TIMER);
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else if (pending & C_IRQ0)
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do_IRQ(MSP_INT_MAC0);
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else if (pending & C_IRQ1)
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do_IRQ(MSP_INT_MAC1);
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else if (pending & C_IRQ3)
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do_IRQ(MSP_INT_VE);
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else if (pending & C_IRQ4)
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msp_slp_irq_dispatch();
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#endif
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else if (pending & C_SW0) /* do software after hardware */
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do_IRQ(MSP_INT_SW0);
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else if (pending & C_SW1)
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do_IRQ(MSP_INT_SW1);
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}
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static struct irqaction cascade_msp = {
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.handler = no_action,
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.name = "MSP cascade"
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};
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void __init arch_init_irq(void)
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{
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/* initialize the 1st-level CPU based interrupt controller */
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mips_cpu_irq_init();
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#ifdef CONFIG_IRQ_MSP_CIC
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msp_cic_irq_init();
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/* setup the cascaded interrupts */
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setup_irq(MSP_INT_CIC, &cascade_msp);
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setup_irq(MSP_INT_PER, &cascade_msp);
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#else
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/* setup the 2nd-level SLP register based interrupt controller */
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msp_slp_irq_init();
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/* setup the cascaded SLP/PER interrupts */
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setup_irq(MSP_INT_SLP, &cascade_msp);
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setup_irq(MSP_INT_PER, &cascade_msp);
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#endif
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}
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@@ -0,0 +1,134 @@
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/*
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* This file define the irq handler for MSP SLM subsystem interrupts.
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*
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* Copyright 2005-2007 PMC-Sierra, Inc, derived from irq_cpu.c
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* Author: Andrew Hughes, Andrew_Hughes@pmc-sierra.com
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms of the GNU General Public License as published by the
|
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* Free Software Foundation; either version 2 of the License, or (at your
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* option) any later version.
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*/
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/kernel.h>
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#include <linux/bitops.h>
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#include <asm/system.h>
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#include <msp_cic_int.h>
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#include <msp_regs.h>
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/*
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* NOTE: We are only enabling support for VPE0 right now.
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*/
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static inline void unmask_msp_cic_irq(unsigned int irq)
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{
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/* check for PER interrupt range */
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if (irq < MSP_PER_INTBASE)
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*CIC_VPE0_MSK_REG |= (1 << (irq - MSP_CIC_INTBASE));
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else
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*PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
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}
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static inline void mask_msp_cic_irq(unsigned int irq)
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{
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/* check for PER interrupt range */
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if (irq < MSP_PER_INTBASE)
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*CIC_VPE0_MSK_REG &= ~(1 << (irq - MSP_CIC_INTBASE));
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else
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*PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
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}
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/*
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* While we ack the interrupt interrupts are disabled and thus we don't need
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* to deal with concurrency issues. Same for msp_cic_irq_end.
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*/
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static inline void ack_msp_cic_irq(unsigned int irq)
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{
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mask_msp_cic_irq(irq);
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/*
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* only really necessary for 18, 16-14 and sometimes 3:0 (since
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* these can be edge sensitive) but it doesn't hurt for the others.
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*/
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/* check for PER interrupt range */
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if (irq < MSP_PER_INTBASE)
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*CIC_STS_REG = (1 << (irq - MSP_CIC_INTBASE));
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else
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*PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE));
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}
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static struct irq_chip msp_cic_irq_controller = {
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.name = "MSP_CIC",
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.ack = ack_msp_cic_irq,
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.mask = ack_msp_cic_irq,
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.mask_ack = ack_msp_cic_irq,
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.unmask = unmask_msp_cic_irq,
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};
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void __init msp_cic_irq_init(void)
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{
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int i;
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/* Mask/clear interrupts. */
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*CIC_VPE0_MSK_REG = 0x00000000;
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*PER_INT_MSK_REG = 0x00000000;
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*CIC_STS_REG = 0xFFFFFFFF;
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*PER_INT_STS_REG = 0xFFFFFFFF;
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#if defined(CONFIG_PMC_MSP7120_GW) || \
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defined(CONFIG_PMC_MSP7120_EVAL)
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/*
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* The MSP7120 RG and EVBD boards use IRQ[6:4] for PCI.
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* These inputs map to EXT_INT_POL[6:4] inside the CIC.
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* They are to be active low, level sensitive.
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*/
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*CIC_EXT_CFG_REG &= 0xFFFF8F8F;
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#endif
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|
||||
/* initialize all the IRQ descriptors */
|
||||
for (i = MSP_CIC_INTBASE; i < MSP_PER_INTBASE + 32; i++)
|
||||
set_irq_chip_and_handler(i, &msp_cic_irq_controller,
|
||||
handle_level_irq);
|
||||
}
|
||||
|
||||
void msp_cic_irq_dispatch(void)
|
||||
{
|
||||
u32 pending;
|
||||
int intbase;
|
||||
|
||||
intbase = MSP_CIC_INTBASE;
|
||||
pending = *CIC_STS_REG & *CIC_VPE0_MSK_REG;
|
||||
|
||||
/* check for PER interrupt */
|
||||
if (pending == (1 << (MSP_INT_PER - MSP_CIC_INTBASE))) {
|
||||
intbase = MSP_PER_INTBASE;
|
||||
pending = *PER_INT_STS_REG & *PER_INT_MSK_REG;
|
||||
}
|
||||
|
||||
/* check for spurious interrupt */
|
||||
if (pending == 0x00000000) {
|
||||
printk(KERN_ERR
|
||||
"Spurious %s interrupt? status %08x, mask %08x\n",
|
||||
(intbase == MSP_CIC_INTBASE) ? "CIC" : "PER",
|
||||
(intbase == MSP_CIC_INTBASE) ?
|
||||
*CIC_STS_REG : *PER_INT_STS_REG,
|
||||
(intbase == MSP_CIC_INTBASE) ?
|
||||
*CIC_VPE0_MSK_REG : *PER_INT_MSK_REG);
|
||||
return;
|
||||
}
|
||||
|
||||
/* check for the timer and dispatch it first */
|
||||
if ((intbase == MSP_CIC_INTBASE) &&
|
||||
(pending & (1 << (MSP_INT_VPE0_TIMER - MSP_CIC_INTBASE))))
|
||||
do_IRQ(MSP_INT_VPE0_TIMER);
|
||||
else
|
||||
do_IRQ(ffs(pending) + intbase - 1);
|
||||
}
|
||||
|
||||
@@ -0,0 +1,109 @@
|
||||
/*
|
||||
* This file define the irq handler for MSP SLM subsystem interrupts.
|
||||
*
|
||||
* Copyright 2005-2006 PMC-Sierra, Inc, derived from irq_cpu.c
|
||||
* Author: Andrew Hughes, Andrew_Hughes@pmc-sierra.com
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/bitops.h>
|
||||
|
||||
#include <asm/mipsregs.h>
|
||||
#include <asm/system.h>
|
||||
|
||||
#include <msp_slp_int.h>
|
||||
#include <msp_regs.h>
|
||||
|
||||
static inline void unmask_msp_slp_irq(unsigned int irq)
|
||||
{
|
||||
/* check for PER interrupt range */
|
||||
if (irq < MSP_PER_INTBASE)
|
||||
*SLP_INT_MSK_REG |= (1 << (irq - MSP_SLP_INTBASE));
|
||||
else
|
||||
*PER_INT_MSK_REG |= (1 << (irq - MSP_PER_INTBASE));
|
||||
}
|
||||
|
||||
static inline void mask_msp_slp_irq(unsigned int irq)
|
||||
{
|
||||
/* check for PER interrupt range */
|
||||
if (irq < MSP_PER_INTBASE)
|
||||
*SLP_INT_MSK_REG &= ~(1 << (irq - MSP_SLP_INTBASE));
|
||||
else
|
||||
*PER_INT_MSK_REG &= ~(1 << (irq - MSP_PER_INTBASE));
|
||||
}
|
||||
|
||||
/*
|
||||
* While we ack the interrupt interrupts are disabled and thus we don't need
|
||||
* to deal with concurrency issues. Same for msp_slp_irq_end.
|
||||
*/
|
||||
static inline void ack_msp_slp_irq(unsigned int irq)
|
||||
{
|
||||
mask_slp_irq(irq);
|
||||
|
||||
/*
|
||||
* only really necessary for 18, 16-14 and sometimes 3:0 (since
|
||||
* these can be edge sensitive) but it doesn't hurt for the others.
|
||||
*/
|
||||
|
||||
/* check for PER interrupt range */
|
||||
if (irq < MSP_PER_INTBASE)
|
||||
*SLP_INT_STS_REG = (1 << (irq - MSP_SLP_INTBASE));
|
||||
else
|
||||
*PER_INT_STS_REG = (1 << (irq - MSP_PER_INTBASE));
|
||||
}
|
||||
|
||||
static struct irq_chip msp_slp_irq_controller = {
|
||||
.name = "MSP_SLP",
|
||||
.ack = ack_msp_slp_irq,
|
||||
.mask = ack_msp_slp_irq,
|
||||
.mask_ack = ack_msp_slp_irq,
|
||||
.unmask = unmask_msp_slp_irq,
|
||||
};
|
||||
|
||||
void __init msp_slp_irq_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
/* Mask/clear interrupts. */
|
||||
*SLP_INT_MSK_REG = 0x00000000;
|
||||
*PER_INT_MSK_REG = 0x00000000;
|
||||
*SLP_INT_STS_REG = 0xFFFFFFFF;
|
||||
*PER_INT_STS_REG = 0xFFFFFFFF;
|
||||
|
||||
/* initialize all the IRQ descriptors */
|
||||
for (i = MSP_SLP_INTBASE; i < MSP_PER_INTBASE + 32; i++)
|
||||
set_irq_chip_and_handler(i, &msp_slp_irq_controller
|
||||
handle_level_irq);
|
||||
}
|
||||
|
||||
void msp_slp_irq_dispatch(void)
|
||||
{
|
||||
u32 pending;
|
||||
int intbase;
|
||||
|
||||
intbase = MSP_SLP_INTBASE;
|
||||
pending = *SLP_INT_STS_REG & *SLP_INT_MSK_REG;
|
||||
|
||||
/* check for PER interrupt */
|
||||
if (pending == (1 << (MSP_INT_PER - MSP_SLP_INTBASE))) {
|
||||
intbase = MSP_PER_INTBASE;
|
||||
pending = *PER_INT_STS_REG & *PER_INT_MSK_REG;
|
||||
}
|
||||
|
||||
/* check for spurious interrupt */
|
||||
if (pending == 0x00000000) {
|
||||
printk(KERN_ERR "Spurious %s interrupt?\n",
|
||||
(intbase == MSP_SLP_INTBASE) ? "SLP" : "PER");
|
||||
return;
|
||||
}
|
||||
|
||||
/* dispatch the irq */
|
||||
do_IRQ(ffs(pending) + intbase - 1);
|
||||
}
|
||||
File diff suppressed because it is too large
Load Diff
@@ -0,0 +1,256 @@
|
||||
/*
|
||||
* The generic setup file for PMC-Sierra MSP processors
|
||||
*
|
||||
* Copyright 2005-2007 PMC-Sierra, Inc,
|
||||
* Author: Jun Sun, jsun@mvista.com or jsun@junsun.net
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*/
|
||||
|
||||
#include <asm/bootinfo.h>
|
||||
#include <asm/cacheflush.h>
|
||||
#include <asm/r4kcache.h>
|
||||
#include <asm/reboot.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
#include <msp_prom.h>
|
||||
#include <msp_regs.h>
|
||||
|
||||
#if defined(CONFIG_PMC_MSP7120_GW)
|
||||
#include <msp_regops.h>
|
||||
#include <msp_gpio.h>
|
||||
#define MSP_BOARD_RESET_GPIO 9
|
||||
#endif
|
||||
|
||||
extern void msp_timer_init(void);
|
||||
extern void msp_serial_setup(void);
|
||||
extern void pmctwiled_setup(void);
|
||||
|
||||
#if defined(CONFIG_PMC_MSP7120_EVAL) || \
|
||||
defined(CONFIG_PMC_MSP7120_GW) || \
|
||||
defined(CONFIG_PMC_MSP7120_FPGA)
|
||||
/*
|
||||
* Performs the reset for MSP7120-based boards
|
||||
*/
|
||||
void msp7120_reset(void)
|
||||
{
|
||||
void *start, *end, *iptr;
|
||||
register int i;
|
||||
|
||||
/* Diasble all interrupts */
|
||||
local_irq_disable();
|
||||
#ifdef CONFIG_SYS_SUPPORTS_MULTITHREADING
|
||||
dvpe();
|
||||
#endif
|
||||
|
||||
/* Cache the reset code of this function */
|
||||
__asm__ __volatile__ (
|
||||
" .set push \n"
|
||||
" .set mips3 \n"
|
||||
" la %0,startpoint \n"
|
||||
" la %1,endpoint \n"
|
||||
" .set pop \n"
|
||||
: "=r" (start), "=r" (end)
|
||||
:
|
||||
);
|
||||
|
||||
for (iptr = (void *)((unsigned int)start & ~(L1_CACHE_BYTES - 1));
|
||||
iptr < end; iptr += L1_CACHE_BYTES)
|
||||
cache_op(Fill, iptr);
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"startpoint: \n"
|
||||
);
|
||||
|
||||
/* Put the DDRC into self-refresh mode */
|
||||
DDRC_INDIRECT_WRITE(DDRC_CTL(10), 0xb, 1 << 16);
|
||||
|
||||
/*
|
||||
* IMPORTANT!
|
||||
* DO NOT do anything from here on out that might even
|
||||
* think about fetching from RAM - i.e., don't call any
|
||||
* non-inlined functions, and be VERY sure that any inline
|
||||
* functions you do call do NOT access any sort of RAM
|
||||
* anywhere!
|
||||
*/
|
||||
|
||||
/* Wait a bit for the DDRC to settle */
|
||||
for (i = 0; i < 100000000; i++);
|
||||
|
||||
#if defined(CONFIG_PMC_MSP7120_GW)
|
||||
/*
|
||||
* Set GPIO 9 HI, (tied to board reset logic)
|
||||
* GPIO 9 is the 4th GPIO of register 3
|
||||
*
|
||||
* NOTE: We cannot use the higher-level msp_gpio_mode()/out()
|
||||
* as GPIO char driver may not be enabled and it would look up
|
||||
* data inRAM!
|
||||
*/
|
||||
set_value_reg32(GPIO_CFG3_REG,
|
||||
basic_mode_mask(MSP_BOARD_RESET_GPIO),
|
||||
basic_mode(MSP_GPIO_OUTPUT, MSP_BOARD_RESET_GPIO));
|
||||
set_reg32(GPIO_DATA3_REG,
|
||||
basic_data_mask(MSP_BOARD_RESET_GPIO));
|
||||
|
||||
/*
|
||||
* In case GPIO9 doesn't reset the board (jumper configurable!)
|
||||
* fallback to device reset below.
|
||||
*/
|
||||
#endif
|
||||
/* Set bit 1 of the MSP7120 reset register */
|
||||
*RST_SET_REG = 0x00000001;
|
||||
|
||||
__asm__ __volatile__ (
|
||||
"endpoint: \n"
|
||||
);
|
||||
}
|
||||
#endif
|
||||
|
||||
void msp_restart(char *command)
|
||||
{
|
||||
printk(KERN_WARNING "Now rebooting .......\n");
|
||||
|
||||
#if defined(CONFIG_PMC_MSP7120_EVAL) || \
|
||||
defined(CONFIG_PMC_MSP7120_GW) || \
|
||||
defined(CONFIG_PMC_MSP7120_FPGA)
|
||||
msp7120_reset();
|
||||
#else
|
||||
/* No chip-specific reset code, just jump to the ROM reset vector */
|
||||
set_c0_status(ST0_BEV | ST0_ERL);
|
||||
change_c0_config(CONF_CM_CMASK, CONF_CM_UNCACHED);
|
||||
flush_cache_all();
|
||||
write_c0_wired(0);
|
||||
|
||||
__asm__ __volatile__("jr\t%0"::"r"(0xbfc00000));
|
||||
#endif
|
||||
}
|
||||
|
||||
void msp_halt(void)
|
||||
{
|
||||
printk(KERN_WARNING "\n** You can safely turn off the power\n");
|
||||
while (1)
|
||||
/* If possible call official function to get CPU WARs */
|
||||
if (cpu_wait)
|
||||
(*cpu_wait)();
|
||||
else
|
||||
__asm__(".set\tmips3\n\t" "wait\n\t" ".set\tmips0");
|
||||
}
|
||||
|
||||
void msp_power_off(void)
|
||||
{
|
||||
msp_halt();
|
||||
}
|
||||
|
||||
void __init plat_mem_setup(void)
|
||||
{
|
||||
_machine_restart = msp_restart;
|
||||
_machine_halt = msp_halt;
|
||||
pm_power_off = msp_power_off;
|
||||
|
||||
board_time_init = msp_timer_init;
|
||||
}
|
||||
|
||||
void __init prom_init(void)
|
||||
{
|
||||
unsigned long family;
|
||||
unsigned long revision;
|
||||
|
||||
prom_argc = fw_arg0;
|
||||
prom_argv = (char **)fw_arg1;
|
||||
prom_envp = (char **)fw_arg2;
|
||||
|
||||
/*
|
||||
* Someday we can use this with PMON2000 to get a
|
||||
* platform call prom routines for output etc. without
|
||||
* having to use grody hacks. For now it's unused.
|
||||
*
|
||||
* struct callvectors *cv = (struct callvectors *) fw_arg3;
|
||||
*/
|
||||
family = identify_family();
|
||||
revision = identify_revision();
|
||||
|
||||
switch (family) {
|
||||
case FAMILY_FPGA:
|
||||
if (FPGA_IS_MSP4200(revision)) {
|
||||
/* Old-style revision ID */
|
||||
mips_machgroup = MACH_GROUP_MSP;
|
||||
mips_machtype = MACH_MSP4200_FPGA;
|
||||
} else {
|
||||
mips_machgroup = MACH_GROUP_MSP;
|
||||
mips_machtype = MACH_MSP_OTHER;
|
||||
}
|
||||
break;
|
||||
|
||||
case FAMILY_MSP4200:
|
||||
mips_machgroup = MACH_GROUP_MSP;
|
||||
#if defined(CONFIG_PMC_MSP4200_EVAL)
|
||||
mips_machtype = MACH_MSP4200_EVAL;
|
||||
#elif defined(CONFIG_PMC_MSP4200_GW)
|
||||
mips_machtype = MACH_MSP4200_GW;
|
||||
#else
|
||||
mips_machtype = MACH_MSP_OTHER;
|
||||
#endif
|
||||
break;
|
||||
|
||||
case FAMILY_MSP4200_FPGA:
|
||||
mips_machgroup = MACH_GROUP_MSP;
|
||||
mips_machtype = MACH_MSP4200_FPGA;
|
||||
break;
|
||||
|
||||
case FAMILY_MSP7100:
|
||||
mips_machgroup = MACH_GROUP_MSP;
|
||||
#if defined(CONFIG_PMC_MSP7120_EVAL)
|
||||
mips_machtype = MACH_MSP7120_EVAL;
|
||||
#elif defined(CONFIG_PMC_MSP7120_GW)
|
||||
mips_machtype = MACH_MSP7120_GW;
|
||||
#else
|
||||
mips_machtype = MACH_MSP_OTHER;
|
||||
#endif
|
||||
break;
|
||||
|
||||
case FAMILY_MSP7100_FPGA:
|
||||
mips_machgroup = MACH_GROUP_MSP;
|
||||
mips_machtype = MACH_MSP7120_FPGA;
|
||||
break;
|
||||
|
||||
default:
|
||||
/* we don't recognize the machine */
|
||||
mips_machgroup = MACH_GROUP_UNKNOWN;
|
||||
mips_machtype = MACH_UNKNOWN;
|
||||
break;
|
||||
}
|
||||
|
||||
/* make sure we have the right initialization routine - sanity */
|
||||
if (mips_machgroup != MACH_GROUP_MSP) {
|
||||
ppfinit("Unknown machine group in a "
|
||||
"MSP initialization routine\n");
|
||||
panic("***Bogosity factor five***, exiting\n");
|
||||
}
|
||||
|
||||
prom_init_cmdline();
|
||||
|
||||
prom_meminit();
|
||||
|
||||
/*
|
||||
* Sub-system setup follows.
|
||||
* Setup functions can either be called here or using the
|
||||
* subsys_initcall mechanism (i.e. see msp_pci_setup). The
|
||||
* order in which they are called can be changed by using the
|
||||
* link order in arch/mips/pmc-sierra/msp71xx/Makefile.
|
||||
*
|
||||
* NOTE: Please keep sub-system specific initialization code
|
||||
* in separate specific files.
|
||||
*/
|
||||
msp_serial_setup();
|
||||
|
||||
#ifdef CONFIG_PMCTWILED
|
||||
/*
|
||||
* Setup LED states before the subsys_initcall loads other
|
||||
* dependant drivers/modules.
|
||||
*/
|
||||
pmctwiled_setup();
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,94 @@
|
||||
/*
|
||||
* Setting up the clock on MSP SOCs. No RTC typically.
|
||||
*
|
||||
* Carsten Langgaard, carstenl@mips.com
|
||||
* Copyright (C) 1999,2000 MIPS Technologies, Inc. All rights reserved.
|
||||
*
|
||||
* ########################################################################
|
||||
*
|
||||
* This program is free software; you can distribute it and/or modify it
|
||||
* under the terms of the GNU General Public License (Version 2) as
|
||||
* published by the Free Software Foundation.
|
||||
*
|
||||
* This program is distributed in the hope it will be useful, but WITHOUT
|
||||
* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
|
||||
* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
|
||||
* for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 59 Temple Place - Suite 330, Boston MA 02111-1307, USA.
|
||||
*
|
||||
* ########################################################################
|
||||
*/
|
||||
|
||||
#include <linux/init.h>
|
||||
#include <linux/kernel_stat.h>
|
||||
#include <linux/sched.h>
|
||||
#include <linux/spinlock.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/ptrace.h>
|
||||
|
||||
#include <asm/mipsregs.h>
|
||||
#include <asm/time.h>
|
||||
|
||||
#include <msp_prom.h>
|
||||
#include <msp_int.h>
|
||||
#include <msp_regs.h>
|
||||
|
||||
void __init msp_timer_init(void)
|
||||
{
|
||||
char *endp, *s;
|
||||
unsigned long cpu_rate = 0;
|
||||
|
||||
if (cpu_rate == 0) {
|
||||
s = prom_getenv("clkfreqhz");
|
||||
cpu_rate = simple_strtoul(s, &endp, 10);
|
||||
if (endp != NULL && *endp != 0) {
|
||||
printk(KERN_ERR
|
||||
"Clock rate in Hz parse error: %s\n", s);
|
||||
cpu_rate = 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (cpu_rate == 0) {
|
||||
s = prom_getenv("clkfreq");
|
||||
cpu_rate = 1000 * simple_strtoul(s, &endp, 10);
|
||||
if (endp != NULL && *endp != 0) {
|
||||
printk(KERN_ERR
|
||||
"Clock rate in MHz parse error: %s\n", s);
|
||||
cpu_rate = 0;
|
||||
}
|
||||
}
|
||||
|
||||
if (cpu_rate == 0) {
|
||||
#if defined(CONFIG_PMC_MSP7120_EVAL) \
|
||||
|| defined(CONFIG_PMC_MSP7120_GW)
|
||||
cpu_rate = 400000000;
|
||||
#elif defined(CONFIG_PMC_MSP7120_FPGA)
|
||||
cpu_rate = 25000000;
|
||||
#else
|
||||
cpu_rate = 150000000;
|
||||
#endif
|
||||
printk(KERN_ERR
|
||||
"Failed to determine CPU clock rate, "
|
||||
"assuming %ld hz ...\n", cpu_rate);
|
||||
}
|
||||
|
||||
printk(KERN_WARNING "Clock rate set to %ld\n", cpu_rate);
|
||||
|
||||
/* timer frequency is 1/2 clock rate */
|
||||
mips_hpt_frequency = cpu_rate/2;
|
||||
}
|
||||
|
||||
|
||||
void __init plat_timer_setup(struct irqaction *irq)
|
||||
{
|
||||
#ifdef CONFIG_IRQ_MSP_CIC
|
||||
/* we are using the vpe0 counter for timer interrupts */
|
||||
setup_irq(MSP_INT_VPE0_TIMER, irq);
|
||||
#else
|
||||
/* we are using the mips counter for timer interrupts */
|
||||
setup_irq(MSP_INT_TIMER, irq);
|
||||
#endif
|
||||
}
|
||||
@@ -0,0 +1,150 @@
|
||||
/*
|
||||
* The setup file for USB related hardware on PMC-Sierra MSP processors.
|
||||
*
|
||||
* Copyright 2006-2007 PMC-Sierra, Inc.
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify it
|
||||
* under the terms of the GNU General Public License as published by the
|
||||
* Free Software Foundation; either version 2 of the License, or (at your
|
||||
* option) any later version.
|
||||
*
|
||||
* THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
|
||||
* NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
|
||||
* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
|
||||
* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
|
||||
* USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
|
||||
* ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
|
||||
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
|
||||
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License along
|
||||
* with this program; if not, write to the Free Software Foundation, Inc.,
|
||||
* 675 Mass Ave, Cambridge, MA 02139, USA.
|
||||
*/
|
||||
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/ioport.h>
|
||||
#include <linux/platform_device.h>
|
||||
|
||||
#include <asm/mipsregs.h>
|
||||
|
||||
#include <msp_regs.h>
|
||||
#include <msp_int.h>
|
||||
#include <msp_prom.h>
|
||||
|
||||
#if defined(CONFIG_USB_EHCI_HCD)
|
||||
static struct resource msp_usbhost_resources [] = {
|
||||
[0] = {
|
||||
.start = MSP_USB_BASE_START,
|
||||
.end = MSP_USB_BASE_END,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = MSP_INT_USB,
|
||||
.end = MSP_INT_USB,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 msp_usbhost_dma_mask = DMA_32BIT_MASK;
|
||||
|
||||
static struct platform_device msp_usbhost_device = {
|
||||
.name = "pmcmsp-ehci",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &msp_usbhost_dma_mask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE (msp_usbhost_resources),
|
||||
.resource = msp_usbhost_resources,
|
||||
};
|
||||
#endif /* CONFIG_USB_EHCI_HCD */
|
||||
|
||||
#if defined(CONFIG_USB_GADGET)
|
||||
static struct resource msp_usbdev_resources [] = {
|
||||
[0] = {
|
||||
.start = MSP_USB_BASE,
|
||||
.end = MSP_USB_BASE_END,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = MSP_INT_USB,
|
||||
.end = MSP_INT_USB,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 msp_usbdev_dma_mask = DMA_32BIT_MASK;
|
||||
|
||||
static struct platform_device msp_usbdev_device = {
|
||||
.name = "msp71xx_udc",
|
||||
.id = 0,
|
||||
.dev = {
|
||||
.dma_mask = &msp_usbdev_dma_mask,
|
||||
.coherent_dma_mask = DMA_32BIT_MASK,
|
||||
},
|
||||
.num_resources = ARRAY_SIZE (msp_usbdev_resources),
|
||||
.resource = msp_usbdev_resources,
|
||||
};
|
||||
#endif /* CONFIG_USB_GADGET */
|
||||
|
||||
#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_GADGET)
|
||||
static struct platform_device *msp_devs[1];
|
||||
#endif
|
||||
|
||||
|
||||
static int __init msp_usb_setup(void)
|
||||
{
|
||||
#if defined(CONFIG_USB_EHCI_HCD) || defined(CONFIG_USB_GADGET)
|
||||
char *strp;
|
||||
char envstr[32];
|
||||
unsigned int val = 0;
|
||||
int result = 0;
|
||||
|
||||
/*
|
||||
* construct environment name usbmode
|
||||
* set usbmode <host/device> as pmon environment var
|
||||
*/
|
||||
snprintf((char *)&envstr[0], sizeof(envstr), "usbmode");
|
||||
|
||||
#if defined(CONFIG_USB_EHCI_HCD)
|
||||
/* default to host mode */
|
||||
val = 1;
|
||||
#endif
|
||||
|
||||
/* get environment string */
|
||||
strp = prom_getenv((char *)&envstr[0]);
|
||||
if (strp) {
|
||||
if (!strcmp(strp, "device"))
|
||||
val = 0;
|
||||
}
|
||||
|
||||
if (val) {
|
||||
#if defined(CONFIG_USB_EHCI_HCD)
|
||||
/* get host mode device */
|
||||
msp_devs[0] = &msp_usbhost_device;
|
||||
ppfinit("platform add USB HOST done %s.\n",
|
||||
msp_devs[0]->name);
|
||||
|
||||
result = platform_add_devices(msp_devs, ARRAY_SIZE (msp_devs));
|
||||
#endif /* CONFIG_USB_EHCI_HCD */
|
||||
}
|
||||
#if defined(CONFIG_USB_GADGET)
|
||||
else {
|
||||
/* get device mode structure */
|
||||
msp_devs[0] = &msp_usbdev_device;
|
||||
ppfinit("platform add USB DEVICE done %s.\n",
|
||||
msp_devs[0]->name);
|
||||
|
||||
result = platform_add_devices(msp_devs, ARRAY_SIZE (msp_devs));
|
||||
}
|
||||
#endif /* CONFIG_USB_GADGET */
|
||||
#endif /* CONFIG_USB_EHCI_HCD || CONFIG_USB_GADGET */
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
subsys_initcall(msp_usb_setup);
|
||||
Reference in New Issue
Block a user