[WATCHDOG] Basic support for GE Fanuc's FPGA based watchdog timer

GE Fanuc SBC610

Support for the FPGA based watchdog timer as found on GE Fanuc's SBC310,
SBC610 and PPC9A Single Board Computers.

This patch adds support for the watchdog timer found in one of the devices
FPGAs. There are two identical watchdog timers at different offsets in the
above mentioned boards, this driver is capable of supporting one of them.
The watchdog timers are also capable of generating interrupts at a
user-configurable threshold, though support for this operation is currently
not supported by the driver.

Signed-off-by: Martyn Welch <martyn.welch@gefanuc.com>
Signed-off-by: Wim Van Sebroeck <wim@iguana.be>
This commit is contained in:
Martyn Welch
2008-11-10 12:31:26 +00:00
committed by Wim Van Sebroeck
parent b1cf3e99db
commit 3268b5618f
3 changed files with 337 additions and 0 deletions
+1
View File
@@ -111,6 +111,7 @@ obj-$(CONFIG_TXX9_WDT) += txx9wdt.o
# PARISC Architecture
# POWERPC Architecture
obj-$(CONFIG_GEF_WDT) += gef_wdt.o
obj-$(CONFIG_MPC5200_WDT) += mpc5200_wdt.o
obj-$(CONFIG_8xxx_WDT) += mpc8xxx_wdt.o
obj-$(CONFIG_MV64X60_WDT) += mv64x60_wdt.o