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Merge tag 'spi-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi
Pull spi updates from Mark Brown:
"A respun version of the merges for the pull request previously sent
with a few additional fixes. The last two merges were fixed up by
hand since the branches have moved on and currently have the prior
merge in them.
Quite a busy release for the SPI subsystem, mostly in cleanups big and
small scattered through the stack rather than anything else:
- New driver for the Broadcom BC63xx HSSPI controller
- Fix duplicate device registration for ACPI
- Conversion of s3c64xx to DMAEngine (this pulls in platform and DMA
changes upon which the transiton depends)
- Some small optimisations to reduce the amount of time we hold locks
in the datapath, eliminate some redundant checks and the size of a
spi_transfer
- Lots of fixes, cleanups and general enhancements to drivers,
especially the rspi and Atmel drivers"
* tag 'spi-v3.14-2' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/spi: (112 commits)
spi: core: Fix transfer failure when master->transfer_one returns positive value
spi: Correct set_cs() documentation
spi: Clarify transfer_one() w.r.t. spi_finalize_current_transfer()
spi: Spelling s/finised/finished/
spi: sc18is602: Convert to use bits_per_word_mask
spi: Remove duplicate code to set default bits_per_word setting
spi/pxa2xx: fix compilation warning when !CONFIG_PM_SLEEP
spi: clps711x: Add MODULE_ALIAS to support module auto-loading
spi: rspi: Add missing clk_disable() calls in error and cleanup paths
spi: rspi: Spelling s/transmition/transmission/
spi: rspi: Add support for specifying CPHA/CPOL
spi/pxa2xx: initialize DMA channels to -1 to prevent inadvertent match
spi: rspi: Add more QSPI register documentation
spi: rspi: Add more RSPI register documentation
spi: rspi: Remove dependency on DMAE for SHMOBILE
spi/s3c64xx: Correct indentation
spi: sh: Use spi_sh_clear_bit() instead of open-coded
spi: bitbang: Grammar s/make to make/to make/
spi: sh-hspi: Spelling s/recive/receive/
spi: core: Improve tx/rx_nbits check comments
...
This commit is contained in:
@@ -67,7 +67,7 @@ only 1(SINGLE), 2(DUAL) and 4(QUAD).
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Dual/Quad mode is not allowed when 3-wire mode is used.
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If a gpio chipselect is used for the SPI slave the gpio number will be passed
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via the cs_gpio
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via the SPI master node cs-gpios property.
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SPI example for an MPC5200 SPI bus:
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spi@f00 {
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@@ -3,6 +3,11 @@ TI QSPI controller.
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Required properties:
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- compatible : should be "ti,dra7xxx-qspi" or "ti,am4372-qspi".
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- reg: Should contain QSPI registers location and length.
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- reg-names: Should contain the resource reg names.
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- qspi_base: Qspi configuration register Address space
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- qspi_mmap: Memory mapped Address space
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- (optional) qspi_ctrlmod: Control module Address space
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- interrupts: should contain the qspi interrupt number.
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- #address-cells, #size-cells : Must be present if the device has sub-nodes
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- ti,hwmods: Name of the hwmod associated to the QSPI
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@@ -14,7 +19,8 @@ Example:
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qspi: qspi@4b300000 {
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compatible = "ti,dra7xxx-qspi";
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reg = <0x4b300000 0x100>;
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reg = <0x47900000 0x100>, <0x30000000 0x3ffffff>;
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reg-names = "qspi_base", "qspi_mmap";
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#address-cells = <1>;
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#size-cells = <0>;
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spi-max-frequency = <25000000>;
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@@ -34,7 +34,7 @@ SPI slave functions are usually not interoperable between vendors
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- It may also be used to stream data in either direction (half duplex),
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or both of them at the same time (full duplex).
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- Some devices may use eight bit words. Others may different word
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- Some devices may use eight bit words. Others may use different word
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lengths, such as streams of 12-bit or 20-bit digital samples.
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- Words are usually sent with their most significant bit (MSB) first,
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@@ -121,7 +121,7 @@ active. So the master must set the clock to inactive before selecting
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a slave, and the slave can tell the chosen polarity by sampling the
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clock level when its select line goes active. That's why many devices
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support for example both modes 0 and 3: they don't care about polarity,
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and alway clock data in/out on rising clock edges.
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and always clock data in/out on rising clock edges.
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How do these driver programming interfaces work?
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@@ -139,7 +139,7 @@ a command and then reading its response.
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There are two types of SPI driver, here called:
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Controller drivers ... controllers may be built in to System-On-Chip
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Controller drivers ... controllers may be built into System-On-Chip
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processors, and often support both Master and Slave roles.
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These drivers touch hardware registers and may use DMA.
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Or they can be PIO bitbangers, needing just GPIO pins.
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@@ -548,7 +548,7 @@ SPI MASTER METHODS
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DEPRECATED METHODS
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master->transfer(struct spi_device *spi, struct spi_message *message)
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This must not sleep. Its responsibility is arrange that the
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This must not sleep. Its responsibility is to arrange that the
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transfer happens and its complete() callback is issued. The two
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will normally happen later, after other transfers complete, and
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if the controller is idle it will need to be kickstarted. This
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