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ARM: remove disable_fiq and arch_ret_to_user macros
Now that most platforms don't need disable_fiq and arch_ret_to_user macros, we can remove the empty macros or empty entry-macro.S files. Signed-off-by: Rob Herring <rob.herring@calxeda.com> Acked-by: Jamie Iles <jamie@jamieiles.com> Acked-by: Nicolas Pitre <nico@linaro.org> Acked-by: Tony Lindgren <tony@atomide.com> Acked-by: Linus Walleij <linus.walleij@linaro.org> Acked-by: Ryan Mallon <rmallon@gmail.com> Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com> Acked-by: H Hartley Sweeten <hsweeten@visionengravers.com> Acked-by: Shawn Guo <shawn.guo@linaro.org>
This commit is contained in:
Rob Herring
@@ -11,14 +11,6 @@
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/* IOC / IOMD based hardware */
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#include <asm/hardware/iomd.h>
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.macro disable_fiq
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mov r12, #ioc_base_high
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.if ioc_base_low
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orr r12, r12, #ioc_base_low
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.endif
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strb r12, [r12, #0x38] @ Disable FIQ register
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldrb \irqstat, [\base, #IOMD_IRQREQB] @ get high priority first
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ldr \tmp, =irq_prio_h
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@@ -13,17 +13,11 @@
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#include <mach/hardware.h>
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#include <mach/at91_aic.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =at91_aic_base @ base virtual address of AIC peripheral
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ldr \base, [\base]
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqnr, [\base, #AT91_AIC_IVR] @ read IRQ vector register: de-asserts nIRQ to processor (and clears interrupt)
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ldr \irqstat, [\base, #AT91_AIC_ISR] @ read interrupt source number
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@@ -21,9 +21,6 @@
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#include <mach/hardware.h>
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#include <mach/csp/mm_io.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \base, =(MM_IO_BASE_INTC0)
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ldr \irqstat, [\base, #0] @ get status
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@@ -77,6 +74,3 @@
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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@@ -10,15 +10,9 @@
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#include <mach/hardware.h>
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#include <asm/hardware/clps7111.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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#if (INTSR2 - INTSR1) != (INTMR2 - INTMR1)
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#error INTSR stride != INTMR stride
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#endif
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@@ -1,15 +0,0 @@
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/*
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* Low-level IRQ helper macros for Cavium Networks platforms
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*
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* Copyright 2008 Cavium Networks
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*
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* This file is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License, Version 2, as
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* published by the Free Software Foundation.
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*/
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.macro disable_fiq
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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@@ -11,17 +11,11 @@
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#include <mach/io.h>
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#include <mach/irqs.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =davinci_intc_base
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ldr \base, [\base]
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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#if defined(CONFIG_AINTC) && defined(CONFIG_CP_INTC)
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ldr \tmp, =davinci_intc_type
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@@ -10,12 +10,6 @@
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#include <mach/bridge-regs.h>
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.macro disable_fiq
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_preamble, base, tmp
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ldr \base, =IRQ_VIRT_BASE
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.endm
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@@ -12,16 +12,10 @@
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#define IRQ_STAT 0xff000000 /* read */
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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mov \base, #IRQ_STAT
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, stat, base, tmp
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ldrb \stat, [\base] @ get interrupts
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mov \irqnr, #0
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@@ -1,17 +0,0 @@
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/*
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* arch/arm/mach-ep93xx/include/mach/entry-macro.S
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* IRQ demultiplexing for EP93xx
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*
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* Copyright (C) 2006 Lennert Buytenhek <buytenh@wantstofly.org>
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or (at
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* your option) any later version.
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*/
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.macro disable_fiq
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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@@ -1,16 +0,0 @@
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/* arch/arm/mach-exynos4/include/mach/entry-macro.S
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*
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* Cloned from arch/arm/mach-realview/include/mach/entry-macro.S
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*
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* Low-level IRQ helper macros for EXYNOS4 platforms
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*
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* This file is licensed under the terms of the GNU General Public
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* License version 2. This program is licensed "as is" without any
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* warranty of any kind, whether express or implied.
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*/
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.macro disable_fiq
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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@@ -14,9 +14,6 @@
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.equ dc21285_high, ARMCSR_BASE & 0xff000000
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.equ dc21285_low, ARMCSR_BASE & 0x00ffffff
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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mov \base, #dc21285_high
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.if dc21285_low
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@@ -24,9 +21,6 @@
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.endif
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqstat, [\base, #0x180] @ get interrupts
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@@ -12,15 +12,9 @@
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#define IRQ_STATUS 0x14
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqstat, =IO_ADDRESS(GEMINI_INTERRUPT_BASE + IRQ_STATUS)
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ldr \irqnr, [\irqstat]
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@@ -8,15 +8,9 @@
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* warranty of any kind, whether express or implied.
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*/
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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#if defined (CONFIG_CPU_H7201) || defined (CONFIG_CPU_H7202)
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@ we could use the id register on H7202, but this is not
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@@ -1,5 +0,0 @@
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.macro disable_fiq
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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@@ -11,15 +11,9 @@
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#include <mach/platform.h>
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#include <mach/irqs.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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/* FIXME: should not be using soo many LDRs here */
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ldr \base, =IO_ADDRESS(INTEGRATOR_IC_BASE)
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@@ -16,9 +16,6 @@
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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*
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*/
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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mrc p15, 0, \tmp, c15, c1, 0
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orr \tmp, \tmp, #(1 << 6)
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@@ -9,9 +9,6 @@
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*/
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#include <mach/iop32x.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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mrc p15, 0, \tmp, c15, c1, 0
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orr \tmp, \tmp, #(1 << 6)
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@@ -9,9 +9,6 @@
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*/
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#include <mach/iop33x.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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mrc p15, 0, \tmp, c15, c1, 0
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orr \tmp, \tmp, #(1 << 6)
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@@ -9,15 +9,9 @@
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*/
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#include <mach/irqs.h>
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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mov \irqnr, #0x0 @clear out irqnr as default
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@@ -2,15 +2,9 @@
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* arch/arm/mach-ixp23xx/include/mach/entry-macro.S
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*/
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.macro disable_fiq
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.endm
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.macro get_irqnr_preamble, base, tmp
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.endm
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.macro arch_ret_to_user, tmp1, tmp2
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.endm
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.macro get_irqnr_and_base, irqnr, irqstat, base, tmp
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ldr \irqnr, =(IXP23XX_INTC_VIRT + IXP23XX_INTR_IRQ_ENC_ST_OFFSET)
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ldr \irqnr, [\irqnr] @ get interrupt number
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