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Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-2.6: (108 commits) ehea: Fixing statistics bonding: Fix lockdep warning after bond_vlan_rx_register() tunnels: Fix tunnels change rcu protection caif-u5500: Build config for CAIF shared mem driver caif-u5500: CAIF shared memory mailbox interface caif-u5500: CAIF shared memory transport protocol caif-u5500: Adding shared memory include drivers/isdn: delete double assignment drivers/net/typhoon.c: delete double assignment drivers/net/sb1000.c: delete double assignment qlcnic: define valid vlan id range qlcnic: reduce rx ring size qlcnic: fix mac learning ehea: fix use after free inetpeer: __rcu annotations fib_rules: __rcu annotates ctarget tunnels: add __rcu annotations net: add __rcu annotations to protocol ipv4: add __rcu annotations to routes.c qlge: bugfix: Restoring the vlan setting. ...
This commit is contained in:
@@ -177,18 +177,6 @@ Doing it all yourself
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A convenience function to print out the PHY status neatly.
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int phy_clear_interrupt(struct phy_device *phydev);
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int phy_config_interrupt(struct phy_device *phydev, u32 interrupts);
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Clear the PHY's interrupt, and configure which ones are allowed,
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respectively. Currently only supports all on, or all off.
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int phy_enable_interrupts(struct phy_device *phydev);
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int phy_disable_interrupts(struct phy_device *phydev);
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Functions which enable/disable PHY interrupts, clearing them
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before and after, respectively.
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int phy_start_interrupts(struct phy_device *phydev);
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int phy_stop_interrupts(struct phy_device *phydev);
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@@ -213,12 +201,6 @@ Doing it all yourself
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Fills the phydev structure with up-to-date information about the current
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settings in the PHY.
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void phy_sanitize_settings(struct phy_device *phydev)
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Resolves differences between currently desired settings, and
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supported settings for the given PHY device. Does not make
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the changes in the hardware, though.
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int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
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int phy_ethtool_gset(struct phy_device *phydev, struct ethtool_cmd *cmd);
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+4
-3
@@ -1736,9 +1736,10 @@ static int __devinit eni_do_init(struct atm_dev *dev)
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eprom = (base+EPROM_SIZE-sizeof(struct midway_eprom));
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if (readl(&eprom->magic) != ENI155_MAGIC) {
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printk("\n");
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printk(KERN_ERR KERN_ERR DEV_LABEL "(itf %d): bad "
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"magic - expected 0x%x, got 0x%x\n",dev->number,
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ENI155_MAGIC,(unsigned) readl(&eprom->magic));
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printk(KERN_ERR DEV_LABEL
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"(itf %d): bad magic - expected 0x%x, got 0x%x\n",
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dev->number, ENI155_MAGIC,
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(unsigned)readl(&eprom->magic));
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error = -EINVAL;
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goto unmap;
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}
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@@ -31,48 +31,6 @@
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#include <linux/connector.h>
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#include <linux/delay.h>
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/*
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* This job is sent to the kevent workqueue.
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* While no event is once sent to any callback, the connector workqueue
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* is not created to avoid a useless waiting kernel task.
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* Once the first event is received, we create this dedicated workqueue which
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* is necessary because the flow of data can be high and we don't want
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* to encumber keventd with that.
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*/
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static void cn_queue_create(struct work_struct *work)
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{
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struct cn_queue_dev *dev;
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dev = container_of(work, struct cn_queue_dev, wq_creation);
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dev->cn_queue = create_singlethread_workqueue(dev->name);
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/* If we fail, we will use keventd for all following connector jobs */
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WARN_ON(!dev->cn_queue);
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}
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/*
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* Queue a data sent to a callback.
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* If the connector workqueue is already created, we queue the job on it.
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* Otherwise, we queue the job to kevent and queue the connector workqueue
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* creation too.
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*/
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int queue_cn_work(struct cn_callback_entry *cbq, struct work_struct *work)
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{
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struct cn_queue_dev *pdev = cbq->pdev;
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if (likely(pdev->cn_queue))
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return queue_work(pdev->cn_queue, work);
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/* Don't create the connector workqueue twice */
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if (atomic_inc_return(&pdev->wq_requested) == 1)
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schedule_work(&pdev->wq_creation);
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else
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atomic_dec(&pdev->wq_requested);
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return schedule_work(work);
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}
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void cn_queue_wrapper(struct work_struct *work)
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{
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struct cn_callback_entry *cbq =
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@@ -111,11 +69,7 @@ cn_queue_alloc_callback_entry(char *name, struct cb_id *id,
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static void cn_queue_free_callback(struct cn_callback_entry *cbq)
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{
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/* The first jobs have been sent to kevent, flush them too */
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flush_scheduled_work();
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if (cbq->pdev->cn_queue)
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flush_workqueue(cbq->pdev->cn_queue);
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kfree(cbq);
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}
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@@ -193,11 +147,14 @@ struct cn_queue_dev *cn_queue_alloc_dev(char *name, struct sock *nls)
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atomic_set(&dev->refcnt, 0);
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INIT_LIST_HEAD(&dev->queue_list);
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spin_lock_init(&dev->queue_lock);
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init_waitqueue_head(&dev->wq_created);
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dev->nls = nls;
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INIT_WORK(&dev->wq_creation, cn_queue_create);
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dev->cn_queue = alloc_ordered_workqueue(dev->name, 0);
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if (!dev->cn_queue) {
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kfree(dev);
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return NULL;
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}
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return dev;
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}
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@@ -205,25 +162,9 @@ struct cn_queue_dev *cn_queue_alloc_dev(char *name, struct sock *nls)
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void cn_queue_free_dev(struct cn_queue_dev *dev)
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{
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struct cn_callback_entry *cbq, *n;
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long timeout;
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DEFINE_WAIT(wait);
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/* Flush the first pending jobs queued on kevent */
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flush_scheduled_work();
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/* If the connector workqueue creation is still pending, wait for it */
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prepare_to_wait(&dev->wq_created, &wait, TASK_UNINTERRUPTIBLE);
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if (atomic_read(&dev->wq_requested) && !dev->cn_queue) {
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timeout = schedule_timeout(HZ * 2);
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if (!timeout && !dev->cn_queue)
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WARN_ON(1);
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}
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finish_wait(&dev->wq_created, &wait);
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if (dev->cn_queue) {
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flush_workqueue(dev->cn_queue);
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destroy_workqueue(dev->cn_queue);
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}
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spin_lock_bh(&dev->queue_lock);
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list_for_each_entry_safe(cbq, n, &dev->queue_list, callback_entry)
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@@ -133,7 +133,8 @@ static int cn_call_callback(struct sk_buff *skb)
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__cbq->data.skb == NULL)) {
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__cbq->data.skb = skb;
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if (queue_cn_work(__cbq, &__cbq->work))
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if (queue_work(dev->cbdev->cn_queue,
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&__cbq->work))
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err = 0;
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else
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err = -EINVAL;
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@@ -148,12 +149,10 @@ static int cn_call_callback(struct sk_buff *skb)
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d->callback = __cbq->data.callback;
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d->free = __new_cbq;
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__new_cbq->pdev = __cbq->pdev;
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INIT_WORK(&__new_cbq->work,
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&cn_queue_wrapper);
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if (queue_cn_work(__new_cbq,
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if (queue_work(dev->cbdev->cn_queue,
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&__new_cbq->work))
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err = 0;
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else {
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@@ -563,7 +563,7 @@ reset_inf(struct inf_hw *hw)
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mdelay(10);
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hw->ipac.isac.adf2 = 0x87;
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hw->ipac.hscx[0].slot = 0x1f;
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hw->ipac.hscx[0].slot = 0x23;
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hw->ipac.hscx[1].slot = 0x23;
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break;
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case INF_GAZEL_R753:
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val = inl((u32)hw->cfg.start + GAZEL_CNTRL);
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@@ -164,11 +164,9 @@ l3_1tr6_setup(struct l3_process *pc, u_char pr, void *arg)
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char tmp[80];
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struct sk_buff *skb = arg;
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p = skb->data;
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/* Channel Identification */
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p = skb->data;
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if ((p = findie(p, skb->len, WE0_chanID, 0))) {
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p = findie(skb->data, skb->len, WE0_chanID, 0);
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if (p) {
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if (p[1] != 1) {
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l3_1tr6_error(pc, "setup wrong chanID len", skb);
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return;
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@@ -631,8 +631,6 @@ struct atl1c_adapter {
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extern char atl1c_driver_name[];
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extern char atl1c_driver_version[];
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extern int atl1c_up(struct atl1c_adapter *adapter);
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extern void atl1c_down(struct atl1c_adapter *adapter);
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extern void atl1c_reinit_locked(struct atl1c_adapter *adapter);
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extern s32 atl1c_reset_hw(struct atl1c_hw *hw);
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extern void atl1c_set_ethtool_ops(struct net_device *netdev);
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@@ -66,6 +66,8 @@ static void atl1c_set_aspm(struct atl1c_hw *hw, bool linkup);
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static void atl1c_setup_mac_ctrl(struct atl1c_adapter *adapter);
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static void atl1c_clean_rx_irq(struct atl1c_adapter *adapter, u8 que,
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int *work_done, int work_to_do);
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static int atl1c_up(struct atl1c_adapter *adapter);
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static void atl1c_down(struct atl1c_adapter *adapter);
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static const u16 atl1c_pay_load_size[] = {
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128, 256, 512, 1024, 2048, 4096,
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@@ -2309,7 +2311,7 @@ static int atl1c_request_irq(struct atl1c_adapter *adapter)
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return err;
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}
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int atl1c_up(struct atl1c_adapter *adapter)
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static int atl1c_up(struct atl1c_adapter *adapter)
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{
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struct net_device *netdev = adapter->netdev;
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int num;
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@@ -2351,7 +2353,7 @@ err_alloc_rx:
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return err;
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}
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void atl1c_down(struct atl1c_adapter *adapter)
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static void atl1c_down(struct atl1c_adapter *adapter)
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{
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struct net_device *netdev = adapter->netdev;
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@@ -91,6 +91,8 @@ MODULE_VERSION(ATLX_DRIVER_VERSION);
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/* Temporary hack for merging atl1 and atl2 */
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#include "atlx.c"
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static const struct ethtool_ops atl1_ethtool_ops;
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/*
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* This is the only thing that needs to be changed to adjust the
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* maximum number of ports that the driver can manage.
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@@ -353,7 +355,7 @@ static bool atl1_read_eeprom(struct atl1_hw *hw, u32 offset, u32 *p_value)
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* hw - Struct containing variables accessed by shared code
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* reg_addr - address of the PHY register to read
|
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*/
|
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s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
|
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static s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data)
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{
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u32 val;
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int i;
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@@ -553,7 +555,7 @@ static s32 atl1_read_mac_addr(struct atl1_hw *hw)
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* 1. calcu 32bit CRC for multicast address
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||||
* 2. reverse crc with MSB to LSB
|
||||
*/
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||||
u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
|
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static u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
|
||||
{
|
||||
u32 crc32, value = 0;
|
||||
int i;
|
||||
@@ -570,7 +572,7 @@ u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr)
|
||||
* hw - Struct containing variables accessed by shared code
|
||||
* hash_value - Multicast address hash value
|
||||
*/
|
||||
void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
|
||||
static void atl1_hash_set(struct atl1_hw *hw, u32 hash_value)
|
||||
{
|
||||
u32 hash_bit, hash_reg;
|
||||
u32 mta;
|
||||
@@ -914,7 +916,7 @@ static s32 atl1_get_speed_and_duplex(struct atl1_hw *hw, u16 *speed, u16 *duplex
|
||||
return 0;
|
||||
}
|
||||
|
||||
void atl1_set_mac_addr(struct atl1_hw *hw)
|
||||
static void atl1_set_mac_addr(struct atl1_hw *hw)
|
||||
{
|
||||
u32 value;
|
||||
/*
|
||||
@@ -3658,7 +3660,7 @@ static int atl1_nway_reset(struct net_device *netdev)
|
||||
return 0;
|
||||
}
|
||||
|
||||
const struct ethtool_ops atl1_ethtool_ops = {
|
||||
static const struct ethtool_ops atl1_ethtool_ops = {
|
||||
.get_settings = atl1_get_settings,
|
||||
.set_settings = atl1_set_settings,
|
||||
.get_drvinfo = atl1_get_drvinfo,
|
||||
|
||||
@@ -56,16 +56,13 @@ struct atl1_adapter;
|
||||
struct atl1_hw;
|
||||
|
||||
/* function prototypes needed by multiple files */
|
||||
u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr);
|
||||
void atl1_hash_set(struct atl1_hw *hw, u32 hash_value);
|
||||
s32 atl1_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data);
|
||||
void atl1_set_mac_addr(struct atl1_hw *hw);
|
||||
static u32 atl1_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr);
|
||||
static void atl1_hash_set(struct atl1_hw *hw, u32 hash_value);
|
||||
static void atl1_set_mac_addr(struct atl1_hw *hw);
|
||||
static int atl1_mii_ioctl(struct net_device *netdev, struct ifreq *ifr,
|
||||
int cmd);
|
||||
static u32 atl1_check_link(struct atl1_adapter *adapter);
|
||||
|
||||
extern const struct ethtool_ops atl1_ethtool_ops;
|
||||
|
||||
/* hardware definitions specific to L1 */
|
||||
|
||||
/* Block IDLE Status Register */
|
||||
|
||||
@@ -41,6 +41,10 @@
|
||||
|
||||
#include "atlx.h"
|
||||
|
||||
static s32 atlx_read_phy_reg(struct atl1_hw *hw, u16 reg_addr, u16 *phy_data);
|
||||
static u32 atlx_hash_mc_addr(struct atl1_hw *hw, u8 *mc_addr);
|
||||
static void atlx_set_mac_addr(struct atl1_hw *hw);
|
||||
|
||||
static struct atlx_spi_flash_dev flash_table[] = {
|
||||
/* MFR_NAME WRSR READ PRGM WREN WRDI RDSR RDID SEC_ERS CHIP_ERS */
|
||||
{"Atmel", 0x00, 0x03, 0x02, 0x06, 0x04, 0x05, 0x15, 0x52, 0x62},
|
||||
|
||||
@@ -1471,42 +1471,6 @@ err:
|
||||
return status;
|
||||
}
|
||||
|
||||
/* Uses sync mcc */
|
||||
int be_cmd_read_port_type(struct be_adapter *adapter, u32 port,
|
||||
u8 *connector)
|
||||
{
|
||||
struct be_mcc_wrb *wrb;
|
||||
struct be_cmd_req_port_type *req;
|
||||
int status;
|
||||
|
||||
spin_lock_bh(&adapter->mcc_lock);
|
||||
|
||||
wrb = wrb_from_mccq(adapter);
|
||||
if (!wrb) {
|
||||
status = -EBUSY;
|
||||
goto err;
|
||||
}
|
||||
req = embedded_payload(wrb);
|
||||
|
||||
be_wrb_hdr_prepare(wrb, sizeof(struct be_cmd_resp_port_type), true, 0,
|
||||
OPCODE_COMMON_READ_TRANSRECV_DATA);
|
||||
|
||||
be_cmd_hdr_prepare(&req->hdr, CMD_SUBSYSTEM_COMMON,
|
||||
OPCODE_COMMON_READ_TRANSRECV_DATA, sizeof(*req));
|
||||
|
||||
req->port = cpu_to_le32(port);
|
||||
req->page_num = cpu_to_le32(TR_PAGE_A0);
|
||||
status = be_mcc_notify_wait(adapter);
|
||||
if (!status) {
|
||||
struct be_cmd_resp_port_type *resp = embedded_payload(wrb);
|
||||
*connector = resp->data.connector;
|
||||
}
|
||||
|
||||
err:
|
||||
spin_unlock_bh(&adapter->mcc_lock);
|
||||
return status;
|
||||
}
|
||||
|
||||
int be_cmd_write_flashrom(struct be_adapter *adapter, struct be_dma_mem *cmd,
|
||||
u32 flash_type, u32 flash_opcode, u32 buf_size)
|
||||
{
|
||||
|
||||
@@ -1022,8 +1022,6 @@ extern int be_cmd_set_beacon_state(struct be_adapter *adapter,
|
||||
u8 port_num, u8 beacon, u8 status, u8 state);
|
||||
extern int be_cmd_get_beacon_state(struct be_adapter *adapter,
|
||||
u8 port_num, u32 *state);
|
||||
extern int be_cmd_read_port_type(struct be_adapter *adapter, u32 port,
|
||||
u8 *connector);
|
||||
extern int be_cmd_write_flashrom(struct be_adapter *adapter,
|
||||
struct be_dma_mem *cmd, u32 flash_oper,
|
||||
u32 flash_opcode, u32 buf_size);
|
||||
|
||||
+28
-21
@@ -849,20 +849,16 @@ static void be_rx_stats_update(struct be_rx_obj *rxo,
|
||||
stats->rx_mcast_pkts++;
|
||||
}
|
||||
|
||||
static inline bool do_pkt_csum(struct be_eth_rx_compl *rxcp, bool cso)
|
||||
static inline bool csum_passed(struct be_eth_rx_compl *rxcp)
|
||||
{
|
||||
u8 l4_cksm, ip_version, ipcksm, tcpf = 0, udpf = 0, ipv6_chk;
|
||||
u8 l4_cksm, ipv6, ipcksm;
|
||||
|
||||
l4_cksm = AMAP_GET_BITS(struct amap_eth_rx_compl, l4_cksm, rxcp);
|
||||
ipcksm = AMAP_GET_BITS(struct amap_eth_rx_compl, ipcksm, rxcp);
|
||||
ip_version = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
|
||||
if (ip_version) {
|
||||
tcpf = AMAP_GET_BITS(struct amap_eth_rx_compl, tcpf, rxcp);
|
||||
udpf = AMAP_GET_BITS(struct amap_eth_rx_compl, udpf, rxcp);
|
||||
}
|
||||
ipv6_chk = (ip_version && (tcpf || udpf));
|
||||
ipv6 = AMAP_GET_BITS(struct amap_eth_rx_compl, ip_version, rxcp);
|
||||
|
||||
return ((l4_cksm && ipv6_chk && ipcksm) && cso) ? false : true;
|
||||
/* Ignore ipcksm for ipv6 pkts */
|
||||
return l4_cksm && (ipcksm || ipv6);
|
||||
}
|
||||
|
||||
static struct be_rx_page_info *
|
||||
@@ -1017,10 +1013,10 @@ static void be_rx_compl_process(struct be_adapter *adapter,
|
||||
|
||||
skb_fill_rx_data(adapter, rxo, skb, rxcp, num_rcvd);
|
||||
|
||||
if (do_pkt_csum(rxcp, adapter->rx_csum))
|
||||
skb_checksum_none_assert(skb);
|
||||
else
|
||||
if (likely(adapter->rx_csum && csum_passed(rxcp)))
|
||||
skb->ip_summed = CHECKSUM_UNNECESSARY;
|
||||
else
|
||||
skb_checksum_none_assert(skb);
|
||||
|
||||
skb->truesize = skb->len + sizeof(struct sk_buff);
|
||||
skb->protocol = eth_type_trans(skb, adapter->netdev);
|
||||
@@ -1674,7 +1670,7 @@ static inline bool do_gro(struct be_adapter *adapter, struct be_rx_obj *rxo,
|
||||
return (tcp_frame && !err) ? true : false;
|
||||
}
|
||||
|
||||
int be_poll_rx(struct napi_struct *napi, int budget)
|
||||
static int be_poll_rx(struct napi_struct *napi, int budget)
|
||||
{
|
||||
struct be_eq_obj *rx_eq = container_of(napi, struct be_eq_obj, napi);
|
||||
struct be_rx_obj *rxo = container_of(rx_eq, struct be_rx_obj, rx_eq);
|
||||
@@ -1806,6 +1802,20 @@ static void be_worker(struct work_struct *work)
|
||||
struct be_rx_obj *rxo;
|
||||
int i;
|
||||
|
||||
/* when interrupts are not yet enabled, just reap any pending
|
||||
* mcc completions */
|
||||
if (!netif_running(adapter->netdev)) {
|
||||
int mcc_compl, status = 0;
|
||||
|
||||
mcc_compl = be_process_mcc(adapter, &status);
|
||||
|
||||
if (mcc_compl) {
|
||||
struct be_mcc_obj *mcc_obj = &adapter->mcc_obj;
|
||||
be_cq_notify(adapter, mcc_obj->cq.id, false, mcc_compl);
|
||||
}
|
||||
goto reschedule;
|
||||
}
|
||||
|
||||
if (!adapter->stats_ioctl_sent)
|
||||
be_cmd_get_stats(adapter, &adapter->stats_cmd);
|
||||
|
||||
@@ -1824,6 +1834,7 @@ static void be_worker(struct work_struct *work)
|
||||
if (!adapter->ue_detected)
|
||||
be_detect_dump_ue(adapter);
|
||||
|
||||
reschedule:
|
||||
schedule_delayed_work(&adapter->work, msecs_to_jiffies(1000));
|
||||
}
|
||||
|
||||
@@ -2019,8 +2030,6 @@ static int be_close(struct net_device *netdev)
|
||||
struct be_eq_obj *tx_eq = &adapter->tx_eq;
|
||||
int vec, i;
|
||||
|
||||
cancel_delayed_work_sync(&adapter->work);
|
||||
|
||||
be_async_mcc_disable(adapter);
|
||||
|
||||
netif_stop_queue(netdev);
|
||||
@@ -2085,8 +2094,6 @@ static int be_open(struct net_device *netdev)
|
||||
/* Now that interrupts are on we can process async mcc */
|
||||
be_async_mcc_enable(adapter);
|
||||
|
||||
schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
|
||||
|
||||
status = be_cmd_link_status_query(adapter, &link_up, &mac_speed,
|
||||
&link_speed);
|
||||
if (status)
|
||||
@@ -2299,9 +2306,6 @@ static int be_clear(struct be_adapter *adapter)
|
||||
|
||||
|
||||
#define FW_FILE_HDR_SIGN "ServerEngines Corp. "
|
||||
char flash_cookie[2][16] = {"*** SE FLAS",
|
||||
"H DIRECTORY *** "};
|
||||
|
||||
static bool be_flash_redboot(struct be_adapter *adapter,
|
||||
const u8 *p, u32 img_start, int image_size,
|
||||
int hdr_size)
|
||||
@@ -2559,7 +2563,6 @@ static void be_netdev_init(struct net_device *netdev)
|
||||
netif_napi_add(netdev, &adapter->tx_eq.napi, be_poll_tx_mcc,
|
||||
BE_NAPI_WEIGHT);
|
||||
|
||||
netif_carrier_off(netdev);
|
||||
netif_stop_queue(netdev);
|
||||
}
|
||||
|
||||
@@ -2715,6 +2718,8 @@ static void __devexit be_remove(struct pci_dev *pdev)
|
||||
if (!adapter)
|
||||
return;
|
||||
|
||||
cancel_delayed_work_sync(&adapter->work);
|
||||
|
||||
unregister_netdev(adapter->netdev);
|
||||
|
||||
be_clear(adapter);
|
||||
@@ -2868,8 +2873,10 @@ static int __devinit be_probe(struct pci_dev *pdev,
|
||||
status = register_netdev(netdev);
|
||||
if (status != 0)
|
||||
goto unsetup;
|
||||
netif_carrier_off(netdev);
|
||||
|
||||
dev_info(&pdev->dev, "%s port %d\n", nic_name(pdev), adapter->port_num);
|
||||
schedule_delayed_work(&adapter->work, msecs_to_jiffies(100));
|
||||
return 0;
|
||||
|
||||
unsetup:
|
||||
|
||||
@@ -1288,15 +1288,11 @@ struct bnx2x_func_init_params {
|
||||
|
||||
#define WAIT_RAMROD_POLL 0x01
|
||||
#define WAIT_RAMROD_COMMON 0x02
|
||||
int bnx2x_wait_ramrod(struct bnx2x *bp, int state, int idx,
|
||||
int *state_p, int flags);
|
||||
|
||||
/* dmae */
|
||||
void bnx2x_read_dmae(struct bnx2x *bp, u32 src_addr, u32 len32);
|
||||
void bnx2x_write_dmae(struct bnx2x *bp, dma_addr_t dma_addr, u32 dst_addr,
|
||||
u32 len32);
|
||||
void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr,
|
||||
u32 addr, u32 len);
|
||||
void bnx2x_post_dmae(struct bnx2x *bp, struct dmae_command *dmae, int idx);
|
||||
u32 bnx2x_dmae_opcode_add_comp(u32 opcode, u8 comp_type);
|
||||
u32 bnx2x_dmae_opcode_clr_src_reset(u32 opcode);
|
||||
@@ -1307,7 +1303,6 @@ int bnx2x_get_gpio(struct bnx2x *bp, int gpio_num, u8 port);
|
||||
int bnx2x_set_gpio(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
|
||||
int bnx2x_set_gpio_int(struct bnx2x *bp, int gpio_num, u32 mode, u8 port);
|
||||
u32 bnx2x_fw_command(struct bnx2x *bp, u32 command, u32 param);
|
||||
void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val);
|
||||
|
||||
void bnx2x_calc_fc_adv(struct bnx2x *bp);
|
||||
int bnx2x_sp_post(struct bnx2x *bp, int command, int cid,
|
||||
|
||||
@@ -25,6 +25,7 @@
|
||||
|
||||
#include "bnx2x_init.h"
|
||||
|
||||
static int bnx2x_setup_irqs(struct bnx2x *bp);
|
||||
|
||||
/* free skb in the packet ring at pos idx
|
||||
* return idx of last bd freed
|
||||
@@ -2187,7 +2188,7 @@ int bnx2x_change_mac_addr(struct net_device *dev, void *p)
|
||||
}
|
||||
|
||||
|
||||
int bnx2x_setup_irqs(struct bnx2x *bp)
|
||||
static int bnx2x_setup_irqs(struct bnx2x *bp)
|
||||
{
|
||||
int rc = 0;
|
||||
if (bp->flags & USING_MSIX_FLAG) {
|
||||
|
||||
@@ -116,13 +116,6 @@ void bnx2x_setup_cnic_irq_info(struct bnx2x *bp);
|
||||
*/
|
||||
void bnx2x_int_enable(struct bnx2x *bp);
|
||||
|
||||
/**
|
||||
* Disable HW interrupts.
|
||||
*
|
||||
* @param bp
|
||||
*/
|
||||
void bnx2x_int_disable(struct bnx2x *bp);
|
||||
|
||||
/**
|
||||
* Disable interrupts. This function ensures that there are no
|
||||
* ISRs or SP DPCs (sp_task) are running after it returns.
|
||||
@@ -191,17 +184,6 @@ void bnx2x_free_mem(struct bnx2x *bp);
|
||||
int bnx2x_setup_client(struct bnx2x *bp, struct bnx2x_fastpath *fp,
|
||||
int is_leading);
|
||||
|
||||
/**
|
||||
* Bring down an eth client.
|
||||
*
|
||||
* @param bp
|
||||
* @param p
|
||||
*
|
||||
* @return int
|
||||
*/
|
||||
int bnx2x_stop_fw_client(struct bnx2x *bp,
|
||||
struct bnx2x_client_ramrod_params *p);
|
||||
|
||||
/**
|
||||
* Set number of queues according to mode
|
||||
*
|
||||
@@ -250,34 +232,6 @@ int bnx2x_release_hw_lock(struct bnx2x *bp, u32 resource);
|
||||
*/
|
||||
void bnx2x_set_eth_mac(struct bnx2x *bp, int set);
|
||||
|
||||
#ifdef BCM_CNIC
|
||||
/**
|
||||
* Set iSCSI MAC(s) at the next enties in the CAM after the ETH
|
||||
* MAC(s). The function will wait until the ramrod completion
|
||||
* returns.
|
||||
*
|
||||
* @param bp driver handle
|
||||
* @param set set or clear the CAM entry
|
||||
*
|
||||
* @return 0 if cussess, -ENODEV if ramrod doesn't return.
|
||||
*/
|
||||
int bnx2x_set_iscsi_eth_mac_addr(struct bnx2x *bp, int set);
|
||||
#endif
|
||||
|
||||
/**
|
||||
* Initialize status block in FW and HW
|
||||
*
|
||||
* @param bp driver handle
|
||||
* @param dma_addr_t mapping
|
||||
* @param int sb_id
|
||||
* @param int vfid
|
||||
* @param u8 vf_valid
|
||||
* @param int fw_sb_id
|
||||
* @param int igu_sb_id
|
||||
*/
|
||||
void bnx2x_init_sb(struct bnx2x *bp, dma_addr_t mapping, int vfid,
|
||||
u8 vf_valid, int fw_sb_id, int igu_sb_id);
|
||||
|
||||
/**
|
||||
* Set MAC filtering configurations.
|
||||
*
|
||||
@@ -326,7 +280,6 @@ void bnx2x_sp_event(struct bnx2x_fastpath *fp, union eth_rx_cqe *rr_cqe);
|
||||
* @return int
|
||||
*/
|
||||
int bnx2x_func_start(struct bnx2x *bp);
|
||||
int bnx2x_func_stop(struct bnx2x *bp);
|
||||
|
||||
/**
|
||||
* Prepare ILT configurations according to current driver
|
||||
@@ -395,14 +348,6 @@ int bnx2x_enable_msix(struct bnx2x *bp);
|
||||
*/
|
||||
int bnx2x_enable_msi(struct bnx2x *bp);
|
||||
|
||||
/**
|
||||
* Request IRQ vectors from OS.
|
||||
*
|
||||
* @param bp
|
||||
*
|
||||
* @return int
|
||||
*/
|
||||
int bnx2x_setup_irqs(struct bnx2x *bp);
|
||||
/**
|
||||
* NAPI callback
|
||||
*
|
||||
|
||||
@@ -16,7 +16,9 @@
|
||||
#define BNX2X_INIT_OPS_H
|
||||
|
||||
static int bnx2x_gunzip(struct bnx2x *bp, const u8 *zbuf, int len);
|
||||
|
||||
static void bnx2x_reg_wr_ind(struct bnx2x *bp, u32 addr, u32 val);
|
||||
static void bnx2x_write_dmae_phys_len(struct bnx2x *bp, dma_addr_t phys_addr,
|
||||
u32 addr, u32 len);
|
||||
|
||||
static void bnx2x_init_str_wr(struct bnx2x *bp, u32 addr, const u32 *data,
|
||||
u32 len)
|
||||
@@ -589,7 +591,7 @@ static int bnx2x_ilt_client_mem_op(struct bnx2x *bp, int cli_num, u8 memop)
|
||||
return rc;
|
||||
}
|
||||
|
||||
int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop)
|
||||
static int bnx2x_ilt_mem_op(struct bnx2x *bp, u8 memop)
|
||||
{
|
||||
int rc = bnx2x_ilt_client_mem_op(bp, ILT_CLIENT_CDU, memop);
|
||||
if (!rc)
|
||||
@@ -635,7 +637,7 @@ static void bnx2x_ilt_line_init_op(struct bnx2x *bp, struct bnx2x_ilt *ilt,
|
||||
}
|
||||
}
|
||||
|
||||
void bnx2x_ilt_boundry_init_op(struct bnx2x *bp,
|
||||
static void bnx2x_ilt_boundry_init_op(struct bnx2x *bp,
|
||||
struct ilt_client_info *ilt_cli,
|
||||
u32 ilt_start, u8 initop)
|
||||
{
|
||||
@@ -688,8 +690,10 @@ void bnx2x_ilt_boundry_init_op(struct bnx2x *bp,
|
||||
}
|
||||
}
|
||||
|
||||
void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt,
|
||||
struct ilt_client_info *ilt_cli, u8 initop)
|
||||
static void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp,
|
||||
struct bnx2x_ilt *ilt,
|
||||
struct ilt_client_info *ilt_cli,
|
||||
u8 initop)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -703,7 +707,7 @@ void bnx2x_ilt_client_init_op_ilt(struct bnx2x *bp, struct bnx2x_ilt *ilt,
|
||||
bnx2x_ilt_boundry_init_op(bp, ilt_cli, ilt->start_line, initop);
|
||||
}
|
||||
|
||||
void bnx2x_ilt_client_init_op(struct bnx2x *bp,
|
||||
static void bnx2x_ilt_client_init_op(struct bnx2x *bp,
|
||||
struct ilt_client_info *ilt_cli, u8 initop)
|
||||
{
|
||||
struct bnx2x_ilt *ilt = BP_ILT(bp);
|
||||
@@ -720,7 +724,7 @@ static void bnx2x_ilt_client_id_init_op(struct bnx2x *bp,
|
||||
bnx2x_ilt_client_init_op(bp, ilt_cli, initop);
|
||||
}
|
||||
|
||||
void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop)
|
||||
static void bnx2x_ilt_init_op(struct bnx2x *bp, u8 initop)
|
||||
{
|
||||
bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_CDU, initop);
|
||||
bnx2x_ilt_client_id_init_op(bp, ILT_CLIENT_QM, initop);
|
||||
@@ -752,7 +756,7 @@ static void bnx2x_ilt_init_client_psz(struct bnx2x *bp, int cli_num,
|
||||
* called during init common stage, ilt clients should be initialized
|
||||
* prioir to calling this function
|
||||
*/
|
||||
void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop)
|
||||
static void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop)
|
||||
{
|
||||
bnx2x_ilt_init_client_psz(bp, ILT_CLIENT_CDU,
|
||||
PXP2_REG_RQ_CDU_P_SIZE, initop);
|
||||
@@ -772,7 +776,7 @@ void bnx2x_ilt_init_page_size(struct bnx2x *bp, u8 initop)
|
||||
#define QM_INIT(cid_cnt) (cid_cnt > QM_INIT_MIN_CID_COUNT)
|
||||
|
||||
/* called during init port stage */
|
||||
void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count,
|
||||
static void bnx2x_qm_init_cid_count(struct bnx2x *bp, int qm_cid_count,
|
||||
u8 initop)
|
||||
{
|
||||
int port = BP_PORT(bp);
|
||||
@@ -814,7 +818,7 @@ static void bnx2x_qm_set_ptr_table(struct bnx2x *bp, int qm_cid_count)
|
||||
}
|
||||
|
||||
/* called during init common stage */
|
||||
void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count,
|
||||
static void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count,
|
||||
u8 initop)
|
||||
{
|
||||
if (!QM_INIT(qm_cid_count))
|
||||
@@ -836,7 +840,7 @@ void bnx2x_qm_init_ptr_table(struct bnx2x *bp, int qm_cid_count,
|
||||
****************************************************************************/
|
||||
|
||||
/* called during init func stage */
|
||||
void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2,
|
||||
static void bnx2x_src_init_t2(struct bnx2x *bp, struct src_ent *t2,
|
||||
dma_addr_t t2_mapping, int src_cid_count)
|
||||
{
|
||||
int i;
|
||||
|
||||
@@ -181,6 +181,12 @@
|
||||
(_bank + (_addr & 0xf)), \
|
||||
_val)
|
||||
|
||||
static u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy,
|
||||
u8 devad, u16 reg, u16 *ret_val);
|
||||
|
||||
static u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
|
||||
u8 devad, u16 reg, u16 val);
|
||||
|
||||
static u32 bnx2x_bits_en(struct bnx2x *bp, u32 reg, u32 bits)
|
||||
{
|
||||
u32 val = REG_RD(bp, reg);
|
||||
@@ -594,7 +600,7 @@ static u8 bnx2x_bmac2_enable(struct link_params *params,
|
||||
return 0;
|
||||
}
|
||||
|
||||
u8 bnx2x_bmac_enable(struct link_params *params,
|
||||
static u8 bnx2x_bmac_enable(struct link_params *params,
|
||||
struct link_vars *vars,
|
||||
u8 is_lb)
|
||||
{
|
||||
@@ -2537,122 +2543,6 @@ static void bnx2x_set_xgxs_loopback(struct bnx2x_phy *phy,
|
||||
}
|
||||
}
|
||||
|
||||
/*
|
||||
*------------------------------------------------------------------------
|
||||
* bnx2x_override_led_value -
|
||||
*
|
||||
* Override the led value of the requested led
|
||||
*
|
||||
*------------------------------------------------------------------------
|
||||
*/
|
||||
u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port,
|
||||
u32 led_idx, u32 value)
|
||||
{
|
||||
u32 reg_val;
|
||||
|
||||
/* If port 0 then use EMAC0, else use EMAC1*/
|
||||
u32 emac_base = (port) ? GRCBASE_EMAC1 : GRCBASE_EMAC0;
|
||||
|
||||
DP(NETIF_MSG_LINK,
|
||||
"bnx2x_override_led_value() port %x led_idx %d value %d\n",
|
||||
port, led_idx, value);
|
||||
|
||||
switch (led_idx) {
|
||||
case 0: /* 10MB led */
|
||||
/* Read the current value of the LED register in
|
||||
the EMAC block */
|
||||
reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED);
|
||||
/* Set the OVERRIDE bit to 1 */
|
||||
reg_val |= EMAC_LED_OVERRIDE;
|
||||
/* If value is 1, set the 10M_OVERRIDE bit,
|
||||
otherwise reset it.*/
|
||||
reg_val = (value == 1) ? (reg_val | EMAC_LED_10MB_OVERRIDE) :
|
||||
(reg_val & ~EMAC_LED_10MB_OVERRIDE);
|
||||
REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val);
|
||||
break;
|
||||
case 1: /*100MB led */
|
||||
/*Read the current value of the LED register in
|
||||
the EMAC block */
|
||||
reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED);
|
||||
/* Set the OVERRIDE bit to 1 */
|
||||
reg_val |= EMAC_LED_OVERRIDE;
|
||||
/* If value is 1, set the 100M_OVERRIDE bit,
|
||||
otherwise reset it.*/
|
||||
reg_val = (value == 1) ? (reg_val | EMAC_LED_100MB_OVERRIDE) :
|
||||
(reg_val & ~EMAC_LED_100MB_OVERRIDE);
|
||||
REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val);
|
||||
break;
|
||||
case 2: /* 1000MB led */
|
||||
/* Read the current value of the LED register in the
|
||||
EMAC block */
|
||||
reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED);
|
||||
/* Set the OVERRIDE bit to 1 */
|
||||
reg_val |= EMAC_LED_OVERRIDE;
|
||||
/* If value is 1, set the 1000M_OVERRIDE bit, otherwise
|
||||
reset it. */
|
||||
reg_val = (value == 1) ? (reg_val | EMAC_LED_1000MB_OVERRIDE) :
|
||||
(reg_val & ~EMAC_LED_1000MB_OVERRIDE);
|
||||
REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val);
|
||||
break;
|
||||
case 3: /* 2500MB led */
|
||||
/* Read the current value of the LED register in the
|
||||
EMAC block*/
|
||||
reg_val = REG_RD(bp, emac_base + EMAC_REG_EMAC_LED);
|
||||
/* Set the OVERRIDE bit to 1 */
|
||||
reg_val |= EMAC_LED_OVERRIDE;
|
||||
/* If value is 1, set the 2500M_OVERRIDE bit, otherwise
|
||||
reset it.*/
|
||||
reg_val = (value == 1) ? (reg_val | EMAC_LED_2500MB_OVERRIDE) :
|
||||
(reg_val & ~EMAC_LED_2500MB_OVERRIDE);
|
||||
REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val);
|
||||
break;
|
||||
case 4: /*10G led */
|
||||
if (port == 0) {
|
||||
REG_WR(bp, NIG_REG_LED_10G_P0,
|
||||
value);
|
||||
} else {
|
||||
REG_WR(bp, NIG_REG_LED_10G_P1,
|
||||
value);
|
||||
}
|
||||
break;
|
||||
case 5: /* TRAFFIC led */
|
||||
/* Find if the traffic control is via BMAC or EMAC */
|
||||
if (port == 0)
|
||||
reg_val = REG_RD(bp, NIG_REG_NIG_EMAC0_EN);
|
||||
else
|
||||
reg_val = REG_RD(bp, NIG_REG_NIG_EMAC1_EN);
|
||||
|
||||
/* Override the traffic led in the EMAC:*/
|
||||
if (reg_val == 1) {
|
||||
/* Read the current value of the LED register in
|
||||
the EMAC block */
|
||||
reg_val = REG_RD(bp, emac_base +
|
||||
EMAC_REG_EMAC_LED);
|
||||
/* Set the TRAFFIC_OVERRIDE bit to 1 */
|
||||
reg_val |= EMAC_LED_OVERRIDE;
|
||||
/* If value is 1, set the TRAFFIC bit, otherwise
|
||||
reset it.*/
|
||||
reg_val = (value == 1) ? (reg_val | EMAC_LED_TRAFFIC) :
|
||||
(reg_val & ~EMAC_LED_TRAFFIC);
|
||||
REG_WR(bp, emac_base + EMAC_REG_EMAC_LED, reg_val);
|
||||
} else { /* Override the traffic led in the BMAC: */
|
||||
REG_WR(bp, NIG_REG_LED_CONTROL_OVERRIDE_TRAFFIC_P0
|
||||
+ port*4, 1);
|
||||
REG_WR(bp, NIG_REG_LED_CONTROL_TRAFFIC_P0 + port*4,
|
||||
value);
|
||||
}
|
||||
break;
|
||||
default:
|
||||
DP(NETIF_MSG_LINK,
|
||||
"bnx2x_override_led_value() unknown led index %d "
|
||||
"(should be 0-5)\n", led_idx);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
||||
u8 bnx2x_set_led(struct link_params *params,
|
||||
struct link_vars *vars, u8 mode, u32 speed)
|
||||
{
|
||||
@@ -4099,7 +3989,7 @@ static u8 bnx2x_8727_read_sfp_module_eeprom(struct bnx2x_phy *phy,
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,
|
||||
static u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,
|
||||
struct link_params *params, u16 addr,
|
||||
u8 byte_cnt, u8 *o_buf)
|
||||
{
|
||||
@@ -6819,13 +6709,6 @@ u8 bnx2x_phy_probe(struct link_params *params)
|
||||
return 0;
|
||||
}
|
||||
|
||||
u32 bnx2x_supported_attr(struct link_params *params, u8 phy_idx)
|
||||
{
|
||||
if (phy_idx < params->num_phys)
|
||||
return params->phy[phy_idx].supported;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void set_phy_vars(struct link_params *params)
|
||||
{
|
||||
struct bnx2x *bp = params->bp;
|
||||
|
||||
@@ -279,12 +279,6 @@ u8 bnx2x_phy_read(struct link_params *params, u8 phy_addr,
|
||||
|
||||
u8 bnx2x_phy_write(struct link_params *params, u8 phy_addr,
|
||||
u8 devad, u16 reg, u16 val);
|
||||
|
||||
u8 bnx2x_cl45_read(struct bnx2x *bp, struct bnx2x_phy *phy,
|
||||
u8 devad, u16 reg, u16 *ret_val);
|
||||
|
||||
u8 bnx2x_cl45_write(struct bnx2x *bp, struct bnx2x_phy *phy,
|
||||
u8 devad, u16 reg, u16 val);
|
||||
/* Reads the link_status from the shmem,
|
||||
and update the link vars accordingly */
|
||||
void bnx2x_link_status_update(struct link_params *input,
|
||||
@@ -304,8 +298,6 @@ u8 bnx2x_set_led(struct link_params *params, struct link_vars *vars,
|
||||
#define LED_MODE_OPER 2
|
||||
#define LED_MODE_FRONT_PANEL_OFF 3
|
||||
|
||||
u8 bnx2x_override_led_value(struct bnx2x *bp, u8 port, u32 led_idx, u32 value);
|
||||
|
||||
/* bnx2x_handle_module_detect_int should be called upon module detection
|
||||
interrupt */
|
||||
void bnx2x_handle_module_detect_int(struct link_params *params);
|
||||
@@ -325,19 +317,12 @@ void bnx2x_ext_phy_hw_reset(struct bnx2x *bp, u8 port);
|
||||
/* Reset the external of SFX7101 */
|
||||
void bnx2x_sfx7101_sp_sw_reset(struct bnx2x *bp, struct bnx2x_phy *phy);
|
||||
|
||||
u8 bnx2x_read_sfp_module_eeprom(struct bnx2x_phy *phy,
|
||||
struct link_params *params, u16 addr,
|
||||
u8 byte_cnt, u8 *o_buf);
|
||||
|
||||
void bnx2x_hw_reset_phy(struct link_params *params);
|
||||
|
||||
/* Checks if HW lock is required for this phy/board type */
|
||||
u8 bnx2x_hw_lock_required(struct bnx2x *bp, u32 shmem_base,
|
||||
u32 shmem2_base);
|
||||
|
||||
/* Returns the aggregative supported attributes of the phys on board */
|
||||
u32 bnx2x_supported_attr(struct link_params *params, u8 phy_idx);
|
||||
|
||||
/* Check swap bit and adjust PHY order */
|
||||
u32 bnx2x_phy_selection(struct link_params *params);
|
||||
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user