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[MIPS] TRACE_IRQFLAGS_SUPPORT support.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Ralf Baechle
@@ -22,8 +22,8 @@
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#ifndef _ASM_ATOMIC_H
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#define _ASM_ATOMIC_H
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#include <linux/irqflags.h>
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#include <asm/cpu-features.h>
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#include <asm/interrupt.h>
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#include <asm/war.h>
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typedef struct { volatile int counter; } atomic_t;
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@@ -31,7 +31,7 @@
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#ifdef __KERNEL__
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#include <asm/interrupt.h>
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#include <linux/irqflags.h>
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#include <asm/sgidefs.h>
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#include <asm/war.h>
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@@ -8,13 +8,15 @@
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* Copyright (C) 1999 Silicon Graphics
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* Copyright (C) 2000 MIPS Technologies, Inc.
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*/
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#ifndef _ASM_INTERRUPT_H
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#define _ASM_INTERRUPT_H
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#ifndef _ASM_IRQFLAGS_H
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#define _ASM_IRQFLAGS_H
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#ifndef __ASSEMBLY__
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#include <asm/hazards.h>
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__asm__ (
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" .macro local_irq_enable \n"
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" .macro raw_local_irq_enable \n"
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" .set push \n"
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" .set reorder \n"
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" .set noat \n"
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@@ -35,10 +37,10 @@ __asm__ (
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" .set pop \n"
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" .endm");
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static inline void local_irq_enable(void)
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static inline void raw_local_irq_enable(void)
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{
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__asm__ __volatile__(
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"local_irq_enable"
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"raw_local_irq_enable"
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: /* no outputs */
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: /* no inputs */
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: "memory");
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@@ -63,7 +65,7 @@ static inline void local_irq_enable(void)
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* Workaround: mask EXL bit of the result or place a nop before mfc0.
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*/
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__asm__ (
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" .macro local_irq_disable\n"
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" .macro raw_local_irq_disable\n"
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" .set push \n"
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" .set noat \n"
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#ifdef CONFIG_MIPS_MT_SMTC
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@@ -84,17 +86,17 @@ __asm__ (
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" .set pop \n"
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" .endm \n");
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static inline void local_irq_disable(void)
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static inline void raw_local_irq_disable(void)
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{
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__asm__ __volatile__(
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"local_irq_disable"
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"raw_local_irq_disable"
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: /* no outputs */
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: /* no inputs */
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: "memory");
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}
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__asm__ (
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" .macro local_save_flags flags \n"
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" .macro raw_local_save_flags flags \n"
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" .set push \n"
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" .set reorder \n"
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#ifdef CONFIG_MIPS_MT_SMTC
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@@ -105,13 +107,13 @@ __asm__ (
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" .set pop \n"
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" .endm \n");
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#define local_save_flags(x) \
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#define raw_local_save_flags(x) \
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__asm__ __volatile__( \
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"local_save_flags %0" \
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"raw_local_save_flags %0" \
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: "=r" (x))
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__asm__ (
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" .macro local_irq_save result \n"
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" .macro raw_local_irq_save result \n"
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" .set push \n"
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" .set reorder \n"
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" .set noat \n"
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@@ -135,15 +137,15 @@ __asm__ (
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" .set pop \n"
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" .endm \n");
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#define local_irq_save(x) \
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#define raw_local_irq_save(x) \
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__asm__ __volatile__( \
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"local_irq_save\t%0" \
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"raw_local_irq_save\t%0" \
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: "=r" (x) \
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: /* no inputs */ \
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: "memory")
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__asm__ (
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" .macro local_irq_restore flags \n"
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" .macro raw_local_irq_restore flags \n"
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" .set push \n"
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" .set noreorder \n"
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" .set noat \n"
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@@ -182,40 +184,42 @@ __asm__ (
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" .set pop \n"
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" .endm \n");
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#define local_irq_restore(flags) \
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#define raw_local_irq_restore(flags) \
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do { \
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unsigned long __tmp1; \
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\
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__asm__ __volatile__( \
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"local_irq_restore\t%0" \
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"raw_local_irq_restore\t%0" \
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: "=r" (__tmp1) \
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: "0" (flags) \
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: "memory"); \
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} while(0)
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static inline int irqs_disabled(void)
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static inline int raw_irqs_disabled_flags(unsigned long flags)
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{
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#ifdef CONFIG_MIPS_MT_SMTC
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/*
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* SMTC model uses TCStatus.IXMT to disable interrupts for a thread/CPU
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*/
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unsigned long __result;
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__asm__ __volatile__(
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" .set noreorder \n"
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" mfc0 %0, $2, 1 \n"
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" andi %0, 0x400 \n"
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" slt %0, $0, %0 \n"
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" .set reorder \n"
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: "=r" (__result));
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return __result;
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return flags & 0x400;
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#else
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unsigned long flags;
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local_save_flags(flags);
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return !(flags & 1);
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#endif
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}
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#endif /* _ASM_INTERRUPT_H */
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#endif
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/*
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* Do the CPU's IRQ-state tracing from assembly code.
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*/
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#ifdef CONFIG_TRACE_IRQFLAGS
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# define TRACE_IRQS_ON \
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jal trace_hardirqs_on
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# define TRACE_IRQS_OFF \
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jal trace_hardirqs_off
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#else
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# define TRACE_IRQS_ON
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# define TRACE_IRQS_OFF
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#endif
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#endif /* _ASM_IRQFLAGS_H */
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@@ -1417,7 +1417,7 @@ change_c0_##name(unsigned int change, unsigned int new) \
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#else /* SMTC versions that manage MT scheduling */
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#include <asm/interrupt.h>
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#include <linux/irqflags.h>
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/*
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* This is a duplicate of dmt() in mipsmtregs.h to avoid problems with
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@@ -13,13 +13,13 @@
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#define _ASM_SYSTEM_H
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#include <linux/types.h>
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#include <linux/irqflags.h>
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#include <asm/addrspace.h>
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#include <asm/cpu-features.h>
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#include <asm/dsp.h>
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#include <asm/ptrace.h>
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#include <asm/war.h>
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#include <asm/interrupt.h>
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/*
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* read_barrier_depends - Flush all pending reads that subsequents reads
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