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[ARM] Remove EPXA10DB machine support
EPXA10DB seems to be uncared for: - the "PLD" code has never been merged - no one has reported that this platform has been broken since at least 2.6.10 - interest seems to have dried up around March 2003. Therefore, remove EPXA10DB support. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
committed by
Russell King
Russell King
parent
b9abaa3fb7
commit
0fec53a24a
@@ -103,13 +103,6 @@ config ARCH_EBSA110
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Ethernet interface, two PCMCIA sockets, two serial ports and a
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parallel port.
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config ARCH_CAMELOT
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bool "Epxa10db"
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help
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This enables support for Altera's Excalibur XA10 development board.
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If you would like to build your kernel to run on one of these boards
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then you must say 'Y' here. Otherwise say 'N'
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config ARCH_FOOTBRIDGE
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bool "FootBridge"
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select FOOTBRIDGE
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@@ -221,8 +214,6 @@ endchoice
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source "arch/arm/mach-clps711x/Kconfig"
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source "arch/arm/mach-epxa10db/Kconfig"
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source "arch/arm/mach-footbridge/Kconfig"
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source "arch/arm/mach-integrator/Kconfig"
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@@ -84,7 +84,6 @@ endif
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machine-$(CONFIG_ARCH_PXA) := pxa
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machine-$(CONFIG_ARCH_L7200) := l7200
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machine-$(CONFIG_ARCH_INTEGRATOR) := integrator
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machine-$(CONFIG_ARCH_CAMELOT) := epxa10db
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textofs-$(CONFIG_ARCH_CLPS711X) := 0x00028000
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machine-$(CONFIG_ARCH_CLPS711X) := clps711x
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machine-$(CONFIG_ARCH_IOP3XX) := iop3xx
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@@ -21,10 +21,6 @@ ifeq ($(CONFIG_ARCH_SHARK),y)
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OBJS += head-shark.o ofw-shark.o
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endif
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ifeq ($(CONFIG_ARCH_CAMELOT),y)
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OBJS += head-epxa10db.o
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endif
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ifeq ($(CONFIG_ARCH_L7200),y)
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OBJS += head-l7200.o
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endif
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@@ -1,5 +0,0 @@
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#include <asm/mach-types.h>
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#include <asm/arch/excalibur.h>
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.section ".start", "ax"
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mov r7, #MACH_TYPE_CAMELOT
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File diff suppressed because it is too large
Load Diff
@@ -1,23 +0,0 @@
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if ARCH_CAMELOT
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menu "Epxa10db"
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comment "PLD hotswap support"
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config PLD
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bool
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default y
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config PLD_HOTSWAP
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bool "Support for PLD device hotplugging (experimental)"
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depends on EXPERIMENTAL
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help
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This enables support for the dynamic loading and configuration of
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compatible drivers when the contents of the PLD are changed. This
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is still experimental and requires configuration tools which are
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not yet generally available. Say N here. You must enable the kernel
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module loader for this feature to work.
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endmenu
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endif
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@@ -1,11 +0,0 @@
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#
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# Makefile for the linux kernel.
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#
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# Object file lists.
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obj-y := arch.o irq.o mm.o time.o
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obj-m :=
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obj-n :=
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obj- :=
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@@ -1,2 +0,0 @@
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zreladdr-y := 0x00008000
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@@ -1,74 +0,0 @@
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/*
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* linux/arch/arm/mach-epxa10db/arch.c
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*
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* Copyright (C) 2000 Deep Blue Solutions Ltd
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* Copyright (C) 2001 Altera Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/types.h>
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#include <linux/init.h>
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#include <linux/serial_8250.h>
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#include <asm/hardware.h>
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#include <asm/setup.h>
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#include <asm/mach-types.h>
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#include <asm/mach/arch.h>
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static struct plat_serial8250_port serial_platform_data[] = {
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{
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.iobase = 0x3f8,
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.irq = IRQ_UARTINT0,
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#error FIXME
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.uartclk = 0,
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.regshift = 0,
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.iotype = UPIO_PORT,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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},
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{
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.iobase = 0x2f8,
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.irq = IRQ_UARTINT1,
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#error FIXME
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.uartclk = 0,
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.regshift = 0,
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.iotype = UPIO_PORT,
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.flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
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},
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{ },
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};
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static struct platform_device serial_device = {
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.name = "serial8250",
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.id = PLAT8250_DEV_PLATFORM,
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.dev = {
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.platform_data = serial_platform_data,
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},
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};
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extern void epxa10db_map_io(void);
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extern void epxa10db_init_irq(void);
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extern struct sys_timer epxa10db_timer;
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MACHINE_START(CAMELOT, "Altera Epxa10db")
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/* Maintainer: Altera Corporation */
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.phys_ram = 0x00000000,
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.phys_io = 0x7fffc000,
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.io_pg_offst = ((0xffffc000) >> 18) & 0xfffc,
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.map_io = epxa10db_map_io,
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.init_irq = epxa10db_init_irq,
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.timer = &epxa10db_timer,
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MACHINE_END
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@@ -1,82 +0,0 @@
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/*
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* linux/arch/arm/mach-epxa10db/irq.c
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*
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* Copyright (C) 2001 Altera Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/init.h>
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#include <linux/ioport.h>
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#include <linux/stddef.h>
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#include <linux/timer.h>
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#include <linux/list.h>
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#include <asm/io.h>
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#include <asm/hardware.h>
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#include <asm/irq.h>
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#include <asm/mach/irq.h>
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#include <asm/arch/platform.h>
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#include <asm/arch/int_ctrl00.h>
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static void epxa_mask_irq(unsigned int irq)
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{
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writel(1 << irq, INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
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}
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static void epxa_unmask_irq(unsigned int irq)
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{
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writel(1 << irq, INT_MS(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
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}
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static struct irqchip epxa_irq_chip = {
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.ack = epxa_mask_irq,
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.mask = epxa_mask_irq,
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.unmask = epxa_unmask_irq,
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};
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static struct resource irq_resource = {
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.name = "irq_handler",
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.start = IO_ADDRESS(EXC_INT_CTRL00_BASE),
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.end = IO_ADDRESS(INT_PRIORITY_FC(EXC_INT_CTRL00_BASE))+4,
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};
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void __init epxa10db_init_irq(void)
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{
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unsigned int i;
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request_resource(&iomem_resource, &irq_resource);
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/*
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* This bit sets up the interrupt controller using
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* the 6 PLD interrupts mode (the default) each
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* irqs is assigned a priority which is the same
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* as its interrupt number. This scheme is used because
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* its easy, but you may want to change it depending
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* on the contents of your PLD
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*/
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writel(3,INT_MODE(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
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for (i = 0; i < NR_IRQS; i++){
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writel(i+1, INT_PRIORITY_P0(IO_ADDRESS(EXC_INT_CTRL00_BASE)) + (4*i));
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set_irq_chip(i,&epxa_irq_chip);
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set_irq_handler(i,do_level_IRQ);
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set_irq_flags(i, IRQF_VALID | IRQF_PROBE);
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}
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/* Disable all interrupts */
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writel(-1,INT_MC(IO_ADDRESS(EXC_INT_CTRL00_BASE)));
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}
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@@ -1,71 +0,0 @@
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/*
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* linux/arch/arm/mach-epxa10db/mm.c
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*
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* MM routines for Altera'a Epxa10db board
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*
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* Copyright (C) 2001 Altera Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License as published by
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* the Free Software Foundation; either version 2 of the License, or
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* (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <asm/hardware.h>
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#include <asm/io.h>
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#include <asm/sizes.h>
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#include <asm/page.h>
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#include <asm/mach/map.h>
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/* Page table mapping for I/O region */
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static struct map_desc epxa10db_io_desc[] __initdata = {
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{
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.virtual = IO_ADDRESS(EXC_REGISTERS_BASE),
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.pfn = __phys_to_pfn(EXC_REGISTERS_BASE),
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.length = SZ_16K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(EXC_PLD_BLOCK0_BASE),
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.pfn = __phys_to_pfn(EXC_PLD_BLOCK0_BASE),
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.length = SZ_16K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(EXC_PLD_BLOCK1_BASE),
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.pfn =__phys_to_pfn(EXC_PLD_BLOCK1_BASE),
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.length = SZ_16K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(EXC_PLD_BLOCK2_BASE),
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.physical = __phys_to_pfn(EXC_PLD_BLOCK2_BASE),
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.length = SZ_16K,
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.type = MT_DEVICE
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}, {
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.virtual = IO_ADDRESS(EXC_PLD_BLOCK3_BASE),
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.pfn = __phys_to_pfn(EXC_PLD_BLOCK3_BASE),
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.length = SZ_16K,
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.type = MT_DEVICE
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}, {
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.virtual = FLASH_VADDR(EXC_EBI_BLOCK0_BASE),
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.pfn = __phys_to_pfn(EXC_EBI_BLOCK0_BASE),
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.length = SZ_16M,
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.type = MT_DEVICE
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}
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};
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void __init epxa10db_map_io(void)
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{
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iotable_init(epxa10db_io_desc, ARRAY_SIZE(epxa10db_io_desc));
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}
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@@ -1,78 +0,0 @@
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/*
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* linux/arch/arm/mach-epxa10db/time.c
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*
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* Copyright (C) 2000 Deep Blue Solutions
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* Copyright (C) 2001 Altera Corporation
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*
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* This program is free software; you can redistribute it and/or modify
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* it under the terms of the GNU General Public License version 2 as
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* published by the Free Software Foundation.
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*/
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#include <linux/kernel.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/sched.h>
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#include <asm/hardware.h>
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#include <asm/system.h>
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#include <asm/leds.h>
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#include <asm/mach/time.h>
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#define TIMER00_TYPE (volatile unsigned int*)
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#include <asm/arch/timer00.h>
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static int epxa10db_set_rtc(void)
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{
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return 1;
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}
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static int epxa10db_rtc_init(void)
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{
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set_rtc = epxa10db_set_rtc;
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return 0;
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}
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__initcall(epxa10db_rtc_init);
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/*
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* IRQ handler for the timer
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*/
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static irqreturn_t
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epxa10db_timer_interrupt(int irq, void *dev_id, struct pt_regs *regs)
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{
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write_seqlock(&xtime_lock);
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// ...clear the interrupt
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*TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))|=TIMER0_CR_CI_MSK;
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timer_tick(regs);
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write_sequnlock(&xtime_lock);
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return IRQ_HANDLED;
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}
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static struct irqaction epxa10db_timer_irq = {
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.name = "Excalibur Timer Tick",
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.flags = SA_INTERRUPT | SA_TIMER,
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.handler = epxa10db_timer_interrupt,
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};
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/*
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* Set up timer interrupt, and return the current time in seconds.
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*/
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static void __init epxa10db_timer_init(void)
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{
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/* Start the timer */
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*TIMER0_LIMIT(IO_ADDRESS(EXC_TIMER00_BASE))=(unsigned int)(EXC_AHB2_CLK_FREQUENCY/200);
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*TIMER0_PRESCALE(IO_ADDRESS(EXC_TIMER00_BASE))=1;
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*TIMER0_CR(IO_ADDRESS(EXC_TIMER00_BASE))=TIMER0_CR_IE_MSK | TIMER0_CR_S_MSK;
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setup_irq(IRQ_TIMER0, &epxa10db_timer_irq);
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}
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struct sys_timer epxa10db_timer = {
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.init = epxa10db_timer_init,
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};
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+2
-2
@@ -83,8 +83,8 @@ config CPU_ARM920T
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# ARM922T
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config CPU_ARM922T
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bool "Support ARM922T processor" if ARCH_INTEGRATOR
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depends on ARCH_CAMELOT || ARCH_LH7A40X || ARCH_INTEGRATOR
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default y if ARCH_CAMELOT || ARCH_LH7A40X
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depends on ARCH_LH7A40X || ARCH_INTEGRATOR
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default y if ARCH_LH7A40X
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select CPU_32v4
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select CPU_ABRT_EV4T
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select CPU_CACHE_V4WT
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@@ -473,14 +473,6 @@ config MTD_IXP2000
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IXDP425 and Coyote. If you have an IXP2000 based board and
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would like to use the flash chips on it, say 'Y'.
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config MTD_EPXA10DB
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tristate "CFI Flash device mapped on Epxa10db"
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depends on MTD_CFI && MTD_PARTITIONS && ARCH_CAMELOT
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help
|
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This enables support for the flash devices on the Altera
|
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Excalibur XA10 Development Board. If you are building a kernel
|
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for on of these boards then you should say 'Y' otherwise say 'N'.
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config MTD_FORTUNET
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tristate "CFI Flash device mapped on the FortuNet board"
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depends on MTD_CFI && MTD_PARTITIONS && SA1100_FORTUNET
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@@ -15,7 +15,6 @@ obj-$(CONFIG_MTD_CFI_FLAGADM) += cfi_flagadm.o
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obj-$(CONFIG_MTD_CSTM_MIPS_IXX) += cstm_mips_ixx.o
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obj-$(CONFIG_MTD_DC21285) += dc21285.o
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obj-$(CONFIG_MTD_DILNETPC) += dilnetpc.o
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obj-$(CONFIG_MTD_EPXA10DB) += epxa10db-flash.o
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obj-$(CONFIG_MTD_IQ80310) += iq80310.o
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obj-$(CONFIG_MTD_L440GX) += l440gx.o
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obj-$(CONFIG_MTD_AMD76XROM) += amd76xrom.o
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|
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@@ -1,179 +0,0 @@
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/*
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* Flash memory access on EPXA based devices
|
||||
*
|
||||
* (C) 2000 Nicolas Pitre <nico@cam.org>
|
||||
* Copyright (C) 2001 Altera Corporation
|
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* Copyright (C) 2001 Red Hat, Inc.
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*
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* $Id: epxa10db-flash.c,v 1.15 2005/11/07 11:14:27 gleixner Exp $
|
||||
*
|
||||
* This program is free software; you can redistribute it and/or modify
|
||||
* it under the terms of the GNU General Public License as published by
|
||||
* the Free Software Foundation; either version 2 of the License, or
|
||||
* (at your option) any later version.
|
||||
*
|
||||
* This program is distributed in the hope that it will be useful,
|
||||
* but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
||||
* GNU General Public License for more details.
|
||||
*
|
||||
* You should have received a copy of the GNU General Public License
|
||||
* along with this program; if not, write to the Free Software
|
||||
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
|
||||
*/
|
||||
|
||||
#include <linux/config.h>
|
||||
#include <linux/module.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/slab.h>
|
||||
|
||||
#include <linux/mtd/mtd.h>
|
||||
#include <linux/mtd/map.h>
|
||||
#include <linux/mtd/partitions.h>
|
||||
|
||||
#include <asm/io.h>
|
||||
#include <asm/hardware.h>
|
||||
|
||||
#ifdef CONFIG_EPXA10DB
|
||||
#define BOARD_NAME "EPXA10DB"
|
||||
#else
|
||||
#define BOARD_NAME "EPXA1DB"
|
||||
#endif
|
||||
|
||||
static int nr_parts = 0;
|
||||
static struct mtd_partition *parts;
|
||||
|
||||
static struct mtd_info *mymtd;
|
||||
|
||||
static int epxa_default_partitions(struct mtd_info *master, struct mtd_partition **pparts);
|
||||
|
||||
|
||||
static struct map_info epxa_map = {
|
||||
.name = "EPXA flash",
|
||||
.size = FLASH_SIZE,
|
||||
.bankwidth = 2,
|
||||
.phys = FLASH_START,
|
||||
};
|
||||
|
||||
static const char *probes[] = { "RedBoot", "afs", NULL };
|
||||
|
||||
static int __init epxa_mtd_init(void)
|
||||
{
|
||||
int i;
|
||||
|
||||
printk(KERN_NOTICE "%s flash device: 0x%x at 0x%x\n", BOARD_NAME, FLASH_SIZE, FLASH_START);
|
||||
|
||||
epxa_map.virt = ioremap(FLASH_START, FLASH_SIZE);
|
||||
if (!epxa_map.virt) {
|
||||
printk("Failed to ioremap %s flash\n",BOARD_NAME);
|
||||
return -EIO;
|
||||
}
|
||||
simple_map_init(&epxa_map);
|
||||
|
||||
mymtd = do_map_probe("cfi_probe", &epxa_map);
|
||||
if (!mymtd) {
|
||||
iounmap((void *)epxa_map.virt);
|
||||
return -ENXIO;
|
||||
}
|
||||
|
||||
mymtd->owner = THIS_MODULE;
|
||||
|
||||
/* Unlock the flash device. */
|
||||
if(mymtd->unlock){
|
||||
for (i=0; i<mymtd->numeraseregions;i++){
|
||||
int j;
|
||||
for(j=0;j<mymtd->eraseregions[i].numblocks;j++){
|
||||
mymtd->unlock(mymtd,mymtd->eraseregions[i].offset + j * mymtd->eraseregions[i].erasesize,mymtd->eraseregions[i].erasesize);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
#ifdef CONFIG_MTD_PARTITIONS
|
||||
nr_parts = parse_mtd_partitions(mymtd, probes, &parts, 0);
|
||||
|
||||
if (nr_parts > 0) {
|
||||
add_mtd_partitions(mymtd, parts, nr_parts);
|
||||
return 0;
|
||||
}
|
||||
#endif
|
||||
/* No recognised partitioning schemes found - use defaults */
|
||||
nr_parts = epxa_default_partitions(mymtd, &parts);
|
||||
if (nr_parts > 0) {
|
||||
add_mtd_partitions(mymtd, parts, nr_parts);
|
||||
return 0;
|
||||
}
|
||||
|
||||
/* If all else fails... */
|
||||
add_mtd_device(mymtd);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void __exit epxa_mtd_cleanup(void)
|
||||
{
|
||||
if (mymtd) {
|
||||
if (nr_parts)
|
||||
del_mtd_partitions(mymtd);
|
||||
else
|
||||
del_mtd_device(mymtd);
|
||||
map_destroy(mymtd);
|
||||
}
|
||||
if (epxa_map.virt) {
|
||||
iounmap((void *)epxa_map.virt);
|
||||
epxa_map.virt = 0;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
/*
|
||||
* This will do for now, once we decide which bootldr we're finally
|
||||
* going to use then we'll remove this function and do it properly
|
||||
*
|
||||
* Partions are currently (as offsets from base of flash):
|
||||
* 0x00000000 - 0x003FFFFF - bootloader (!)
|
||||
* 0x00400000 - 0x00FFFFFF - Flashdisk
|
||||
*/
|
||||
|
||||
static int __init epxa_default_partitions(struct mtd_info *master, struct mtd_partition **pparts)
|
||||
{
|
||||
struct mtd_partition *parts;
|
||||
int ret, i;
|
||||
int npartitions = 0;
|
||||
char *names;
|
||||
const char *name = "jffs";
|
||||
|
||||
printk("Using default partitions for %s\n",BOARD_NAME);
|
||||
npartitions=1;
|
||||
parts = kmalloc(npartitions*sizeof(*parts)+strlen(name), GFP_KERNEL);
|
||||
memzero(parts,npartitions*sizeof(*parts)+strlen(name));
|
||||
if (!parts) {
|
||||
ret = -ENOMEM;
|
||||
goto out;
|
||||
}
|
||||
i=0;
|
||||
names = (char *)&parts[npartitions];
|
||||
parts[i].name = names;
|
||||
names += strlen(name) + 1;
|
||||
strcpy(parts[i].name, name);
|
||||
|
||||
#ifdef CONFIG_EPXA10DB
|
||||
parts[i].size = FLASH_SIZE-0x00400000;
|
||||
parts[i].offset = 0x00400000;
|
||||
#else
|
||||
parts[i].size = FLASH_SIZE-0x00180000;
|
||||
parts[i].offset = 0x00180000;
|
||||
#endif
|
||||
|
||||
out:
|
||||
*pparts = parts;
|
||||
return npartitions;
|
||||
}
|
||||
|
||||
|
||||
module_init(epxa_mtd_init);
|
||||
module_exit(epxa_mtd_cleanup);
|
||||
|
||||
MODULE_AUTHOR("Clive Davies");
|
||||
MODULE_DESCRIPTION("Altera epxa mtd flash map");
|
||||
MODULE_LICENSE("GPL");
|
||||
@@ -31,16 +31,3 @@ config ARM_ETHERH
|
||||
help
|
||||
If you have an Acorn system with one of these network cards, you
|
||||
should say Y to this option if you wish to use it with Linux.
|
||||
|
||||
config ARM_ETHER00
|
||||
tristate "Altera Ether00 support"
|
||||
depends on NET_ETHERNET && ARM && ARCH_CAMELOT
|
||||
help
|
||||
This is the driver for Altera's ether00 ethernet mac IP core. Say
|
||||
Y here if you want to build support for this into the kernel. It
|
||||
is also available as a module (say M here) that can be inserted/
|
||||
removed from the kernel at the same time as the PLD is configured.
|
||||
If this driver is running on an epxa10 development board then it
|
||||
will generate a suitable hw address based on the board serial
|
||||
number (MTD support is required for this). Otherwise you will
|
||||
need to set a suitable hw address using ifconfig.
|
||||
|
||||
@@ -4,7 +4,6 @@
|
||||
#
|
||||
|
||||
obj-$(CONFIG_ARM_AM79C961A) += am79c961a.o
|
||||
obj-$(CONFIG_ARM_ETHER00) += ether00.o
|
||||
obj-$(CONFIG_ARM_ETHERH) += etherh.o
|
||||
obj-$(CONFIG_ARM_ETHER3) += ether3.o
|
||||
obj-$(CONFIG_ARM_ETHER1) += ether1.o
|
||||
|
||||
File diff suppressed because it is too large
Load Diff
@@ -359,29 +359,6 @@ config SERIAL_21285_CONSOLE
|
||||
your boot loader (lilo or loadlin) about how to pass options to the
|
||||
kernel at boot time.)
|
||||
|
||||
config SERIAL_UART00
|
||||
bool "Excalibur serial port (uart00) support"
|
||||
depends on ARM && ARCH_CAMELOT
|
||||
select SERIAL_CORE
|
||||
help
|
||||
Say Y here if you want to use the hard logic uart on Excalibur. This
|
||||
driver also supports soft logic implementations of this uart core.
|
||||
|
||||
config SERIAL_UART00_CONSOLE
|
||||
bool "Support for console on Excalibur serial port"
|
||||
depends on SERIAL_UART00
|
||||
select SERIAL_CORE_CONSOLE
|
||||
help
|
||||
Say Y here if you want to support a serial console on an Excalibur
|
||||
hard logic uart or uart00 IP core.
|
||||
|
||||
Even if you say Y here, the currently visible virtual console
|
||||
(/dev/tty0) will still be used as the system console by default, but
|
||||
you can alter that using a kernel command line option such as
|
||||
"console=ttyS1". (Try "man bootparam" or see the documentation of
|
||||
your boot loader (lilo or loadlin) about how to pass options to the
|
||||
kernel at boot time.)
|
||||
|
||||
config SERIAL_MPSC
|
||||
bool "Marvell MPSC serial port support"
|
||||
depends on PPC32 && MV64X60
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user