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[MIPS] SMTC: Interrupt mask backstop hack

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To support multiple TC microthreads acting as "CPUs" within a VPE,
VPE-wide interrupt mask bits must be specially manipulated during
interrupt handling. To support legacy drivers and interrupt controller
management code, SMTC has a "backstop" to track and if necessary restore
the interrupt mask. This has some performance impact on interrupt service
overhead. Disable it only if you know what you are doing.

Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Kevin D. Kissell
2007-07-12 16:21:08 +01:00
committed by Ralf Baechle
parent bd0765098b
commit 0db34215c7
4 changed files with 18 additions and 1 deletions
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include/asm-mips/irq.h
+1 -1
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@@ -24,7 +24,7 @@ static inline int irq_canonicalize(int irq)
#define irq_canonicalize(irq) (irq) /* Sane hardware, sane code ... */
#endif
#ifdef CONFIG_MIPS_MT_SMTC
#ifdef CONFIG_MIPS_MT_SMTC_IM_BACKSTOP
/*
* Clear interrupt mask handling "backstop" if irq_hwmask
* entry so indicates. This implies that the ack() or end()