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Merge tag 'powerpc-4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux
Pull powerpc updates from Michael Ellerman:
"Highlights:
- Major rework of Book3S 64-bit exception vectors (Nicholas Piggin)
- Use gas sections for arranging exception vectors et. al.
- Large set of TM cleanups and selftests (Cyril Bur)
- Enable transactional memory (TM) lazily for userspace (Cyril Bur)
- Support for XZ compression in the zImage wrapper (Oliver
O'Halloran)
- Add support for bpf constant blinding (Naveen N. Rao)
- Beginnings of upstream support for PA Semi Nemo motherboards
(Darren Stevens)
Fixes:
- Ensure .mem(init|exit).text are within _stext/_etext (Michael
Ellerman)
- xmon: Don't use ld on 32-bit (Michael Ellerman)
- vdso64: Use double word compare on pointers (Anton Blanchard)
- powerpc/nvram: Fix an incorrect partition merge (Pan Xinhui)
- powerpc: Fix usage of _PAGE_RO in hugepage (Christophe Leroy)
- powerpc/mm: Update FORCE_MAX_ZONEORDER range to allow hugetlb w/4K
(Aneesh Kumar K.V)
- Fix memory leak in queue_hotplug_event() error path (Andrew
Donnellan)
- Replay hypervisor maintenance interrupt first (Nicholas Piggin)
Various performance optimisations (Anton Blanchard):
- Align hot loops of memset() and backwards_memcpy()
- During context switch, check before setting mm_cpumask
- Remove static branch prediction in atomic{, 64}_add_unless
- Only disable HAVE_EFFICIENT_UNALIGNED_ACCESS on POWER7 little
endian
- Set default CPU type to POWER8 for little endian builds
Cleanups & features:
- Sparse fixes/cleanups (Daniel Axtens)
- Preserve CFAR value on SLB miss caused by access to bogus address
(Paul Mackerras)
- Radix MMU fixups for POWER9 (Aneesh Kumar K.V)
- Support for setting used_(vsr|vr|spe) in sigreturn path (for CRIU)
(Simon Guo)
- Optimise syscall entry for virtual, relocatable case (Nicholas
Piggin)
- Optimise MSR handling in exception handling (Nicholas Piggin)
- Support for kexec with Radix MMU (Benjamin Herrenschmidt)
- powernv EEH fixes (Russell Currey)
- Suprise PCI hotplug support for powernv (Gavin Shan)
- Endian/sparse fixes for powernv PCI (Gavin Shan)
- Defconfig updates (Anton Blanchard)
- KVM: PPC: Book3S HV: Migrate pinned pages out of CMA (Balbir Singh)
- cxl: Flush PSL cache before resetting the adapter (Frederic Barrat)
- cxl: replace loop with for_each_child_of_node(), remove unneeded
of_node_put() (Andrew Donnellan)
- Fix HV facility unavailable to use correct handler (Nicholas
Piggin)
- Remove unnecessary syscall trampoline (Nicholas Piggin)
- fadump: Fix build break when CONFIG_PROC_VMCORE=n (Michael
Ellerman)
- Quieten EEH message when no adapters are found (Anton Blanchard)
- powernv: Add PHB register dump debugfs handle (Russell Currey)
- Use kprobe blacklist for exception handlers & asm functions
(Nicholas Piggin)
- Document the syscall ABI (Nicholas Piggin)
- MAINTAINERS: Update cxl maintainers (Michael Neuling)
- powerpc: Remove all usages of NO_IRQ (Michael Ellerman)
Minor cleanups:
- Andrew Donnellan, Christophe Leroy, Colin Ian King, Cyril Bur,
Frederic Barrat, Pan Xinhui, PrasannaKumar Muralidharan, Rui Teng,
Simon Guo"
* tag 'powerpc-4.9-1' of git://git.kernel.org/pub/scm/linux/kernel/git/powerpc/linux: (156 commits)
powerpc/bpf: Add support for bpf constant blinding
powerpc/bpf: Implement support for tail calls
powerpc/bpf: Introduce accessors for using the tmp local stack space
powerpc/fadump: Fix build break when CONFIG_PROC_VMCORE=n
powerpc: tm: Enable transactional memory (TM) lazily for userspace
powerpc/tm: Add TM Unavailable Exception
powerpc: Remove do_load_up_transact_{fpu,altivec}
powerpc: tm: Rename transct_(*) to ck(\1)_state
powerpc: tm: Always use fp_state and vr_state to store live registers
selftests/powerpc: Add checks for transactional VSXs in signal contexts
selftests/powerpc: Add checks for transactional VMXs in signal contexts
selftests/powerpc: Add checks for transactional FPUs in signal contexts
selftests/powerpc: Add checks for transactional GPRs in signal contexts
selftests/powerpc: Check that signals always get delivered
selftests/powerpc: Add TM tcheck helpers in C
selftests/powerpc: Allow tests to extend their kill timeout
selftests/powerpc: Introduce GPR asm helper header file
selftests/powerpc: Move VMX stack frame macros to header file
selftests/powerpc: Rework FPU stack placement macros and move to header file
selftests/powerpc: Check for VSX preservation across userspace preemption
...
This commit is contained in:
@@ -162,7 +162,10 @@ static const cxl_p2n_reg_t CXL_PSL_WED_An = {0x0A0};
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#define CXL_PSL_SPAP_V 0x0000000000000001ULL
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/****** CXL_PSL_Control ****************************************************/
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#define CXL_PSL_Control_tb 0x0000000000000001ULL
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#define CXL_PSL_Control_tb (0x1ull << (63-63))
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#define CXL_PSL_Control_Fr (0x1ull << (63-31))
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#define CXL_PSL_Control_Fs_MASK (0x3ull << (63-29))
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#define CXL_PSL_Control_Fs_Complete (0x3ull << (63-29))
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/****** CXL_PSL_DLCNTL *****************************************************/
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#define CXL_PSL_DLCNTL_D (0x1ull << (63-28))
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@@ -854,6 +857,7 @@ int cxl_register_one_irq(struct cxl *adapter, irq_handler_t handler,
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int cxl_check_error(struct cxl_afu *afu);
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int cxl_afu_slbia(struct cxl_afu *afu);
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int cxl_tlb_slb_invalidate(struct cxl *adapter);
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int cxl_data_cache_flush(struct cxl *adapter);
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int cxl_afu_disable(struct cxl_afu *afu);
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int cxl_psl_purge(struct cxl_afu *afu);
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@@ -290,6 +290,37 @@ int cxl_tlb_slb_invalidate(struct cxl *adapter)
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return 0;
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}
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int cxl_data_cache_flush(struct cxl *adapter)
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{
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u64 reg;
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unsigned long timeout = jiffies + (HZ * CXL_TIMEOUT);
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pr_devel("Flushing data cache\n");
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reg = cxl_p1_read(adapter, CXL_PSL_Control);
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reg |= CXL_PSL_Control_Fr;
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cxl_p1_write(adapter, CXL_PSL_Control, reg);
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reg = cxl_p1_read(adapter, CXL_PSL_Control);
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while ((reg & CXL_PSL_Control_Fs_MASK) != CXL_PSL_Control_Fs_Complete) {
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if (time_after_eq(jiffies, timeout)) {
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dev_warn(&adapter->dev, "WARNING: cache flush timed out!\n");
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return -EBUSY;
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}
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if (!cxl_ops->link_ok(adapter, NULL)) {
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dev_warn(&adapter->dev, "WARNING: link down when flushing cache\n");
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return -EIO;
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}
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cpu_relax();
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reg = cxl_p1_read(adapter, CXL_PSL_Control);
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}
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reg &= ~CXL_PSL_Control_Fr;
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cxl_p1_write(adapter, CXL_PSL_Control, reg);
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return 0;
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}
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static int cxl_write_sstp(struct cxl_afu *afu, u64 sstp0, u64 sstp1)
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{
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int rc;
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@@ -460,7 +460,7 @@ int cxl_of_probe(struct platform_device *pdev)
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struct device_node *afu_np = NULL;
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struct cxl *adapter = NULL;
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int ret;
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int slice, slice_ok;
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int slice = 0, slice_ok = 0;
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pr_devel("in %s\n", __func__);
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@@ -476,13 +476,13 @@ int cxl_of_probe(struct platform_device *pdev)
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}
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/* init afu */
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slice_ok = 0;
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for (afu_np = NULL, slice = 0; (afu_np = of_get_next_child(np, afu_np)); slice++) {
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for_each_child_of_node(np, afu_np) {
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if ((ret = cxl_guest_init_afu(adapter, slice, afu_np)))
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dev_err(&pdev->dev, "AFU %i failed to initialise: %i\n",
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slice, ret);
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else
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slice_ok++;
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slice++;
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}
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if (slice_ok == 0) {
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@@ -490,8 +490,6 @@ int cxl_of_probe(struct platform_device *pdev)
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adapter->slices = 0;
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}
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if (afu_np)
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of_node_put(afu_np);
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return 0;
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}
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@@ -1239,6 +1239,9 @@ int cxl_pci_reset(struct cxl *adapter)
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dev_info(&dev->dev, "CXL reset\n");
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/* the adapter is about to be reset, so ignore errors */
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cxl_data_cache_flush(adapter);
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/* pcie_warm_reset requests a fundamental pci reset which includes a
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* PERST assert/deassert. PERST triggers a loading of the image
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* if "user" or "factory" is selected in sysfs */
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@@ -1530,11 +1533,11 @@ static void set_sl_ops(struct cxl *adapter, struct pci_dev *dev)
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{
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if (dev->vendor == PCI_VENDOR_ID_MELLANOX && dev->device == 0x1013) {
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/* Mellanox CX-4 */
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dev_info(&adapter->dev, "Device uses an XSL\n");
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dev_info(&dev->dev, "Device uses an XSL\n");
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adapter->native->sl_ops = &xsl_ops;
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adapter->min_pe = 1; /* Workaround for CX-4 hardware bug */
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} else {
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dev_info(&adapter->dev, "Device uses a PSL\n");
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dev_info(&dev->dev, "Device uses a PSL\n");
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adapter->native->sl_ops = &psl_ops;
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}
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}
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