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Merge branch 'omap-fixes-for-linus' into omap-for-linus

Browse Source
This commit is contained in:
Tony Lindgren
2010-02-10 18:18:13 -08:00
parent 9ba874506b a6c7fdd293
commit 0482e3c6f7
495 changed files with 9406 additions and 5383 deletions
Download Patch File Download Diff File Expand all files Collapse all files
arch/arm/Kconfig
+1
View File
@@ -702,6 +702,7 @@ config ARCH_OMAP
select ARCH_HAS_CPUFREQ
select GENERIC_TIME
select GENERIC_CLOCKEVENTS
select ARCH_HAS_HOLES_MEMORYMODEL
help
Support for TI's OMAP platform (OMAP1 and OMAP2).
arch/arm/Makefile
+1 -1
View File
@@ -94,7 +94,7 @@ CFLAGS_ABI +=-funwind-tables
endif
ifeq ($(CONFIG_THUMB2_KERNEL),y)
AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=thumb,-Wa$(comma)-mauto-it)
AFLAGS_AUTOIT :=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it)
AFLAGS_NOWARN :=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)
CFLAGS_THUMB2 :=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN)
AFLAGS_THUMB2 :=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb
arch/arm/mach-kirkwood/rd88f6192-nas-setup.c
+6
View File
@@ -13,6 +13,7 @@
#include <linux/platform_device.h>
#include <linux/ata_platform.h>
#include <linux/mv643xx_eth.h>
#include <linux/gpio.h>
#include <linux/spi/flash.h>
#include <linux/spi/spi.h>
#include <linux/spi/orion_spi.h>
@@ -53,6 +54,11 @@ static void __init rd88f6192_init(void)
*/
kirkwood_init();
orion_gpio_set_valid(RD88F6192_GPIO_USB_VBUS, 1);
if (gpio_request(RD88F6192_GPIO_USB_VBUS, "USB VBUS") != 0 ||
gpio_direction_output(RD88F6192_GPIO_USB_VBUS, 1) != 0)
pr_err("RD-88F6192-NAS: failed to setup USB VBUS GPIO\n");
kirkwood_ehci_init();
kirkwood_ge00_init(&rd88f6192_ge00_data);
kirkwood_sata_init(&rd88f6192_sata_data);
arch/arm/mach-mx25/clock.c
+37 -21
View File
@@ -119,6 +119,11 @@ static unsigned long get_rate_nfc(struct clk *clk)
return get_rate_per(8);
}
static unsigned long get_rate_gpt(struct clk *clk)
{
return get_rate_per(5);
}
static unsigned long get_rate_otg(struct clk *clk)
{
return 48000000; /* FIXME */
@@ -144,7 +149,7 @@ static void clk_cgcr_disable(struct clk *clk)
__raw_writel(reg, clk->enable_reg);
}
#define DEFINE_CLOCK(name, i, er, es, gr, sr) \
#define DEFINE_CLOCK(name, i, er, es, gr, sr, s) \
static struct clk name = { \
.id = i, \
.enable_reg = CRM_BASE + er, \
@@ -153,27 +158,30 @@ static void clk_cgcr_disable(struct clk *clk)
.set_rate = sr, \
.enable = clk_cgcr_enable, \
.disable = clk_cgcr_disable, \
.secondary = s, \
}
DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_ipg, NULL);
DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL);
DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL);
DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL);
DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL);
DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL);
DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL);
DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL);
DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL);
DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL);
DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL);
DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL);
DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL);
DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL);
DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL);
DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL);
DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL);
DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL);
DEFINE_CLOCK(fec_clk, 0, CCM_CGCR0, 23, get_rate_ipg, NULL);
DEFINE_CLOCK(gpt_clk, 0, CCM_CGCR0, 5, get_rate_gpt, NULL, NULL);
DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);
DEFINE_CLOCK(cspi1_clk, 0, CCM_CGCR1, 5, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(cspi2_clk, 0, CCM_CGCR1, 6, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(cspi3_clk, 0, CCM_CGCR1, 7, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL, NULL, NULL);
DEFINE_CLOCK(uart1_clk, 0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);
DEFINE_CLOCK(uart2_clk, 0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);
DEFINE_CLOCK(uart3_clk, 0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);
DEFINE_CLOCK(uart4_clk, 0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk);
DEFINE_CLOCK(uart5_clk, 0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk);
DEFINE_CLOCK(nfc_clk, 0, CCM_CGCR0, 8, get_rate_nfc, NULL, NULL);
DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL);
DEFINE_CLOCK(pwm1_clk, 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(pwm2_clk, 0, CCM_CGCR2, 0, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(pwm3_clk, 0, CCM_CGCR2, 1, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(pwm4_clk, 0, CCM_CGCR2, 2, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(kpp_clk, 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(tsc_clk, 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);
DEFINE_CLOCK(i2c_clk, 0, CCM_CGCR0, 6, get_rate_i2c, NULL, NULL);
DEFINE_CLOCK(fec_clk, 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);
#define _REGISTER_CLOCK(d, n, c) \
{ \
@@ -208,13 +216,21 @@ static struct clk_lookup lookups[] = {
_REGISTER_CLOCK("fec.0", NULL, fec_clk)
};
int __init mx25_clocks_init(unsigned long fref)
int __init mx25_clocks_init(void)
{
int i;
for (i = 0; i < ARRAY_SIZE(lookups); i++)
clkdev_add(&lookups[i]);
/* Turn off all clocks except the ones we need to survive, namely:
* EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM,
* SCC
*/
__raw_writel((1 << 19), CRM_BASE + CCM_CGCR0);
__raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);
__raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);
mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);
return 0;
arch/arm/mach-mx25/mx25pdk.c
+1 -1
View File
@@ -91,7 +91,7 @@ static void __init mx25pdk_init(void)
static void __init mx25pdk_timer_init(void)
{
mx25_clocks_init(26000000);
mx25_clocks_init();
}
static struct sys_timer mx25pdk_timer = {
arch/arm/mach-mx3/mx31ads.c
+4
View File
@@ -173,6 +173,7 @@ static void expio_unmask_irq(u32 irq)
}
static struct irq_chip expio_irq_chip = {
.name = "EXPIO(CPLD)",
.ack = expio_ack_irq,
.mask = expio_mask_irq,
.unmask = expio_unmask_irq,
@@ -302,6 +303,7 @@ static struct regulator_init_data ldo1_data = {
.min_uV = 2800000,
.max_uV = 2800000,
.valid_modes_mask = REGULATOR_MODE_NORMAL,
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
.apply_uV = 1,
},
};
@@ -322,6 +324,7 @@ static struct regulator_init_data ldo2_data = {
.min_uV = 3300000,
.max_uV = 3300000,
.valid_modes_mask = REGULATOR_MODE_NORMAL,
.valid_ops_mask = REGULATOR_CHANGE_STATUS,
.apply_uV = 1,
},
.num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
@@ -459,6 +462,7 @@ static int mx31_wm8350_init(struct wm8350 *wm8350)
static struct wm8350_platform_data __initdata mx31_wm8350_pdata = {
.init = mx31_wm8350_init,
.irq_base = MXC_BOARD_IRQ_START + MXC_MAX_EXP_IO_LINES,
};
#endif
arch/arm/mach-omap2/gpmc.c
+4 -1
View File
@@ -505,7 +505,7 @@ static void __init gpmc_mem_init(void)
void __init gpmc_init(void)
{
u32 l;
char *ck;
char *ck = NULL;
if (cpu_is_omap24xx()) {
ck = "core_l3_ck";
@@ -521,6 +521,9 @@ void __init gpmc_init(void)
l = OMAP44XX_GPMC_BASE;
}
if (WARN_ON(!ck))
return;
gpmc_l3_clk = clk_get(NULL, ck);
if (IS_ERR(gpmc_l3_clk)) {
printk(KERN_ERR "Could not get GPMC clock %s\n", ck);
arch/arm/mach-omap2/irq.c
+3 -1
View File
@@ -194,7 +194,7 @@ void __init omap_init_irq(void)
int i;
for (i = 0; i < ARRAY_SIZE(irq_banks); i++) {
unsigned long base;
unsigned long base = 0;
struct omap_irq_bank *bank = irq_banks + i;
if (cpu_is_omap24xx())
@@ -202,6 +202,8 @@ void __init omap_init_irq(void)
else if (cpu_is_omap34xx())
base = OMAP34XX_IC_BASE;
BUG_ON(!base);
/* Static mapping, never released */
bank->base_reg = ioremap(base, SZ_4K);
if (!bank->base_reg) {
arch/arm/mach-omap2/mmc-twl4030.c
+6 -1
View File
@@ -408,6 +408,7 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
{
struct twl4030_hsmmc_info *c;
int nr_hsmmc = ARRAY_SIZE(hsmmc_data);
int i;
if (cpu_is_omap2430()) {
control_pbias_offset = OMAP243X_CONTROL_PBIAS_LITE;
@@ -434,7 +435,7 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
mmc = kzalloc(sizeof(struct omap_mmc_platform_data), GFP_KERNEL);
if (!mmc) {
pr_err("Cannot allocate memory for mmc device!\n");
return;
goto done;
}
if (c->name)
@@ -532,6 +533,10 @@ void __init twl4030_mmc_init(struct twl4030_hsmmc_info *controllers)
continue;
c->dev = mmc->dev;
}
done:
for (i = 0; i < nr_hsmmc; i++)
kfree(hsmmc_data[i]);
}
#endif
arch/arm/mach-omap2/mux.c
+9 -1
View File
@@ -486,7 +486,7 @@ int __init omap_mux_init_signal(char *muxname, int val)
static inline void omap_mux_decode(struct seq_file *s, u16 val)
{
char *flags[OMAP_MUX_MAX_NR_FLAGS];
char mode[14];
char mode[sizeof("OMAP_MUX_MODE") + 1];
int i = -1;
sprintf(mode, "OMAP_MUX_MODE%d", val & 0x7);
@@ -553,6 +553,7 @@ static int omap_mux_dbg_board_show(struct seq_file *s, void *unused)
if (!m0_name)
continue;
/* REVISIT: Needs to be updated if mode0 names get longer */
for (i = 0; i < OMAP_MUX_DEFNAME_LEN; i++) {
if (m0_name[i] == '\0') {
m0_def[i] = m0_name[i];
@@ -968,6 +969,13 @@ static void __init omap_mux_init_list(struct omap_mux *superset)
}
#endif
#if defined(CONFIG_OMAP_MUX) && defined(CONFIG_DEBUG_FS)
if (!superset->muxnames || !superset->muxnames[0]) {
superset++;
continue;
}
#endif
entry = omap_mux_list_add(superset);
if (!entry) {
printk(KERN_ERR "mux: Could not add entry\n");
arch/arm/mach-omap2/mux34xx.c
+47
View File
@@ -649,6 +649,53 @@ static struct omap_mux __initdata omap3_muxmodes[] = {
_OMAP3_MUXENTRY(UART3_TX_IRTX, 166,
"uart3_tx_irtx", NULL, NULL, NULL,
"gpio_166", NULL, NULL, "safe_mode"),
/* Only on 3630, see omap36xx_cbp_subset for the signals */
_OMAP3_MUXENTRY(GPMC_A11, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MBUSFLAG, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MREAD, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MWRITE, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_SBUSFLAG, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_SREAD, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_SWRITE, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(GPMC_A11, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MCAD28, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MCAD29, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MCAD32, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MCAD33, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MCAD34, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MCAD35, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
_OMAP3_MUXENTRY(SAD2D_MCAD36, 0,
NULL, NULL, NULL, NULL,
NULL, NULL, NULL, NULL),
{ .reg_offset = OMAP_MUX_TERMINATOR },
};
arch/arm/mach-omap2/serial.c
+9 -2
View File
@@ -36,7 +36,13 @@
#define UART_OMAP_NO_EMPTY_FIFO_READ_IP_REV 0x52
#define UART_OMAP_WER 0x17 /* Wake-up enable register */
#define DEFAULT_TIMEOUT (5 * HZ)
/*
* NOTE: By default the serial timeout is disabled as it causes lost characters
* over the serial ports. This means that the UART clocks will stay on until
* disabled via sysfs. This also causes that any deeper omap sleep states are
* blocked.
*/
#define DEFAULT_TIMEOUT 0
struct omap_uart_state {
int num;
@@ -422,7 +428,8 @@ static void omap_uart_idle_init(struct omap_uart_state *uart)
uart->timeout = DEFAULT_TIMEOUT;
setup_timer(&uart->timer, omap_uart_idle_timer,
(unsigned long) uart);
mod_timer(&uart->timer, jiffies + uart->timeout);
if (uart->timeout)
mod_timer(&uart->timer, jiffies + uart->timeout);
omap_uart_smart_idle_enable(uart, 0);
if (cpu_is_omap34xx()) {
arch/arm/mach-orion5x/dns323-setup.c
+27 -6
View File
@@ -12,6 +12,7 @@
#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/platform_device.h>
#include <linux/pci.h>
#include <linux/irq.h>
@@ -32,6 +33,7 @@
#define DNS323_GPIO_LED_RIGHT_AMBER 1
#define DNS323_GPIO_LED_LEFT_AMBER 2
#define DNS323_GPIO_SYSTEM_UP 3
#define DNS323_GPIO_LED_POWER 5
#define DNS323_GPIO_OVERTEMP 6
#define DNS323_GPIO_RTC 7
@@ -239,7 +241,7 @@ static struct gpio_led dns323_leds[] = {
{
.name = "power:blue",
.gpio = DNS323_GPIO_LED_POWER,
.active_low = 1,
.default_state = LEDS_GPIO_DEFSTATE_ON,
}, {
.name = "right:amber",
.gpio = DNS323_GPIO_LED_RIGHT_AMBER,
@@ -334,7 +336,7 @@ static struct orion5x_mpp_mode dns323_mv88f5182_mpp_modes[] __initdata = {
{ 0, MPP_UNUSED },
{ 1, MPP_GPIO }, /* right amber LED (sata ch0) */
{ 2, MPP_GPIO }, /* left amber LED (sata ch1) */
{ 3, MPP_UNUSED },
{ 3, MPP_GPIO }, /* system up flag */
{ 4, MPP_GPIO }, /* power button LED */
{ 5, MPP_GPIO }, /* power button LED */
{ 6, MPP_GPIO }, /* GMT G751-2f overtemp */
@@ -372,13 +374,23 @@ static struct i2c_board_info __initdata dns323_i2c_devices[] = {
},
};
/* DNS-323 specific power off method */
static void dns323_power_off(void)
/* DNS-323 rev. A specific power off method */
static void dns323a_power_off(void)
{
pr_info("%s: triggering power-off...\n", __func__);
gpio_set_value(DNS323_GPIO_POWER_OFF, 1);
}
/* DNS-323 rev B specific power off method */
static void dns323b_power_off(void)
{
pr_info("%s: triggering power-off...\n", __func__);
/* Pin has to be changed to 1 and back to 0 to do actual power off. */
gpio_set_value(DNS323_GPIO_POWER_OFF, 1);
mdelay(100);
gpio_set_value(DNS323_GPIO_POWER_OFF, 0);
}
static void __init dns323_init(void)
{
/* Setup basic Orion functions. Need to be called early. */
@@ -424,11 +436,20 @@ static void __init dns323_init(void)
if (dns323_dev_id() == MV88F5182_DEV_ID)
orion5x_sata_init(&dns323_sata_data);
/* register dns323 specific power-off method */
/* The 5182 has flag to indicate the system is up. Without this flag
* set, power LED will flash and cannot be controlled via leds-gpio.
*/
if (dns323_dev_id() == MV88F5182_DEV_ID)
gpio_set_value(DNS323_GPIO_SYSTEM_UP, 1);
/* Register dns323 specific power-off method */
if (gpio_request(DNS323_GPIO_POWER_OFF, "POWEROFF") != 0 ||
gpio_direction_output(DNS323_GPIO_POWER_OFF, 0) != 0)
pr_err("DNS323: failed to setup power-off GPIO\n");
pm_power_off = dns323_power_off;
if (dns323_dev_id() == MV88F5182_DEV_ID)
pm_power_off = dns323b_power_off;
else
pm_power_off = dns323a_power_off;
}
/* Warning: D-Link uses a wrong mach-type (=526) in their bootloader */
arch/arm/mach-orion5x/wrt350n-v2-setup.c
+79
View File
@@ -15,6 +15,9 @@
#include <linux/mtd/physmap.h>
#include <linux/mv643xx_eth.h>
#include <linux/ethtool.h>
#include <linux/leds.h>
#include <linux/gpio_keys.h>
#include <linux/input.h>
#include <net/dsa.h>
#include <asm/mach-types.h>
#include <asm/gpio.h>
@@ -24,6 +27,80 @@
#include "common.h"
#include "mpp.h"
/*
* LEDs attached to GPIO
*/
static struct gpio_led wrt350n_v2_led_pins[] = {
{
.name = "wrt350nv2:green:power",
.gpio = 0,
.active_low = 1,
}, {
.name = "wrt350nv2:green:security",
.gpio = 1,
.active_low = 1,
}, {
.name = "wrt350nv2:orange:power",
.gpio = 5,
.active_low = 1,
}, {
.name = "wrt350nv2:green:usb",
.gpio = 6,
.active_low = 1,
}, {
.name = "wrt350nv2:green:wireless",
.gpio = 7,
.active_low = 1,
},
};
static struct gpio_led_platform_data wrt350n_v2_led_data = {
.leds = wrt350n_v2_led_pins,
.num_leds = ARRAY_SIZE(wrt350n_v2_led_pins),
};
static struct platform_device wrt350n_v2_leds = {
.name = "leds-gpio",
.id = -1,
.dev = {
.platform_data = &wrt350n_v2_led_data,
},
};
/*
* Buttons attached to GPIO
*/
static struct gpio_keys_button wrt350n_v2_buttons[] = {
{
.code = KEY_RESTART,
.gpio = 3,
.desc = "Reset Button",
.active_low = 1,
}, {
.code = KEY_WLAN,
.gpio = 2,
.desc = "WPS Button",
.active_low = 1,
},
};
static struct gpio_keys_platform_data wrt350n_v2_button_data = {
.buttons = wrt350n_v2_buttons,
.nbuttons = ARRAY_SIZE(wrt350n_v2_buttons),
};
static struct platform_device wrt350n_v2_button_device = {
.name = "gpio-keys",
.id = -1,
.num_resources = 0,
.dev = {
.platform_data = &wrt350n_v2_button_data,
},
};
/*
* General setup
*/
static struct orion5x_mpp_mode wrt350n_v2_mpp_modes[] __initdata = {
{ 0, MPP_GPIO }, /* Power LED green (0=on) */
{ 1, MPP_GPIO }, /* Security LED (0=on) */
@@ -140,6 +217,8 @@ static void __init wrt350n_v2_init(void)
orion5x_setup_dev_boot_win(WRT350N_V2_NOR_BOOT_BASE,
WRT350N_V2_NOR_BOOT_SIZE);
platform_device_register(&wrt350n_v2_nor_flash);
platform_device_register(&wrt350n_v2_leds);
platform_device_register(&wrt350n_v2_button_device);
}
static int __init wrt350n_v2_pci_map_irq(struct pci_dev *dev, u8 slot, u8 pin)
arch/arm/mach-pxa/corgi.c
+1
View File
@@ -457,6 +457,7 @@ static struct pxaficp_platform_data corgi_ficp_platform_data = {
* USB Device Controller
*/
static struct pxa2xx_udc_mach_info udc_info __initdata = {
.gpio_vbus = -1,
/* no connect GPIO; corgi can't tell connection status */
.gpio_pullup = CORGI_GPIO_USB_PULLUP,
};
arch/arm/mach-pxa/include/mach/mfp-pxa25x.h
+4 -2
View File
@@ -169,7 +169,6 @@
#define GPIO86_nSDCS2 MFP_CFG_OUT(GPIO86, AF0, DRIVE_HIGH)
#define GPIO87_nSDCS3 MFP_CFG_OUT(GPIO87, AF0, DRIVE_HIGH)
#define GPIO88_RDnWR MFP_CFG_OUT(GPIO88, AF0, DRIVE_HIGH)
#define GPIO89_nACRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
/* USB */
#define GPIO9_USB_RCV MFP_CFG_IN(GPIO9, AF1)
@@ -186,6 +185,9 @@
#define GPIO30_ASSP_TXD MFP_CFG_OUT(GPIO30, AF3, DRIVE_LOW)
#define GPIO31_ASSP_SFRM_IN MFP_CFG_IN(GPIO31, AF1)
#define GPIO31_ASSP_SFRM_OUT MFP_CFG_OUT(GPIO31, AF3, DRIVE_LOW)
#endif
/* AC97 */
#define GPIO89_AC97_nRESET MFP_CFG_OUT(GPIO89, AF0, DRIVE_HIGH)
#endif /* CONFIG_CPU_PXA26x */
#endif /* __ASM_ARCH_MFP_PXA25X_H */
arch/arm/mach-pxa/irq.c
+10 -4
View File
@@ -164,8 +164,11 @@ static int pxa_irq_suspend(struct sys_device *dev, pm_message_t state)
saved_icmr[i] = _ICMR(irq);
_ICMR(irq) = 0;
}
for (i = 0; i < pxa_internal_irq_nr; i++)
saved_ipr[i] = IPR(i);
if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
for (i = 0; i < pxa_internal_irq_nr; i++)
saved_ipr[i] = IPR(i);
}
return 0;
}
@@ -174,12 +177,15 @@ static int pxa_irq_resume(struct sys_device *dev)
{
int i, irq = PXA_IRQ(0);
if (cpu_is_pxa27x() || cpu_is_pxa3xx()) {
for (i = 0; i < pxa_internal_irq_nr; i++)
IPR(i) = saved_ipr[i];
}
for (i = 0; irq < PXA_IRQ(pxa_internal_irq_nr); i++, irq += 32) {
_ICMR(irq) = saved_icmr[i];
_ICLR(irq) = 0;
}
for (i = 0; i < pxa_internal_irq_nr; i++)
IPR(i) = saved_ipr[i];
ICCR = 1;
return 0;
arch/arm/mach-realview/realview_pbx.c
+2 -2
View File
@@ -334,8 +334,8 @@ static void realview_pbx_reset(char mode)
* in the system FPGA
*/
__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);
__raw_writel(0x0000, reset_ctrl);
__raw_writel(0x0004, reset_ctrl);
__raw_writel(0x00F0, reset_ctrl);
__raw_writel(0x00F4, reset_ctrl);
}
static void __init realview_pbx_init(void)
arch/arm/mm/proc-arm6_7.S
+1 -1
View File
@@ -41,7 +41,7 @@ ENTRY(cpu_arm7_dcache_clean_area)
ENTRY(cpu_arm7_data_abort)
mrc p15, 0, r1, c5, c0, 0 @ get FSR
mrc p15, 0, r0, c6, c0, 0 @ get FAR
ldr r8, [r0] @ read arm instruction
ldr r8, [r2] @ read arm instruction
tst r8, #1 << 20 @ L = 0 -> write?
orreq r1, r1, #1 << 11 @ yes.
and r7, r8, #15 << 24
arch/arm/plat-mxc/audmux-v2.c
+137
View File
@@ -23,6 +23,7 @@
#include <linux/err.h>
#include <linux/io.h>
#include <linux/clk.h>
#include <linux/debugfs.h>
#include <mach/audmux.h>
#include <mach/hardware.h>
@@ -32,6 +33,140 @@ static void __iomem *audmux_base;
#define MXC_AUDMUX_V2_PTCR(x) ((x) * 8)
#define MXC_AUDMUX_V2_PDCR(x) ((x) * 8 + 4)
#ifdef CONFIG_DEBUG_FS
static struct dentry *audmux_debugfs_root;
static int audmux_open_file(struct inode *inode, struct file *file)
{
file->private_data = inode->i_private;
return 0;
}
/* There is an annoying discontinuity in the SSI numbering with regard
* to the Linux number of the devices */
static const char *audmux_port_string(int port)
{
switch (port) {
case MX31_AUDMUX_PORT1_SSI0:
return "imx-ssi.0";
case MX31_AUDMUX_PORT2_SSI1:
return "imx-ssi.1";
case MX31_AUDMUX_PORT3_SSI_PINS_3:
return "SSI3";
case MX31_AUDMUX_PORT4_SSI_PINS_4:
return "SSI4";
case MX31_AUDMUX_PORT5_SSI_PINS_5:
return "SSI5";
case MX31_AUDMUX_PORT6_SSI_PINS_6:
return "SSI6";
default:
return "UNKNOWN";
}
}
static ssize_t audmux_read_file(struct file *file, char __user *user_buf,
size_t count, loff_t *ppos)
{
ssize_t ret;
char *buf = kmalloc(PAGE_SIZE, GFP_KERNEL);
int port = (int)file->private_data;
u32 pdcr, ptcr;
if (!buf)
return -ENOMEM;
if (audmux_clk)
clk_enable(audmux_clk);
ptcr = readl(audmux_base + MXC_AUDMUX_V2_PTCR(port));
pdcr = readl(audmux_base + MXC_AUDMUX_V2_PDCR(port));
if (audmux_clk)
clk_disable(audmux_clk);
ret = snprintf(buf, PAGE_SIZE, "PDCR: %08x\nPTCR: %08x\n",
pdcr, ptcr);
if (ptcr & MXC_AUDMUX_V2_PTCR_TFSDIR)
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"TxFS output from %s, ",
audmux_port_string((ptcr >> 27) & 0x7));
else
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"TxFS input, ");
if (ptcr & MXC_AUDMUX_V2_PTCR_TCLKDIR)
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"TxClk output from %s",
audmux_port_string((ptcr >> 22) & 0x7));
else
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"TxClk input");
ret += snprintf(buf + ret, PAGE_SIZE - ret, "\n");
if (ptcr & MXC_AUDMUX_V2_PTCR_SYN) {
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"Port is symmetric");
} else {
if (ptcr & MXC_AUDMUX_V2_PTCR_RFSDIR)
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"RxFS output from %s, ",
audmux_port_string((ptcr >> 17) & 0x7));
else
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"RxFS input, ");
if (ptcr & MXC_AUDMUX_V2_PTCR_RCLKDIR)
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"RxClk output from %s",
audmux_port_string((ptcr >> 12) & 0x7));
else
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"RxClk input");
}
ret += snprintf(buf + ret, PAGE_SIZE - ret,
"\nData received from %s\n",
audmux_port_string((pdcr >> 13) & 0x7));
ret = simple_read_from_buffer(user_buf, count, ppos, buf, ret);
kfree(buf);
return ret;
}
static const struct file_operations audmux_debugfs_fops = {
.open = audmux_open_file,
.read = audmux_read_file,
};
static void audmux_debugfs_init(void)
{
int i;
char buf[20];
audmux_debugfs_root = debugfs_create_dir("audmux", NULL);
if (!audmux_debugfs_root) {
pr_warning("Failed to create AUDMUX debugfs root\n");
return;
}
for (i = 1; i < 8; i++) {
snprintf(buf, sizeof(buf), "ssi%d", i);
if (!debugfs_create_file(buf, 0444, audmux_debugfs_root,
(void *)i, &audmux_debugfs_fops))
pr_warning("Failed to create AUDMUX port %d debugfs file\n",
i);
}
}
#else
static inline void audmux_debugfs_init(void)
{
}
#endif
int mxc_audmux_v2_configure_port(unsigned int port, unsigned int ptcr,
unsigned int pdcr)
{
@@ -68,6 +203,8 @@ static int mxc_audmux_v2_init(void)
if (cpu_is_mx31() || cpu_is_mx35())
audmux_base = IO_ADDRESS(AUDMUX_BASE_ADDR);
audmux_debugfs_init();
return 0;
}

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