arch/arm/mach-prima2/Makefile

obj-y := timer.o
obj-y += rstc.o
obj-y += common.o
obj-y += rtciobrg.o
obj-$(CONFIG_DEBUG_LL) += lluart.o
obj-$(CONFIG_CACHE_L2X0) += l2x0.o
obj-$(CONFIG_SUSPEND) += pm.o sleep.o
obj-$(CONFIG_SIRF_IRQ) += irq.o
ARM: CSR: Adding CSR SiRFprimaII board support 2011-07-08 17:40:12 +08:00			`obj-y := timer.o`
			`obj-y += rstc.o`
ARM: PRIMA2: use DT_MACHINE_START and convert to generic board 2012-08-23 13:41:57 +08:00			`obj-y += common.o`
ARM: CSR: add rtc i/o bridge interface for SiRFprimaII 2011-08-30 19:20:34 -07:00			`obj-y += rtciobrg.o`
ARM: CSR: mapping early DEBUG_LL uart 2011-07-08 02:40:13 -07:00			`obj-$(CONFIG_DEBUG_LL) += lluart.o`
ARM: CSR: initializing L2 cache 2011-07-08 02:40:14 -07:00			`obj-$(CONFIG_CACHE_L2X0) += l2x0.o`
ARM: CSR: PM: add sleep entry for SiRFprimaII 2011-09-21 21:46:20 +08:00			`obj-$(CONFIG_SUSPEND) += pm.o sleep.o`
ARM: SIRF: make sirf irqchip driver optional since new SoCs will have GIC 2012-08-23 13:41:59 +08:00			`obj-$(CONFIG_SIRF_IRQ) += irq.o`