2017-12-05 15:55:59 +01:00
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/* SPDX-License-Identifier: GPL-2.0 */
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2016-11-15 16:30:57 +01:00
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/*
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* This file is part of STM32 ADC driver
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*
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* Copyright (C) 2016, STMicroelectronics - All Rights Reserved
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* Author: Fabrice Gasnier <fabrice.gasnier@st.com>.
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*
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*/
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#ifndef __STM32_ADC_H
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#define __STM32_ADC_H
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/*
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* STM32 - ADC global register map
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* ________________________________________________________
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* | Offset | Register |
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* --------------------------------------------------------
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* | 0x000 | Master ADC1 |
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* --------------------------------------------------------
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* | 0x100 | Slave ADC2 |
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* --------------------------------------------------------
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* | 0x200 | Slave ADC3 |
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* --------------------------------------------------------
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* | 0x300 | Master & Slave common regs |
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* --------------------------------------------------------
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*/
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#define STM32_ADC_MAX_ADCS 3
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#define STM32_ADCX_COMN_OFFSET 0x300
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/**
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* struct stm32_adc_common - stm32 ADC driver common data (for all instances)
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* @base: control registers base cpu addr
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2017-01-26 15:28:33 +01:00
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* @phys_base: control registers base physical addr
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2017-05-29 11:28:20 +02:00
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* @rate: clock rate used for analog circuitry
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2016-11-15 16:30:57 +01:00
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* @vref_mv: vref voltage (mv)
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*/
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struct stm32_adc_common {
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void __iomem *base;
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2017-01-26 15:28:33 +01:00
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phys_addr_t phys_base;
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2017-05-29 11:28:20 +02:00
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unsigned long rate;
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2016-11-15 16:30:57 +01:00
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int vref_mv;
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};
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#endif
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