2005-04-16 15:20:36 -07:00
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/*
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* include/asm-x8664/cache.h
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*/
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#ifndef __ARCH_X8664_CACHE_H
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#define __ARCH_X8664_CACHE_H
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/* L1 cache line size */
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#define L1_CACHE_SHIFT (CONFIG_X86_L1_CACHE_SHIFT)
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#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
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2006-01-11 22:46:15 +01:00
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#ifdef CONFIG_X86_VSMP
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/* vSMP Internode cacheline shift */
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#define INTERNODE_CACHE_SHIFT (12)
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#ifdef CONFIG_SMP
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#define __cacheline_aligned_in_smp \
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__attribute__((__aligned__(1 << (INTERNODE_CACHE_SHIFT)))) \
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__attribute__((__section__(".data.page_aligned")))
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#endif
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2006-04-20 02:36:48 +02:00
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#endif
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2006-03-23 03:00:16 -08:00
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#define __read_mostly __attribute__((__section__(".data.read_mostly")))
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2006-01-11 22:46:15 +01:00
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#endif
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