mirror of
https://github.com/AdaCore/why3.git
synced 2026-02-12 12:34:55 -08:00
Merge branch 'remove_space_in_ident' into 'master'
Remove space in ident Closes #377 See merge request why3/why3!219
This commit is contained in:
@@ -15,6 +15,10 @@ Language
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`requires Hyp { a = 3 }` tries to give the name `Hyp` to the corresponding
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hypothesis after introduction. This uses the attribute [@hyp_name:] which is
|
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now reserved.
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* Ident suffix introduced for specification (resp definition) of a function
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are renamed from "_spec" (resp. "_def" to "'spec" (resp. "'def" :x:
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* Ident prefix introduced for goals "VC " and record constructor "mk "
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becomes suffix "'VC" and "'mk".
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Tools
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* counterexamples given by `why3prove` are no longer printed using JSON
|
||||
|
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@@ -1,6 +1,6 @@
|
||||
Strongest Postcondition
|
||||
bench/ce/array_mono.mlw Array VC array: Valid
|
||||
bench/ce/array_mono.mlw A VC f1: Timeout or Unknown
|
||||
bench/ce/array_mono.mlw Array array'VC: Valid
|
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bench/ce/array_mono.mlw A f1'VC: Timeout or Unknown
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Counter-example model:
|
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File array_mono.mlw:
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Line 16:
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@@ -22,8 +22,8 @@ File array_mono.mlw:
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{"field" : "length" , "value" : {"type" : "Integer" ,
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"val" : "0" } }] } }
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|
||||
bench/ce/array_mono.mlw A VC f2: Valid
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bench/ce/array_mono.mlw A VC f2: Timeout or Unknown
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bench/ce/array_mono.mlw A f2'VC: Valid
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bench/ce/array_mono.mlw A f2'VC: Timeout or Unknown
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Counter-example model:
|
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File array_mono.mlw:
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Line 25:
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|
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@@ -1,6 +1,6 @@
|
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Weakest Precondition
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bench/ce/array_mono.mlw Array VC array: Valid
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bench/ce/array_mono.mlw A VC f1: Timeout or Unknown
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bench/ce/array_mono.mlw Array array'VC: Valid
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bench/ce/array_mono.mlw A f1'VC: Timeout or Unknown
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Counter-example model:
|
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File array_mono.mlw:
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Line 16:
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@@ -22,8 +22,8 @@ File array_mono.mlw:
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{"field" : "length" , "value" : {"type" : "Integer" ,
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"val" : "0" } }] } }
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bench/ce/array_mono.mlw A VC f2: Valid
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bench/ce/array_mono.mlw A VC f2: Timeout or Unknown
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bench/ce/array_mono.mlw A f2'VC: Valid
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bench/ce/array_mono.mlw A f2'VC: Timeout or Unknown
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Counter-example model:
|
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File array_mono.mlw:
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Line 25:
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|
||||
@@ -1,6 +1,6 @@
|
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Strongest Postcondition
|
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bench/ce/array_mono.mlw Array VC array: Valid
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bench/ce/array_mono.mlw A VC f1: Timeout or Unknown
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bench/ce/array_mono.mlw Array array'VC: Valid
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bench/ce/array_mono.mlw A f1'VC: Timeout or Unknown
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Counter-example model:
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File array_mono.mlw:
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Line 16:
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@@ -13,8 +13,8 @@ File array_mono.mlw:
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a, [[@introduced], [@model_trace:a]] = {"proj_name" : "length" ,
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"type" : "Proj" , "value" : {"type" : "Integer" , "val" : "0" } }
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bench/ce/array_mono.mlw A VC f2: Valid
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bench/ce/array_mono.mlw A VC f2: Timeout or Unknown
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bench/ce/array_mono.mlw A f2'VC: Valid
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bench/ce/array_mono.mlw A f2'VC: Timeout or Unknown
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Counter-example model:
|
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File array_mono.mlw:
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Line 25:
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@@ -55,4 +55,3 @@ File array_mono.mlw:
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{"others" : {"type" : "Integer" , "val" : "4" } }] } },
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{"field" : "length" , "value" : {"type" : "Integer" ,
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"val" : "2" } }] } }
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@@ -1,6 +1,6 @@
|
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Weakest Precondition
|
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bench/ce/array_mono.mlw Array VC array: Valid
|
||||
bench/ce/array_mono.mlw A VC f1: Timeout or Unknown
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bench/ce/array_mono.mlw Array array'VC: Valid
|
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bench/ce/array_mono.mlw A f1'VC: Timeout or Unknown
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Counter-example model:
|
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File array_mono.mlw:
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Line 16:
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@@ -13,8 +13,8 @@ File array_mono.mlw:
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a, [[@introduced], [@model_trace:a]] = {"proj_name" : "length" ,
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"type" : "Proj" , "value" : {"type" : "Integer" , "val" : "0" } }
|
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|
||||
bench/ce/array_mono.mlw A VC f2: Valid
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||||
bench/ce/array_mono.mlw A VC f2: Timeout or Unknown
|
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bench/ce/array_mono.mlw A f2'VC: Valid
|
||||
bench/ce/array_mono.mlw A f2'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_mono.mlw:
|
||||
Line 25:
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|
||||
@@ -1,5 +1,5 @@
|
||||
Strongest Postcondition
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
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||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
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||||
Counter-example model:
|
||||
File array_records.mlw:
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||||
Line 23:
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||||
@@ -8,7 +8,7 @@ File array_records.mlw:
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i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
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"val" : "-1" }
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|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
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Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -17,7 +17,7 @@ File array_records.mlw:
|
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i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
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"val" : "-1" }
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||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
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||||
@@ -26,7 +26,7 @@ File array_records.mlw:
|
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i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
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"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -35,7 +35,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
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"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -44,7 +44,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
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"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -53,7 +53,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -62,7 +62,7 @@ File array_records.mlw:
|
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i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
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"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -71,7 +71,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -80,7 +80,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -89,7 +89,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -98,7 +98,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -107,7 +107,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -116,7 +116,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "0" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Weakest Precondition
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -8,7 +8,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -17,7 +17,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -26,7 +26,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -35,7 +35,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -44,7 +44,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -53,7 +53,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -62,7 +62,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -71,7 +71,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -80,7 +80,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -89,7 +89,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -98,7 +98,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -107,7 +107,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -116,7 +116,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "0" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Strongest Postcondition
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -8,7 +8,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -17,7 +17,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -26,7 +26,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -35,7 +35,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -44,7 +44,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -53,7 +53,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -62,7 +62,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -71,7 +71,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -80,7 +80,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -89,7 +89,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -98,7 +98,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -107,7 +107,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -116,7 +116,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "2" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Weakest Precondition
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -8,7 +8,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -17,7 +17,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -26,7 +26,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -35,7 +35,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -44,7 +44,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -53,7 +53,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -62,7 +62,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -71,7 +71,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -80,7 +80,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -89,7 +89,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -98,7 +98,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -107,7 +107,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "-1" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
@@ -116,7 +116,7 @@ File array_records.mlw:
|
||||
i, [[@introduced], [@model_trace:i]] = {"type" : "Integer" ,
|
||||
"val" : "2" }
|
||||
|
||||
bench/ce/array_records.mlw Array_records VC var_overwrite: Timeout or Unknown
|
||||
bench/ce/array_records.mlw Array_records var_overwrite'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File array_records.mlw:
|
||||
Line 23:
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
Strongest Postcondition
|
||||
bench/ce/arrays.mlw A VC f1: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A VC f2: Valid
|
||||
bench/ce/arrays.mlw A VC f2: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B VC f1: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B VC f2: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A f1'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A f2'VC: Valid
|
||||
bench/ce/arrays.mlw A f2'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B f1'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B f2'VC: Timeout or Unknown
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
Weakest Precondition
|
||||
bench/ce/arrays.mlw A VC f1: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A VC f2: Valid
|
||||
bench/ce/arrays.mlw A VC f2: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B VC f1: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B VC f2: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A f1'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A f2'VC: Valid
|
||||
bench/ce/arrays.mlw A f2'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B f1'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B f2'VC: Timeout or Unknown
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
Strongest Postcondition
|
||||
bench/ce/arrays.mlw A VC f1: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A VC f2: Valid
|
||||
bench/ce/arrays.mlw A VC f2: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B VC f1: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B VC f2: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A f1'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A f2'VC: Valid
|
||||
bench/ce/arrays.mlw A f2'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B f1'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B f2'VC: Timeout or Unknown
|
||||
|
||||
@@ -1,6 +1,6 @@
|
||||
Weakest Precondition
|
||||
bench/ce/arrays.mlw A VC f1: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A VC f2: Valid
|
||||
bench/ce/arrays.mlw A VC f2: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B VC f1: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B VC f2: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A f1'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw A f2'VC: Valid
|
||||
bench/ce/arrays.mlw A f2'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B f1'VC: Timeout or Unknown
|
||||
bench/ce/arrays.mlw B f2'VC: Timeout or Unknown
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Strongest Postcondition
|
||||
bench/ce/bv32.mlw Ce_int32bv VC dummy_update: Timeout or Unknown
|
||||
bench/ce/bv32.mlw Ce_int32bv dummy_update'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File bv32.mlw:
|
||||
Line 7:
|
||||
@@ -20,7 +20,7 @@ File bv32.mlw:
|
||||
{"type" : "Record" , "val" : {"Field" : [{"field" : "contents" ,
|
||||
"value" : {"type" : "Integer" , "val" : "132" } }] } }
|
||||
|
||||
bench/ce/bv32.mlw Ce_int32bv VC dummy_update_with_int: Timeout or Unknown
|
||||
bench/ce/bv32.mlw Ce_int32bv dummy_update_with_int'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File bv32.mlw:
|
||||
Line 13:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Weakest Precondition
|
||||
bench/ce/bv32.mlw Ce_int32bv VC dummy_update: Timeout or Unknown
|
||||
bench/ce/bv32.mlw Ce_int32bv dummy_update'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File bv32.mlw:
|
||||
Line 7:
|
||||
@@ -20,7 +20,7 @@ File bv32.mlw:
|
||||
{"type" : "Record" , "val" : {"Field" : [{"field" : "contents" ,
|
||||
"value" : {"type" : "Integer" , "val" : "132" } }] } }
|
||||
|
||||
bench/ce/bv32.mlw Ce_int32bv VC dummy_update_with_int: Timeout or Unknown
|
||||
bench/ce/bv32.mlw Ce_int32bv dummy_update_with_int'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File bv32.mlw:
|
||||
Line 13:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Strongest Postcondition
|
||||
bench/ce/bv32.mlw Ce_int32bv VC dummy_update: Timeout or Unknown
|
||||
bench/ce/bv32.mlw Ce_int32bv dummy_update'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File bv32.mlw:
|
||||
Line 7:
|
||||
@@ -20,7 +20,7 @@ File bv32.mlw:
|
||||
{"type" : "Record" , "val" : {"Field" : [{"field" : "contents" ,
|
||||
"value" : {"type" : "Integer" , "val" : "132" } }] } }
|
||||
|
||||
bench/ce/bv32.mlw Ce_int32bv VC dummy_update_with_int: Timeout or Unknown
|
||||
bench/ce/bv32.mlw Ce_int32bv dummy_update_with_int'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File bv32.mlw:
|
||||
Line 13:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Weakest Precondition
|
||||
bench/ce/bv32.mlw Ce_int32bv VC dummy_update: Timeout or Unknown
|
||||
bench/ce/bv32.mlw Ce_int32bv dummy_update'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File bv32.mlw:
|
||||
Line 7:
|
||||
@@ -20,7 +20,7 @@ File bv32.mlw:
|
||||
{"type" : "Record" , "val" : {"Field" : [{"field" : "contents" ,
|
||||
"value" : {"type" : "Integer" , "val" : "132" } }] } }
|
||||
|
||||
bench/ce/bv32.mlw Ce_int32bv VC dummy_update_with_int: Timeout or Unknown
|
||||
bench/ce/bv32.mlw Ce_int32bv dummy_update_with_int'VC: Timeout or Unknown
|
||||
Counter-example model:
|
||||
File bv32.mlw:
|
||||
Line 13:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Strongest Postcondition
|
||||
bench/ce/double_projection.mlw Test VC f: Unknown (sat)
|
||||
bench/ce/double_projection.mlw Test f'VC: Unknown (sat)
|
||||
Counter-example model:
|
||||
File double_projection.mlw:
|
||||
Line 17:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Weakest Precondition
|
||||
bench/ce/double_projection.mlw Test VC f: Unknown (sat)
|
||||
bench/ce/double_projection.mlw Test f'VC: Unknown (sat)
|
||||
Counter-example model:
|
||||
File double_projection.mlw:
|
||||
Line 17:
|
||||
|
||||
@@ -1,5 +1,5 @@
|
||||
Strongest Postcondition
|
||||
bench/ce/double_projection.mlw Test VC f: Unknown (sat)
|
||||
bench/ce/double_projection.mlw Test f'VC: Unknown (sat)
|
||||
Counter-example model:
|
||||
File double_projection.mlw:
|
||||
Line 17:
|
||||
|
||||
Some files were not shown because too many files have changed in this diff Show More
Reference in New Issue
Block a user