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llvm-21
llvm-project/mlir/test/Integration
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Momchil Velikov 962c4217bc [MLIR][AArch64] Change some tests to ensure SVE vector length is the same throughout the function (#147506) 
This change only applies to functions the can be reasonably expected to
use SVE registers.

Modifying vector length in the middle of a function might cause
incorrect stack deallocation if there are callee-saved SVE registers or
incorrect access to SVE stack slots.

Addresses (non-issue) https://github.com/llvm/llvm-project/issues/143670
2025-07-09 09:32:25 +01:00
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data
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Dialect
[MLIR][AArch64] Change some tests to ensure SVE vector length is the same throughout the function (#147506)
2025-07-09 09:32:25 +01:00
GPU
[MLIR] Mark LLVM::FMAOp as legal (#144671)
2025-06-18 15:49:00 +02:00
lit.local.cfg
[mlir] Rename mlir-cpu-runner to mlir-runner (#123776)
2025-01-24 14:08:38 +01:00