Momchil Velikov 962c4217bc [MLIR][AArch64] Change some tests to ensure SVE vector length is the same throughout the function (#147506) ...

This change only applies to functions the can be reasonably expected to
use SVE registers.

Modifying vector length in the middle of a function might cause
incorrect stack deallocation if there are callee-saved SVE registers or
incorrect access to SVE stack slots.

Addresses (non-issue) https://github.com/llvm/llvm-project/issues/143670

2025-07-09 09:32:25 +01:00

..

SparseTensor

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ArmRunnerUtils.cpp

[MLIR][AArch64] Change some tests to ensure SVE vector length is the same throughout the function (#147506)

2025-07-09 09:32:25 +01:00

ArmSMEStubs.cpp

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AsyncRuntime.cpp

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CMakeLists.txt

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CRunnerUtils.cpp

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CudaRuntimeWrappers.cpp

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ExecutionEngine.cpp

Pass memory buffer to RuntimeDyld::MemoryManager factory (#142930)

2025-06-06 00:44:39 +01:00

Float16bits.cpp

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JitRunner.cpp

[mlir-runner] Check entry function does not expect arguments (#136825)

2025-05-15 09:19:39 +08:00

OptUtils.cpp

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RocmRuntimeWrappers.cpp

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RunnerUtils.cpp

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SparseTensorRuntime.cpp

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SpirvCpuRuntimeWrappers.cpp

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SyclRuntimeWrappers.cpp

[mlir] SYCL runtime wrapper: add memcpy support. (#141647)

2025-05-28 11:33:15 -07:00

VulkanRuntime.cpp

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VulkanRuntime.h

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VulkanRuntimeWrappers.cpp

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