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165 Commits

Author SHA1 Message Date
Simon Wright
a955b10f90 Add interrupt support for Nordic GPIO. (#371) 
* Add GPIO interrupt support for Nordic GPIO.

  * arch/ARM/Nordic/drivers/nrf_common/nrf-gpio-tasks_and_events.ad[sb]:
      Added subprograms to enable, test for presence, acknowledge and
      disable both channel and port interrupts.

* Correct style warnings for Nordic GPIO interrupts.

* Match Nordic GPIO changes to AdaCore style.

  * arch/ARM/Nordic/drivers/nrf_common/nrf-gpio-tasks_and_events.ads
    (Channel_Event_Is_Set): renamed to Channel_Event_Set.
    (Port_Event_Is_Set): similarly.
  * arch/ARM/Nordic/drivers/nrf_common/nrf-gpio-tasks_and_events.adb:
    likewise. Keyword 'is' always on new line.
 2020-09-24 18:32:33 +02:00
Fabien Chouteau
c9290bc39d Add RISC-V performance CSR support (#363) 
* Add RISC-V performance CSR support

* RISC-V Read_CSR_64: fix rv32 version

* RISC-V improve CSR support

Add sub-program to swap, set bits, clear bits, etc.
Instantiate sub-programs for all machine CSRs.
 2020-09-15 18:08:30 +02:00
Simon Wright
a5014924e5 Reduce optimization opportunities in Semihosting. 
* arch/ARM/cortex_m/src/semihosting.adb (Write_0): Data is of new
      type Byte_Array, which is a new UInt8_Array with volatile
      components (FSF GCC was miscompiling at -O3).
 2020-06-17 16:41:11 +02:00
Michael du Breuil
72bbae6116 STM32: Allow specifying the GPIO speed on PWM pins 2020-03-13 11:23:01 +01:00
Shawn Nock
0bc6ee3a06 Aligns copyright statements in headers to AdaCore requirements 2020-03-10 17:22:21 +01:00
Fabien Chouteau
0c5ebd62d3 Merge nRF51 and nRF52 SPI master implementations 2020-03-10 17:22:21 +01:00
Fabien Chouteau
b592973620 nRF.Device: Add missing devices 2020-03-10 17:22:21 +01:00
Fabien Chouteau
c8b8e81301 nRF: split the ppi driver 2020-03-10 17:22:21 +01:00
Fabien Chouteau
3e828649f8 Bump copyright notice 2020-03-10 17:22:21 +01:00
Shawn Nock
93ae03813f Removes unused separate subroutine 2020-03-10 17:22:21 +01:00
Shawn Nock
285fdf3209 Use updated nrf52 svd 2020-03-10 17:22:21 +01:00
Fabien Chouteau
c3d62fe587 nRF51/52: fix style 2020-03-10 17:22:21 +01:00
Fabien Chouteau
fb9dcfd06e Fix nRF52 SVD packages 
Either the SVD file of svd2ada should also be fixed,
but this will do for the time being.
 2020-03-10 17:22:21 +01:00
Fabien Chouteau
b8ffaa6804 Cortex_M.NVIC: redefine interrupt and priority instead of subtype 2020-03-10 17:22:21 +01:00
Fabien Chouteau
6ac94c492c Remove nrf_svd-swi.ads: the package is not usable 2020-03-10 17:22:21 +01:00
Shawn Nock
d26e14e5c2 nRF52832 and nRF52 DK Support 2020-03-10 17:22:21 +01:00
Francesc Rocher
4ceb99fb3d stm32: Add support to stop ADC conversions 
This is useful if you want to change the channel of a regular conversion
in progress in a given ADC converter.

For example:

   RC_Conversion : Regular_Channel_Conversions :=
     (1 => (Channel => 3, Sample_Time => T));

   ...

   -- start regular conversions of channel 3
   Configure_Regular_Conversions (ADC_Converter, Continous => True,
      Trigger => Software_Ttriggered, Enable_EOC => False,
      Conversions => RC_Conversion);
   Start_Conversion (ADC_Converter);

   ...

   -- change to ADC channel 10:
   RC_Conversion (1).Channel := 10;
   Stop_Conversion (ADC_Converter);
   Configure_Regular_Conversions (ADC_Converter, Continous => True,
      Trigger => Software_Ttriggered, Enable_EOC => False,
      Conversions => RC_Conversion);
   Start_Conversion (ADC_Converter);
 2020-02-18 11:15:05 +01:00
Shawn Nock
bd611e004c Rename cm0 NVIC api functions to match the cm4_cm7 impl 
This allows for a unified driver in families that have members on both
sides. Useful for nRF family, but also should lower-end STM32 parts become
supported in the future.
 2020-02-13 12:49:21 +01:00
Fabien Chouteau
f123af4fb8 Cortex_M.NVIC: Fix indentation 2020-01-13 16:36:39 +01:00
Fabien Chouteau
f6ddfbb61f Cortex_M.NVIC: Fix Enable_Interrupt 
The arguments of the left shits are reversed.
 2020-01-13 16:36:39 +01:00
Alessandro Felicetti
391866ad37 Update nrf51-temperature.adb 2019-11-29 12:51:46 +01:00
Alessandro Felicetti
88991bc91d Update nrf51-temperature.ads 2019-11-29 12:51:18 +01:00
Fabien Chouteau
128742c669 nRF51: Add UART driver 2019-10-28 11:02:44 +01:00
Fabien Chouteau
a61be055b9 RISC-V/SiFive: Add uart0 driver 2019-09-06 12:35:02 +02:00
Fabien Chouteau
8677f892a9 Add SiFive Unleased definition including a new device definition system 
In the future, this device definition system could be combined with a
device tree parser.
 2019-09-06 12:35:02 +02:00